1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * at91sam9260-smartweb.dts 3*4882a593Smuzhiyun * (C) Copyright 2016 4*4882a593Smuzhiyun * Heiko Schocher, DENX Software Engineering, hs@denx.de. 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Based on: 7*4882a593Smuzhiyun * at91sam9g20ek.dts - Device Tree file for Atmel at91sam9g20ek board 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * Licensed under GPLv2. 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun/dts-v1/; 14*4882a593Smuzhiyun#include "at91sam9260.dtsi" 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun/ { 17*4882a593Smuzhiyun model = "Siemens smartweb"; 18*4882a593Smuzhiyun compatible = "atmel,at91sam9260", "atmel,at91sam9"; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun u-boot,dm-pre-reloc; 22*4882a593Smuzhiyun stdout-path = &dbgu; 23*4882a593Smuzhiyun }; 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun memory { 26*4882a593Smuzhiyun reg = <0x20000000 0x4000000>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun clocks { 30*4882a593Smuzhiyun slow_xtal { 31*4882a593Smuzhiyun clock-frequency = <32768>; 32*4882a593Smuzhiyun }; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun main_xtal { 35*4882a593Smuzhiyun clock-frequency = <18432000>; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun ahb { 40*4882a593Smuzhiyun apb { 41*4882a593Smuzhiyun pinctrl@fffff400 { 42*4882a593Smuzhiyun board { 43*4882a593Smuzhiyun pinctrl_pck0_as_mck: pck0_as_mck { 44*4882a593Smuzhiyun atmel,pins = 45*4882a593Smuzhiyun <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC1 periph B */ 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun }; 49*4882a593Smuzhiyun }; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun dbgu: serial@fffff200 { 52*4882a593Smuzhiyun u-boot,dm-pre-reloc; 53*4882a593Smuzhiyun status = "okay"; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun usart0: serial@fffb0000 { 57*4882a593Smuzhiyun pinctrl-0 = 58*4882a593Smuzhiyun <&pinctrl_usart0 59*4882a593Smuzhiyun &pinctrl_usart0_rts 60*4882a593Smuzhiyun &pinctrl_usart0_cts 61*4882a593Smuzhiyun &pinctrl_usart0_dtr_dsr 62*4882a593Smuzhiyun &pinctrl_usart0_dcd 63*4882a593Smuzhiyun &pinctrl_usart0_ri>; 64*4882a593Smuzhiyun status = "okay"; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun usart1: serial@fffb4000 { 68*4882a593Smuzhiyun status = "okay"; 69*4882a593Smuzhiyun }; 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun macb0: ethernet@fffc4000 { 72*4882a593Smuzhiyun phy-mode = "rmii"; 73*4882a593Smuzhiyun status = "okay"; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun usb1: gadget@fffa4000 { 77*4882a593Smuzhiyun atmel,vbus-gpio = <&pioC 5 GPIO_ACTIVE_HIGH>; 78*4882a593Smuzhiyun status = "okay"; 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun ssc0: ssc@fffbc000 { 82*4882a593Smuzhiyun status = "okay"; 83*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_ssc0_tx>; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun rtc@fffffd20 { 87*4882a593Smuzhiyun atmel,rtt-rtc-time-reg = <&gpbr 0x0>; 88*4882a593Smuzhiyun status = "okay"; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun watchdog@fffffd40 { 92*4882a593Smuzhiyun status = "okay"; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun gpbr: syscon@fffffd50 { 96*4882a593Smuzhiyun status = "okay"; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun nand0: nand@40000000 { 101*4882a593Smuzhiyun nand-bus-width = <8>; 102*4882a593Smuzhiyun nand-ecc-mode = "soft"; 103*4882a593Smuzhiyun nand-on-flash-bbt; 104*4882a593Smuzhiyun status = "okay"; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun usb0: ohci@00500000 { 108*4882a593Smuzhiyun num-ports = <2>; 109*4882a593Smuzhiyun status = "okay"; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun}; 113