xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/armada-xp-synology-ds414.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree file for Synology DS414
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or
7*4882a593Smuzhiyun * modify it under the terms of the GNU General Public License
8*4882a593Smuzhiyun * as published by the Free Software Foundation; either version
9*4882a593Smuzhiyun * 2 of the License, or (at your option) any later version.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Note: this Device Tree assumes that the bootloader has remapped the
12*4882a593Smuzhiyun * internal registers to 0xf1000000 (instead of the old 0xd0000000).
13*4882a593Smuzhiyun * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
14*4882a593Smuzhiyun * bootloaders provided by Marvell. It is used in recent versions of
15*4882a593Smuzhiyun * DSM software provided by Synology. Nonetheless, some earlier boards
16*4882a593Smuzhiyun * were delivered with an older version of u-boot that left internal
17*4882a593Smuzhiyun * registers mapped at 0xd0000000. If you have such a device you will
18*4882a593Smuzhiyun * not be able to directly boot a kernel based on this Device Tree. In
19*4882a593Smuzhiyun * that case, the preferred solution is to update your bootloader (e.g.
20*4882a593Smuzhiyun * by upgrading to latest version of DSM, or building a new one and
21*4882a593Smuzhiyun * installing it from u-boot prompt) or adjust the Devive Tree
22*4882a593Smuzhiyun * (s/0xf1000000/0xd0000000/ in 'ranges' below).
23*4882a593Smuzhiyun */
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun/dts-v1/;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun#include <dt-bindings/input/input.h>
28*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
29*4882a593Smuzhiyun#include "armada-xp-mv78230.dtsi"
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun/ {
32*4882a593Smuzhiyun	model = "Synology DS414";
33*4882a593Smuzhiyun	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
34*4882a593Smuzhiyun		     "marvell,armadaxp", "marvell,armada-370-xp";
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	chosen {
37*4882a593Smuzhiyun		bootargs = "console=ttyS0,115200 earlyprintk";
38*4882a593Smuzhiyun		stdout-path = &uart0;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun	aliases {
42*4882a593Smuzhiyun		spi0 = &spi0;
43*4882a593Smuzhiyun	};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun	memory {
46*4882a593Smuzhiyun		device_type = "memory";
47*4882a593Smuzhiyun		reg = <0 0x00000000 0 0x40000000>; /* 1GB */
48*4882a593Smuzhiyun	};
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	soc {
51*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
52*4882a593Smuzhiyun			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun		pcie-controller {
55*4882a593Smuzhiyun			status = "okay";
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun			/*
58*4882a593Smuzhiyun			 * Connected to Marvell 88SX7042 SATA-II controller
59*4882a593Smuzhiyun			 * handling the four disks.
60*4882a593Smuzhiyun			 */
61*4882a593Smuzhiyun			pcie@1,0 {
62*4882a593Smuzhiyun				/* Port 0, Lane 0 */
63*4882a593Smuzhiyun				status = "okay";
64*4882a593Smuzhiyun			};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun			/*
67*4882a593Smuzhiyun			 * Connected to EtronTech EJ168A XHCI controller
68*4882a593Smuzhiyun			 * providing the two rear USB 3.0 ports.
69*4882a593Smuzhiyun			 */
70*4882a593Smuzhiyun			pcie@5,0 {
71*4882a593Smuzhiyun				/* Port 1, Lane 0 */
72*4882a593Smuzhiyun				status = "okay";
73*4882a593Smuzhiyun			};
74*4882a593Smuzhiyun		};
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun		internal-regs {
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun			/* RTC is provided by Seiko S-35390A below */
79*4882a593Smuzhiyun			rtc@10300 {
80*4882a593Smuzhiyun				status = "disabled";
81*4882a593Smuzhiyun			};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun			spi0: spi@10600 {
84*4882a593Smuzhiyun				status = "okay";
85*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun				spi-flash@0 {
88*4882a593Smuzhiyun					u-boot,dm-pre-reloc;
89*4882a593Smuzhiyun					#address-cells = <1>;
90*4882a593Smuzhiyun					#size-cells = <1>;
91*4882a593Smuzhiyun					compatible = "micron,n25q064";
92*4882a593Smuzhiyun					reg = <0>; /* Chip select 0 */
93*4882a593Smuzhiyun					spi-max-frequency = <20000000>;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun					/*
96*4882a593Smuzhiyun					 * Warning!
97*4882a593Smuzhiyun					 *
98*4882a593Smuzhiyun					 * Synology u-boot uses its compiled-in environment
99*4882a593Smuzhiyun					 * and it seems Synology did not care to change u-boot
100*4882a593Smuzhiyun					 * default configuration in order to allow saving a
101*4882a593Smuzhiyun					 * modified environment at a sensible location. So,
102*4882a593Smuzhiyun					 * if you do a 'saveenv' under u-boot, your modified
103*4882a593Smuzhiyun					 * environment will be saved at 1MB after the start
104*4882a593Smuzhiyun					 * of the flash, i.e. in the middle of the uImage.
105*4882a593Smuzhiyun					 * For that reason, it is strongly advised not to
106*4882a593Smuzhiyun					 * change the default environment, unless you know
107*4882a593Smuzhiyun					 * what you are doing.
108*4882a593Smuzhiyun					 */
109*4882a593Smuzhiyun					partition@00000000 { /* u-boot */
110*4882a593Smuzhiyun						label = "RedBoot";
111*4882a593Smuzhiyun						reg = <0x00000000 0x000d0000>; /* 832KB */
112*4882a593Smuzhiyun					};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun					partition@000c0000 { /* uImage */
115*4882a593Smuzhiyun						label = "zImage";
116*4882a593Smuzhiyun						reg = <0x000d0000 0x002d0000>; /* 2880KB */
117*4882a593Smuzhiyun					};
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun					partition@003a0000 { /* uInitramfs */
120*4882a593Smuzhiyun						label = "rd.gz";
121*4882a593Smuzhiyun						reg = <0x003a0000 0x00430000>; /* 4250KB */
122*4882a593Smuzhiyun					};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun					partition@007d0000 { /* MAC address and serial number */
125*4882a593Smuzhiyun						label = "vendor";
126*4882a593Smuzhiyun						reg = <0x007d0000 0x00010000>; /* 64KB */
127*4882a593Smuzhiyun					};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun					partition@007e0000 {
130*4882a593Smuzhiyun						label = "RedBoot config";
131*4882a593Smuzhiyun						reg = <0x007e0000 0x00010000>; /* 64KB */
132*4882a593Smuzhiyun					};
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun					partition@007f0000 {
135*4882a593Smuzhiyun						label = "FIS directory";
136*4882a593Smuzhiyun						reg = <0x007f0000 0x00010000>; /* 64KB */
137*4882a593Smuzhiyun					};
138*4882a593Smuzhiyun				};
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun			i2c@11000 {
142*4882a593Smuzhiyun				clock-frequency = <400000>;
143*4882a593Smuzhiyun				status = "okay";
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun				s35390a: s35390a@30 {
146*4882a593Smuzhiyun					 compatible = "sii,s35390a";
147*4882a593Smuzhiyun					 reg = <0x30>;
148*4882a593Smuzhiyun				};
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun			/* Connected to a header on device's PCB. This
152*4882a593Smuzhiyun			 * provides the main console for the device.
153*4882a593Smuzhiyun			 *
154*4882a593Smuzhiyun			 * Warning: the device may not boot with a 3.3V
155*4882a593Smuzhiyun			 * USB-serial converter connected when the power
156*4882a593Smuzhiyun			 * button is pressed. The converter needs to be
157*4882a593Smuzhiyun			 * connected a few seconds after pressing the
158*4882a593Smuzhiyun			 * power button. This is possibly due to UART0_TXD
159*4882a593Smuzhiyun			 * pin being sampled at reset (bit 0 of SAR).
160*4882a593Smuzhiyun			 */
161*4882a593Smuzhiyun			serial@12000 {
162*4882a593Smuzhiyun				status = "okay";
163*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
164*4882a593Smuzhiyun			};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun			/* Connected to a Microchip PIC16F883 for power control */
167*4882a593Smuzhiyun			serial@12100 {
168*4882a593Smuzhiyun				status = "okay";
169*4882a593Smuzhiyun			};
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun			poweroff@12100 {
172*4882a593Smuzhiyun				compatible = "synology,power-off";
173*4882a593Smuzhiyun				reg = <0x12100 0x100>;
174*4882a593Smuzhiyun				clocks = <&coreclk 0>;
175*4882a593Smuzhiyun			};
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun			/* Front USB 2.0 port */
178*4882a593Smuzhiyun			usb@50000 {
179*4882a593Smuzhiyun				status = "okay";
180*4882a593Smuzhiyun			};
181*4882a593Smuzhiyun
182*4882a593Smuzhiyun			mdio {
183*4882a593Smuzhiyun				phy0: ethernet-phy@0 { /* Marvell 88E1512 */
184*4882a593Smuzhiyun					reg = <0>;
185*4882a593Smuzhiyun				};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun				phy1: ethernet-phy@1 { /* Marvell 88E1512 */
188*4882a593Smuzhiyun					reg = <1>;
189*4882a593Smuzhiyun				};
190*4882a593Smuzhiyun			};
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun			ethernet@70000 {
193*4882a593Smuzhiyun				status = "okay";
194*4882a593Smuzhiyun				pinctrl-0 = <&ge0_rgmii_pins>;
195*4882a593Smuzhiyun				pinctrl-names = "default";
196*4882a593Smuzhiyun				phy = <&phy1>;
197*4882a593Smuzhiyun				phy-mode = "rgmii-id";
198*4882a593Smuzhiyun			};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun			ethernet@74000 {
201*4882a593Smuzhiyun				pinctrl-0 = <&ge1_rgmii_pins>;
202*4882a593Smuzhiyun				pinctrl-names = "default";
203*4882a593Smuzhiyun				status = "okay";
204*4882a593Smuzhiyun				phy = <&phy0>;
205*4882a593Smuzhiyun				phy-mode = "rgmii-id";
206*4882a593Smuzhiyun			};
207*4882a593Smuzhiyun		};
208*4882a593Smuzhiyun	};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun	regulators {
211*4882a593Smuzhiyun		compatible = "simple-bus";
212*4882a593Smuzhiyun		#address-cells = <1>;
213*4882a593Smuzhiyun		#size-cells = <0>;
214*4882a593Smuzhiyun		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
215*4882a593Smuzhiyun			     &sata3_pwr_pin &sata4_pwr_pin>;
216*4882a593Smuzhiyun		pinctrl-names = "default";
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun		sata1_regulator: sata1-regulator {
219*4882a593Smuzhiyun			compatible = "regulator-fixed";
220*4882a593Smuzhiyun			reg = <1>;
221*4882a593Smuzhiyun			regulator-name = "SATA1 Power";
222*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
223*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
224*4882a593Smuzhiyun			startup-delay-us = <2000000>;
225*4882a593Smuzhiyun			enable-active-high;
226*4882a593Smuzhiyun			regulator-always-on;
227*4882a593Smuzhiyun			regulator-boot-on;
228*4882a593Smuzhiyun			gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
229*4882a593Smuzhiyun		};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun		sata2_regulator: sata2-regulator {
232*4882a593Smuzhiyun			compatible = "regulator-fixed";
233*4882a593Smuzhiyun			reg = <2>;
234*4882a593Smuzhiyun			regulator-name = "SATA2 Power";
235*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
236*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
237*4882a593Smuzhiyun			startup-delay-us = <4000000>;
238*4882a593Smuzhiyun			enable-active-high;
239*4882a593Smuzhiyun			regulator-always-on;
240*4882a593Smuzhiyun			regulator-boot-on;
241*4882a593Smuzhiyun			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
242*4882a593Smuzhiyun		};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun		sata3_regulator: sata3-regulator {
245*4882a593Smuzhiyun			compatible = "regulator-fixed";
246*4882a593Smuzhiyun			reg = <3>;
247*4882a593Smuzhiyun			regulator-name = "SATA3 Power";
248*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
249*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
250*4882a593Smuzhiyun			startup-delay-us = <6000000>;
251*4882a593Smuzhiyun			enable-active-high;
252*4882a593Smuzhiyun			regulator-always-on;
253*4882a593Smuzhiyun			regulator-boot-on;
254*4882a593Smuzhiyun			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
255*4882a593Smuzhiyun		};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun		sata4_regulator: sata4-regulator {
258*4882a593Smuzhiyun			compatible = "regulator-fixed";
259*4882a593Smuzhiyun			reg = <4>;
260*4882a593Smuzhiyun			regulator-name = "SATA4 Power";
261*4882a593Smuzhiyun			regulator-min-microvolt = <5000000>;
262*4882a593Smuzhiyun			regulator-max-microvolt = <5000000>;
263*4882a593Smuzhiyun			startup-delay-us = <8000000>;
264*4882a593Smuzhiyun			enable-active-high;
265*4882a593Smuzhiyun			regulator-always-on;
266*4882a593Smuzhiyun			regulator-boot-on;
267*4882a593Smuzhiyun			gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun	};
270*4882a593Smuzhiyun};
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun&pinctrl {
273*4882a593Smuzhiyun	sata1_pwr_pin: sata1-pwr-pin {
274*4882a593Smuzhiyun		marvell,pins = "mpp42";
275*4882a593Smuzhiyun		marvell,function = "gpio";
276*4882a593Smuzhiyun	};
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun	sata2_pwr_pin: sata2-pwr-pin {
279*4882a593Smuzhiyun		marvell,pins = "mpp44";
280*4882a593Smuzhiyun		marvell,function = "gpio";
281*4882a593Smuzhiyun	};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun	sata3_pwr_pin: sata3-pwr-pin {
284*4882a593Smuzhiyun		marvell,pins = "mpp45";
285*4882a593Smuzhiyun		marvell,function = "gpio";
286*4882a593Smuzhiyun	};
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun	sata4_pwr_pin: sata4-pwr-pin {
289*4882a593Smuzhiyun		marvell,pins = "mpp46";
290*4882a593Smuzhiyun		marvell,function = "gpio";
291*4882a593Smuzhiyun	};
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun	sata1_pres_pin: sata1-pres-pin {
294*4882a593Smuzhiyun		marvell,pins = "mpp34";
295*4882a593Smuzhiyun		marvell,function = "gpio";
296*4882a593Smuzhiyun	};
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun	sata2_pres_pin: sata2-pres-pin {
299*4882a593Smuzhiyun		marvell,pins = "mpp35";
300*4882a593Smuzhiyun		marvell,function = "gpio";
301*4882a593Smuzhiyun	};
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun	sata3_pres_pin: sata3-pres-pin {
304*4882a593Smuzhiyun		marvell,pins = "mpp40";
305*4882a593Smuzhiyun		marvell,function = "gpio";
306*4882a593Smuzhiyun	};
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun	sata4_pres_pin: sata4-pres-pin {
309*4882a593Smuzhiyun		marvell,pins = "mpp41";
310*4882a593Smuzhiyun		marvell,function = "gpio";
311*4882a593Smuzhiyun	};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun	syno_id_bit0_pin: syno-id-bit0-pin {
314*4882a593Smuzhiyun		marvell,pins = "mpp26";
315*4882a593Smuzhiyun		marvell,function = "gpio";
316*4882a593Smuzhiyun	};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun	syno_id_bit1_pin: syno-id-bit1-pin {
319*4882a593Smuzhiyun		marvell,pins = "mpp28";
320*4882a593Smuzhiyun		marvell,function = "gpio";
321*4882a593Smuzhiyun	};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun	syno_id_bit2_pin: syno-id-bit2-pin {
324*4882a593Smuzhiyun		marvell,pins = "mpp29";
325*4882a593Smuzhiyun		marvell,function = "gpio";
326*4882a593Smuzhiyun	};
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun	fan1_alarm_pin: fan1-alarm-pin {
329*4882a593Smuzhiyun		marvell,pins = "mpp33";
330*4882a593Smuzhiyun		marvell,function = "gpio";
331*4882a593Smuzhiyun	};
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun	fan2_alarm_pin: fan2-alarm-pin {
334*4882a593Smuzhiyun		marvell,pins = "mpp32";
335*4882a593Smuzhiyun		marvell,function = "gpio";
336*4882a593Smuzhiyun	};
337*4882a593Smuzhiyun};
338