xref: /OK3568_Linux_fs/u-boot/arch/arm/dts/armada-388-gp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Device Tree file for Marvell Armada 385 development board
3*4882a593Smuzhiyun * (RD-88F6820-GP)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2014 Marvell
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * Gregory CLEMENT <gregory.clement@free-electrons.com>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * This file is dual-licensed: you can use it either under the terms
10*4882a593Smuzhiyun * of the GPL or the X11 license, at your option. Note that this dual
11*4882a593Smuzhiyun * licensing only applies to this file, and not this project as a
12*4882a593Smuzhiyun * whole.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun *  a) This file is licensed under the terms of the GNU General Public
15*4882a593Smuzhiyun *     License version 2.  This program is licensed "as is" without
16*4882a593Smuzhiyun *     any warranty of any kind, whether express or implied.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * Or, alternatively,
19*4882a593Smuzhiyun *
20*4882a593Smuzhiyun *  b) Permission is hereby granted, free of charge, to any person
21*4882a593Smuzhiyun *     obtaining a copy of this software and associated documentation
22*4882a593Smuzhiyun *     files (the "Software"), to deal in the Software without
23*4882a593Smuzhiyun *     restriction, including without limitation the rights to use,
24*4882a593Smuzhiyun *     copy, modify, merge, publish, distribute, sublicense, and/or
25*4882a593Smuzhiyun *     sell copies of the Software, and to permit persons to whom the
26*4882a593Smuzhiyun *     Software is furnished to do so, subject to the following
27*4882a593Smuzhiyun *     conditions:
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun *     The above copyright notice and this permission notice shall be
30*4882a593Smuzhiyun *     included in all copies or substantial portions of the Software.
31*4882a593Smuzhiyun *
32*4882a593Smuzhiyun *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
33*4882a593Smuzhiyun *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
34*4882a593Smuzhiyun *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
35*4882a593Smuzhiyun *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
36*4882a593Smuzhiyun *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
37*4882a593Smuzhiyun *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
38*4882a593Smuzhiyun *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
39*4882a593Smuzhiyun *     OTHER DEALINGS IN THE SOFTWARE.
40*4882a593Smuzhiyun */
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun/dts-v1/;
43*4882a593Smuzhiyun#include "armada-388.dtsi"
44*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun/ {
47*4882a593Smuzhiyun	model = "Marvell Armada 385 GP";
48*4882a593Smuzhiyun	compatible = "marvell,a385-gp", "marvell,armada388", "marvell,armada380";
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun	chosen {
51*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
52*4882a593Smuzhiyun	};
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun	aliases {
55*4882a593Smuzhiyun		ethernet0 = &eth0;
56*4882a593Smuzhiyun		ethernet1 = &eth1;
57*4882a593Smuzhiyun		spi0 = &spi0;
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	memory {
61*4882a593Smuzhiyun		device_type = "memory";
62*4882a593Smuzhiyun		reg = <0x00000000 0x80000000>; /* 2 GB */
63*4882a593Smuzhiyun	};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun	soc {
66*4882a593Smuzhiyun		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
67*4882a593Smuzhiyun			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun		internal-regs {
70*4882a593Smuzhiyun			spi@10600 {
71*4882a593Smuzhiyun				pinctrl-names = "default";
72*4882a593Smuzhiyun				pinctrl-0 = <&spi0_pins>;
73*4882a593Smuzhiyun				status = "okay";
74*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun				spi-flash@0 {
77*4882a593Smuzhiyun					u-boot,dm-pre-reloc;
78*4882a593Smuzhiyun					#address-cells = <1>;
79*4882a593Smuzhiyun					#size-cells = <1>;
80*4882a593Smuzhiyun					compatible = "st,m25p128", "jedec,spi-nor";
81*4882a593Smuzhiyun					reg = <0>; /* Chip select 0 */
82*4882a593Smuzhiyun					spi-max-frequency = <50000000>;
83*4882a593Smuzhiyun					m25p,fast-read;
84*4882a593Smuzhiyun				};
85*4882a593Smuzhiyun			};
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun			i2c@11000 {
88*4882a593Smuzhiyun				pinctrl-names = "default";
89*4882a593Smuzhiyun				pinctrl-0 = <&i2c0_pins>;
90*4882a593Smuzhiyun				status = "okay";
91*4882a593Smuzhiyun				clock-frequency = <100000>;
92*4882a593Smuzhiyun				/*
93*4882a593Smuzhiyun				 * The EEPROM located at adresse 54 is needed
94*4882a593Smuzhiyun				 * for the boot - DO NOT ERASE IT -
95*4882a593Smuzhiyun				 */
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun				expander0: pca9555@20 {
98*4882a593Smuzhiyun					compatible = "nxp,pca9555";
99*4882a593Smuzhiyun					pinctrl-names = "default";
100*4882a593Smuzhiyun					pinctrl-0 = <&pca0_pins>;
101*4882a593Smuzhiyun					interrupt-parent = <&gpio0>;
102*4882a593Smuzhiyun					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
103*4882a593Smuzhiyun					gpio-controller;
104*4882a593Smuzhiyun					#gpio-cells = <2>;
105*4882a593Smuzhiyun					interrupt-controller;
106*4882a593Smuzhiyun					#interrupt-cells = <2>;
107*4882a593Smuzhiyun					reg = <0x20>;
108*4882a593Smuzhiyun				};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun				expander1: pca9555@21 {
111*4882a593Smuzhiyun					compatible = "nxp,pca9555";
112*4882a593Smuzhiyun					pinctrl-names = "default";
113*4882a593Smuzhiyun					interrupt-parent = <&gpio0>;
114*4882a593Smuzhiyun					interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
115*4882a593Smuzhiyun					gpio-controller;
116*4882a593Smuzhiyun					#gpio-cells = <2>;
117*4882a593Smuzhiyun					interrupt-controller;
118*4882a593Smuzhiyun					#interrupt-cells = <2>;
119*4882a593Smuzhiyun					reg = <0x21>;
120*4882a593Smuzhiyun				};
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun			};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun			serial@12000 {
125*4882a593Smuzhiyun				/*
126*4882a593Smuzhiyun				 * Exported on the micro USB connector CON16
127*4882a593Smuzhiyun				 * through an FTDI
128*4882a593Smuzhiyun				 */
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun				pinctrl-names = "default";
131*4882a593Smuzhiyun				pinctrl-0 = <&uart0_pins>;
132*4882a593Smuzhiyun				status = "okay";
133*4882a593Smuzhiyun				u-boot,dm-pre-reloc;
134*4882a593Smuzhiyun			};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun			/* GE1 CON15 */
137*4882a593Smuzhiyun			ethernet@30000 {
138*4882a593Smuzhiyun				pinctrl-names = "default";
139*4882a593Smuzhiyun				pinctrl-0 = <&ge1_rgmii_pins>;
140*4882a593Smuzhiyun				status = "okay";
141*4882a593Smuzhiyun				phy = <&phy1>;
142*4882a593Smuzhiyun				phy-mode = "rgmii-id";
143*4882a593Smuzhiyun			};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun			/* CON4 */
146*4882a593Smuzhiyun			usb@58000 {
147*4882a593Smuzhiyun				vcc-supply = <&reg_usb2_0_vbus>;
148*4882a593Smuzhiyun				status = "okay";
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun			/* GE0 CON1 */
152*4882a593Smuzhiyun			ethernet@70000 {
153*4882a593Smuzhiyun				pinctrl-names = "default";
154*4882a593Smuzhiyun				/*
155*4882a593Smuzhiyun				 * The Reference Clock 0 is used to provide a
156*4882a593Smuzhiyun				 * clock to the PHY
157*4882a593Smuzhiyun				 */
158*4882a593Smuzhiyun				pinctrl-0 = <&ge0_rgmii_pins>, <&ref_clk0_pins>;
159*4882a593Smuzhiyun				status = "okay";
160*4882a593Smuzhiyun				phy = <&phy0>;
161*4882a593Smuzhiyun				phy-mode = "rgmii-id";
162*4882a593Smuzhiyun			};
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun			mdio@72004 {
166*4882a593Smuzhiyun				pinctrl-names = "default";
167*4882a593Smuzhiyun				pinctrl-0 = <&mdio_pins>;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun				phy0: ethernet-phy@1 {
170*4882a593Smuzhiyun					reg = <1>;
171*4882a593Smuzhiyun				};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun				phy1: ethernet-phy@0 {
174*4882a593Smuzhiyun					reg = <0>;
175*4882a593Smuzhiyun				};
176*4882a593Smuzhiyun			};
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun			sata@a8000 {
179*4882a593Smuzhiyun				pinctrl-names = "default";
180*4882a593Smuzhiyun				pinctrl-0 = <&sata0_pins>, <&sata1_pins>;
181*4882a593Smuzhiyun				status = "okay";
182*4882a593Smuzhiyun				#address-cells = <1>;
183*4882a593Smuzhiyun				#size-cells = <0>;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun				sata0: sata-port@0 {
186*4882a593Smuzhiyun					reg = <0>;
187*4882a593Smuzhiyun					target-supply = <&reg_5v_sata0>;
188*4882a593Smuzhiyun				};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun				sata1: sata-port@1 {
191*4882a593Smuzhiyun					reg = <1>;
192*4882a593Smuzhiyun					target-supply = <&reg_5v_sata1>;
193*4882a593Smuzhiyun				};
194*4882a593Smuzhiyun			};
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun			sata@e0000 {
197*4882a593Smuzhiyun				pinctrl-names = "default";
198*4882a593Smuzhiyun				pinctrl-0 = <&sata2_pins>, <&sata3_pins>;
199*4882a593Smuzhiyun				status = "okay";
200*4882a593Smuzhiyun				#address-cells = <1>;
201*4882a593Smuzhiyun				#size-cells = <0>;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun				sata2: sata-port@0 {
204*4882a593Smuzhiyun					reg = <0>;
205*4882a593Smuzhiyun					target-supply = <&reg_5v_sata2>;
206*4882a593Smuzhiyun				};
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun				sata3: sata-port@1 {
209*4882a593Smuzhiyun					reg = <1>;
210*4882a593Smuzhiyun					target-supply = <&reg_5v_sata3>;
211*4882a593Smuzhiyun				};
212*4882a593Smuzhiyun			};
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun			sdhci@d8000 {
215*4882a593Smuzhiyun				pinctrl-names = "default";
216*4882a593Smuzhiyun				pinctrl-0 = <&sdhci_pins>;
217*4882a593Smuzhiyun				cd-gpios = <&expander0 5 GPIO_ACTIVE_LOW>;
218*4882a593Smuzhiyun				no-1-8-v;
219*4882a593Smuzhiyun				wp-inverted;
220*4882a593Smuzhiyun				bus-width = <8>;
221*4882a593Smuzhiyun				status = "okay";
222*4882a593Smuzhiyun			};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun			/* CON5 */
225*4882a593Smuzhiyun			usb3@f0000 {
226*4882a593Smuzhiyun				vcc-supply = <&reg_usb2_1_vbus>;
227*4882a593Smuzhiyun				status = "okay";
228*4882a593Smuzhiyun			};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun			/* CON7 */
231*4882a593Smuzhiyun			usb3@f8000 {
232*4882a593Smuzhiyun				vcc-supply = <&reg_usb3_vbus>;
233*4882a593Smuzhiyun				status = "okay";
234*4882a593Smuzhiyun			};
235*4882a593Smuzhiyun		};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun		pcie-controller {
238*4882a593Smuzhiyun			status = "okay";
239*4882a593Smuzhiyun			/*
240*4882a593Smuzhiyun			 * One PCIe units is accessible through
241*4882a593Smuzhiyun			 * standard PCIe slot on the board.
242*4882a593Smuzhiyun			 */
243*4882a593Smuzhiyun			pcie@1,0 {
244*4882a593Smuzhiyun				/* Port 0, Lane 0 */
245*4882a593Smuzhiyun				status = "okay";
246*4882a593Smuzhiyun			};
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun			/*
249*4882a593Smuzhiyun			 * The two other PCIe units are accessible
250*4882a593Smuzhiyun			 * through mini PCIe slot on the board.
251*4882a593Smuzhiyun			 */
252*4882a593Smuzhiyun			pcie@2,0 {
253*4882a593Smuzhiyun				/* Port 1, Lane 0 */
254*4882a593Smuzhiyun				status = "okay";
255*4882a593Smuzhiyun			};
256*4882a593Smuzhiyun			pcie@3,0 {
257*4882a593Smuzhiyun				/* Port 2, Lane 0 */
258*4882a593Smuzhiyun				status = "okay";
259*4882a593Smuzhiyun			};
260*4882a593Smuzhiyun		};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun		gpio-fan {
263*4882a593Smuzhiyun			compatible = "gpio-fan";
264*4882a593Smuzhiyun			gpios = <&expander1 3 GPIO_ACTIVE_HIGH>;
265*4882a593Smuzhiyun			gpio-fan,speed-map = <	 0 0
266*4882a593Smuzhiyun					      3000 1>;
267*4882a593Smuzhiyun		};
268*4882a593Smuzhiyun	};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun	reg_usb3_vbus: usb3-vbus {
271*4882a593Smuzhiyun		compatible = "regulator-fixed";
272*4882a593Smuzhiyun		regulator-name = "usb3-vbus";
273*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
274*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
275*4882a593Smuzhiyun		enable-active-high;
276*4882a593Smuzhiyun		regulator-always-on;
277*4882a593Smuzhiyun		gpio = <&expander1 15 GPIO_ACTIVE_HIGH>;
278*4882a593Smuzhiyun	};
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun	reg_usb2_0_vbus: v5-vbus0 {
281*4882a593Smuzhiyun		compatible = "regulator-fixed";
282*4882a593Smuzhiyun		regulator-name = "v5.0-vbus0";
283*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
284*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
285*4882a593Smuzhiyun		enable-active-high;
286*4882a593Smuzhiyun		regulator-always-on;
287*4882a593Smuzhiyun		gpio = <&expander1 14 GPIO_ACTIVE_HIGH>;
288*4882a593Smuzhiyun	};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun	reg_usb2_1_vbus: v5-vbus1 {
291*4882a593Smuzhiyun		compatible = "regulator-fixed";
292*4882a593Smuzhiyun		regulator-name = "v5.0-vbus1";
293*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
294*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
295*4882a593Smuzhiyun		enable-active-high;
296*4882a593Smuzhiyun		regulator-always-on;
297*4882a593Smuzhiyun		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
298*4882a593Smuzhiyun	};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun	reg_usb2_1_vbus: v5-vbus1 {
301*4882a593Smuzhiyun		compatible = "regulator-fixed";
302*4882a593Smuzhiyun		regulator-name = "v5.0-vbus1";
303*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
304*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
305*4882a593Smuzhiyun		enable-active-high;
306*4882a593Smuzhiyun		regulator-always-on;
307*4882a593Smuzhiyun		gpio = <&expander0 4 GPIO_ACTIVE_HIGH>;
308*4882a593Smuzhiyun	};
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun	reg_sata0: pwr-sata0 {
311*4882a593Smuzhiyun		compatible = "regulator-fixed";
312*4882a593Smuzhiyun		regulator-name = "pwr_en_sata0";
313*4882a593Smuzhiyun		enable-active-high;
314*4882a593Smuzhiyun		regulator-always-on;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun	};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun	reg_5v_sata0: v5-sata0 {
319*4882a593Smuzhiyun		compatible = "regulator-fixed";
320*4882a593Smuzhiyun		regulator-name = "v5.0-sata0";
321*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
322*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
323*4882a593Smuzhiyun		regulator-always-on;
324*4882a593Smuzhiyun		vin-supply = <&reg_sata0>;
325*4882a593Smuzhiyun	};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun	reg_12v_sata0: v12-sata0 {
328*4882a593Smuzhiyun		compatible = "regulator-fixed";
329*4882a593Smuzhiyun		regulator-name = "v12.0-sata0";
330*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
331*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
332*4882a593Smuzhiyun		regulator-always-on;
333*4882a593Smuzhiyun		vin-supply = <&reg_sata0>;
334*4882a593Smuzhiyun	};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun	reg_sata1: pwr-sata1 {
337*4882a593Smuzhiyun		regulator-name = "pwr_en_sata1";
338*4882a593Smuzhiyun		compatible = "regulator-fixed";
339*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
340*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
341*4882a593Smuzhiyun		enable-active-high;
342*4882a593Smuzhiyun		regulator-always-on;
343*4882a593Smuzhiyun		gpio = <&expander0 3 GPIO_ACTIVE_HIGH>;
344*4882a593Smuzhiyun	};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun	reg_5v_sata1: v5-sata1 {
347*4882a593Smuzhiyun		compatible = "regulator-fixed";
348*4882a593Smuzhiyun		regulator-name = "v5.0-sata1";
349*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
350*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
351*4882a593Smuzhiyun		regulator-always-on;
352*4882a593Smuzhiyun		vin-supply = <&reg_sata1>;
353*4882a593Smuzhiyun	};
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun	reg_12v_sata1: v12-sata1 {
356*4882a593Smuzhiyun		compatible = "regulator-fixed";
357*4882a593Smuzhiyun		regulator-name = "v12.0-sata1";
358*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
359*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
360*4882a593Smuzhiyun		regulator-always-on;
361*4882a593Smuzhiyun		vin-supply = <&reg_sata1>;
362*4882a593Smuzhiyun	};
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun	reg_sata2: pwr-sata2 {
365*4882a593Smuzhiyun		compatible = "regulator-fixed";
366*4882a593Smuzhiyun		regulator-name = "pwr_en_sata2";
367*4882a593Smuzhiyun		enable-active-high;
368*4882a593Smuzhiyun		regulator-always-on;
369*4882a593Smuzhiyun		gpio = <&expander0 11 GPIO_ACTIVE_HIGH>;
370*4882a593Smuzhiyun	};
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun	reg_5v_sata2: v5-sata2 {
373*4882a593Smuzhiyun		compatible = "regulator-fixed";
374*4882a593Smuzhiyun		regulator-name = "v5.0-sata2";
375*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
376*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
377*4882a593Smuzhiyun		regulator-always-on;
378*4882a593Smuzhiyun		vin-supply = <&reg_sata2>;
379*4882a593Smuzhiyun	};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun	reg_12v_sata2: v12-sata2 {
382*4882a593Smuzhiyun		compatible = "regulator-fixed";
383*4882a593Smuzhiyun		regulator-name = "v12.0-sata2";
384*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
385*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
386*4882a593Smuzhiyun		regulator-always-on;
387*4882a593Smuzhiyun		vin-supply = <&reg_sata2>;
388*4882a593Smuzhiyun	};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun	reg_sata3: pwr-sata3 {
391*4882a593Smuzhiyun		compatible = "regulator-fixed";
392*4882a593Smuzhiyun		regulator-name = "pwr_en_sata3";
393*4882a593Smuzhiyun		enable-active-high;
394*4882a593Smuzhiyun		regulator-always-on;
395*4882a593Smuzhiyun		gpio = <&expander0 12 GPIO_ACTIVE_HIGH>;
396*4882a593Smuzhiyun	};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun	reg_5v_sata3: v5-sata3 {
399*4882a593Smuzhiyun		compatible = "regulator-fixed";
400*4882a593Smuzhiyun		regulator-name = "v5.0-sata3";
401*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
402*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
403*4882a593Smuzhiyun		regulator-always-on;
404*4882a593Smuzhiyun		vin-supply = <&reg_sata3>;
405*4882a593Smuzhiyun	};
406*4882a593Smuzhiyun
407*4882a593Smuzhiyun	reg_12v_sata3: v12-sata3 {
408*4882a593Smuzhiyun		compatible = "regulator-fixed";
409*4882a593Smuzhiyun		regulator-name = "v12.0-sata3";
410*4882a593Smuzhiyun		regulator-min-microvolt = <12000000>;
411*4882a593Smuzhiyun		regulator-max-microvolt = <12000000>;
412*4882a593Smuzhiyun		regulator-always-on;
413*4882a593Smuzhiyun		vin-supply = <&reg_sata3>;
414*4882a593Smuzhiyun	};
415*4882a593Smuzhiyun};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun&pinctrl {
418*4882a593Smuzhiyun	pca0_pins: pca0_pins {
419*4882a593Smuzhiyun		marvell,pins = "mpp18";
420*4882a593Smuzhiyun		marvell,function = "gpio";
421*4882a593Smuzhiyun	};
422*4882a593Smuzhiyun};
423