1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * PXA CPU information display
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <common.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <errno.h>
12*4882a593Smuzhiyun #include <linux/compiler.h>
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun #ifdef CONFIG_CPU_PXA25X
15*4882a593Smuzhiyun #if ((CONFIG_SYS_INIT_SP_ADDR) != 0xfffff800)
16*4882a593Smuzhiyun #error "Init SP address must be set to 0xfffff800 for PXA250"
17*4882a593Smuzhiyun #endif
18*4882a593Smuzhiyun #endif
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #define CPU_MASK_PXA_PRODID 0x000003f0
21*4882a593Smuzhiyun #define CPU_MASK_PXA_REVID 0x0000000f
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define CPU_MASK_PRODREV (CPU_MASK_PXA_PRODID | CPU_MASK_PXA_REVID)
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define CPU_VALUE_PXA25X 0x100
26*4882a593Smuzhiyun #define CPU_VALUE_PXA27X 0x110
27*4882a593Smuzhiyun
pxa_get_cpuid(void)28*4882a593Smuzhiyun static uint32_t pxa_get_cpuid(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun uint32_t cpuid;
31*4882a593Smuzhiyun asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r"(cpuid));
32*4882a593Smuzhiyun return cpuid;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
cpu_is_pxa25x(void)35*4882a593Smuzhiyun int cpu_is_pxa25x(void)
36*4882a593Smuzhiyun {
37*4882a593Smuzhiyun uint32_t id = pxa_get_cpuid();
38*4882a593Smuzhiyun id &= CPU_MASK_PXA_PRODID;
39*4882a593Smuzhiyun return id == CPU_VALUE_PXA25X;
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
cpu_is_pxa27x(void)42*4882a593Smuzhiyun int cpu_is_pxa27x(void)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun uint32_t id = pxa_get_cpuid();
45*4882a593Smuzhiyun id &= CPU_MASK_PXA_PRODID;
46*4882a593Smuzhiyun return id == CPU_VALUE_PXA27X;
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
cpu_is_pxa27xm(void)49*4882a593Smuzhiyun int cpu_is_pxa27xm(void)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun uint32_t id = pxa_get_cpuid();
52*4882a593Smuzhiyun return ((id & CPU_MASK_PXA_PRODID) == CPU_VALUE_PXA27X) &&
53*4882a593Smuzhiyun ((id & CPU_MASK_PXA_REVID) == 8);
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
pxa_get_cpu_revision(void)56*4882a593Smuzhiyun uint32_t pxa_get_cpu_revision(void)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun return pxa_get_cpuid() & CPU_MASK_PRODREV;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun #ifdef CONFIG_DISPLAY_CPUINFO
pxa25x_get_revision(void)62*4882a593Smuzhiyun static const char *pxa25x_get_revision(void)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun static __maybe_unused const char * const revs_25x[] = { "A0" };
65*4882a593Smuzhiyun static __maybe_unused const char * const revs_26x[] = {
66*4882a593Smuzhiyun "A0", "B0", "B1"
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun static const char *unknown = "Unknown";
69*4882a593Smuzhiyun uint32_t id;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (!cpu_is_pxa25x())
72*4882a593Smuzhiyun return unknown;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun id = pxa_get_cpuid() & CPU_MASK_PXA_REVID;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun /* PXA26x is a sick special case as it can't be told apart from PXA25x :-( */
77*4882a593Smuzhiyun #ifdef CONFIG_CPU_PXA26X
78*4882a593Smuzhiyun switch (id) {
79*4882a593Smuzhiyun case 3: return revs_26x[0];
80*4882a593Smuzhiyun case 5: return revs_26x[1];
81*4882a593Smuzhiyun case 6: return revs_26x[2];
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun #else
84*4882a593Smuzhiyun if (id == 6)
85*4882a593Smuzhiyun return revs_25x[0];
86*4882a593Smuzhiyun #endif
87*4882a593Smuzhiyun return unknown;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun
pxa27x_get_revision(void)90*4882a593Smuzhiyun static const char *pxa27x_get_revision(void)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun static const char *const rev[] = { "A0", "A1", "B0", "B1", "C0", "C5" };
93*4882a593Smuzhiyun static const char *unknown = "Unknown";
94*4882a593Smuzhiyun uint32_t id;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (!cpu_is_pxa27x())
97*4882a593Smuzhiyun return unknown;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun id = pxa_get_cpuid() & CPU_MASK_PXA_REVID;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun if ((id == 5) || (id == 6) || (id > 8))
102*4882a593Smuzhiyun return unknown;
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* Cap the special PXA270 C5 case. */
105*4882a593Smuzhiyun if (id == 7)
106*4882a593Smuzhiyun id = 5;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* Cap the special PXA270M A1 case. */
109*4882a593Smuzhiyun if (id == 8)
110*4882a593Smuzhiyun id = 1;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun return rev[id];
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun
print_cpuinfo_pxa2xx(void)115*4882a593Smuzhiyun static int print_cpuinfo_pxa2xx(void)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun if (cpu_is_pxa25x()) {
118*4882a593Smuzhiyun puts("Marvell PXA25x rev. ");
119*4882a593Smuzhiyun puts(pxa25x_get_revision());
120*4882a593Smuzhiyun } else if (cpu_is_pxa27x()) {
121*4882a593Smuzhiyun puts("Marvell PXA27x");
122*4882a593Smuzhiyun if (cpu_is_pxa27xm()) puts("M");
123*4882a593Smuzhiyun puts(" rev. ");
124*4882a593Smuzhiyun puts(pxa27x_get_revision());
125*4882a593Smuzhiyun } else
126*4882a593Smuzhiyun return -EINVAL;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun puts("\n");
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun return 0;
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
print_cpuinfo(void)133*4882a593Smuzhiyun int print_cpuinfo(void)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun int ret;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun puts("CPU: ");
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun ret = print_cpuinfo_pxa2xx();
140*4882a593Smuzhiyun if (!ret)
141*4882a593Smuzhiyun return ret;
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun return ret;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun #endif
146