xref: /OK3568_Linux_fs/u-boot/arch/arm/cpu/armv8/smccc-call.S (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (c) 2015, Linaro Limited
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun#include <linux/linkage.h>
7*4882a593Smuzhiyun#include <linux/arm-smccc.h>
8*4882a593Smuzhiyun#include <generated/asm-offsets.h>
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun	.macro SMCCC instr
11*4882a593Smuzhiyun	.cfi_startproc
12*4882a593Smuzhiyun	\instr	#0
13*4882a593Smuzhiyun	ldr	x4, [sp]
14*4882a593Smuzhiyun	stp	x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS]
15*4882a593Smuzhiyun	stp	x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS]
16*4882a593Smuzhiyun	ldr	x4, [sp, #8]
17*4882a593Smuzhiyun	cbz	x4, 1f /* no quirk structure */
18*4882a593Smuzhiyun	ldr	x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS]
19*4882a593Smuzhiyun	cmp	x9, #ARM_SMCCC_QUIRK_QCOM_A6
20*4882a593Smuzhiyun	b.ne	1f
21*4882a593Smuzhiyun	str	x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS]
22*4882a593Smuzhiyun1:	ret
23*4882a593Smuzhiyun	.cfi_endproc
24*4882a593Smuzhiyun	.endm
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun/*
27*4882a593Smuzhiyun * void arm_smccc_smc(unsigned long a0, unsigned long a1, unsigned long a2,
28*4882a593Smuzhiyun *		  unsigned long a3, unsigned long a4, unsigned long a5,
29*4882a593Smuzhiyun *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
30*4882a593Smuzhiyun *		  struct arm_smccc_quirk *quirk)
31*4882a593Smuzhiyun */
32*4882a593SmuzhiyunENTRY(__arm_smccc_smc)
33*4882a593Smuzhiyun	SMCCC	smc
34*4882a593SmuzhiyunENDPROC(__arm_smccc_smc)
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun/*
37*4882a593Smuzhiyun * void arm_smccc_hvc(unsigned long a0, unsigned long a1, unsigned long a2,
38*4882a593Smuzhiyun *		  unsigned long a3, unsigned long a4, unsigned long a5,
39*4882a593Smuzhiyun *		  unsigned long a6, unsigned long a7, struct arm_smccc_res *res,
40*4882a593Smuzhiyun *		  struct arm_smccc_quirk *quirk)
41*4882a593Smuzhiyun */
42*4882a593SmuzhiyunENTRY(__arm_smccc_hvc)
43*4882a593Smuzhiyun	SMCCC	hvc
44*4882a593SmuzhiyunENDPROC(__arm_smccc_hvc)
45