1 /*
2 * Copyright 2016 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7 #include <common.h>
8 #include <asm/arch/fsl_serdes.h>
9 #include <asm/arch/immap_lsch2.h>
10
11 struct serdes_config {
12 u32 protocol;
13 u8 lanes[SRDS_MAX_LANES];
14 };
15
16 static struct serdes_config serdes1_cfg_tbl[] = {
17 {0x2208, {SGMII_2500_FM1_DTSEC1, SGMII_2500_FM1_DTSEC2, NONE, SATA1} },
18 {0x0008, {NONE, NONE, NONE, SATA1} },
19 {0x3508, {SGMII_FM1_DTSEC1, PCIE1, NONE, SATA1} },
20 {0x3305, {SGMII_FM1_DTSEC1, SGMII_FM1_DTSEC2, NONE, PCIE1} },
21 {0x2205, {SGMII_2500_FM1_DTSEC1, SGMII_2500_FM1_DTSEC2, NONE, PCIE1} },
22 {0x2305, {SGMII_2500_FM1_DTSEC1, SGMII_FM1_DTSEC2, NONE, PCIE1} },
23 {0x9508, {TX_CLK, PCIE1, NONE, SATA1} },
24 {0x3905, {SGMII_FM1_DTSEC1, TX_CLK, NONE, PCIE1} },
25 {0x9305, {TX_CLK, SGMII_FM1_DTSEC2, NONE, PCIE1} },
26 {}
27 };
28
29 static struct serdes_config *serdes_cfg_tbl[] = {
30 serdes1_cfg_tbl,
31 };
32
serdes_get_prtcl(int serdes,int cfg,int lane)33 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
34 {
35 struct serdes_config *ptr;
36
37 if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
38 return 0;
39
40 ptr = serdes_cfg_tbl[serdes];
41 while (ptr->protocol) {
42 if (ptr->protocol == cfg)
43 return ptr->lanes[lane];
44 ptr++;
45 }
46
47 return 0;
48 }
49
is_serdes_prtcl_valid(int serdes,u32 prtcl)50 int is_serdes_prtcl_valid(int serdes, u32 prtcl)
51 {
52 int i;
53 struct serdes_config *ptr;
54
55 if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
56 return 0;
57
58 ptr = serdes_cfg_tbl[serdes];
59 while (ptr->protocol) {
60 if (ptr->protocol == prtcl)
61 break;
62 ptr++;
63 }
64
65 if (!ptr->protocol)
66 return 0;
67
68 for (i = 0; i < SRDS_MAX_LANES; i++) {
69 if (ptr->lanes[i] != NONE)
70 return 1;
71 }
72
73 return 0;
74 }
75