1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# Copyright 2014-2015, Freescale Semiconductor 3*4882a593Smuzhiyun# 4*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 5*4882a593Smuzhiyun# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunobj-y += cpu.o 8*4882a593Smuzhiyunobj-y += lowlevel.o 9*4882a593Smuzhiyunobj-y += soc.o 10*4882a593Smuzhiyunobj-$(CONFIG_MP) += mp.o 11*4882a593Smuzhiyunobj-$(CONFIG_OF_LIBFDT) += fdt.o 12*4882a593Smuzhiyunobj-$(CONFIG_SPL) += spl.o 13*4882a593Smuzhiyunobj-$(CONFIG_$(SPL_)FSL_LS_PPA) += ppa.o 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunifneq ($(CONFIG_FSL_LSCH3),) 16*4882a593Smuzhiyunobj-y += fsl_lsch3_speed.o 17*4882a593Smuzhiyunobj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch3_serdes.o 18*4882a593Smuzhiyunelse 19*4882a593Smuzhiyunifneq ($(CONFIG_FSL_LSCH2),) 20*4882a593Smuzhiyunobj-y += fsl_lsch2_speed.o 21*4882a593Smuzhiyunobj-$(CONFIG_SYS_HAS_SERDES) += fsl_lsch2_serdes.o 22*4882a593Smuzhiyunendif 23*4882a593Smuzhiyunendif 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunifneq ($(CONFIG_ARCH_LS2080A),) 26*4882a593Smuzhiyunobj-$(CONFIG_SYS_HAS_SERDES) += ls2080a_serdes.o 27*4882a593Smuzhiyunendif 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunifneq ($(CONFIG_ARCH_LS1043A),) 30*4882a593Smuzhiyunobj-$(CONFIG_SYS_HAS_SERDES) += ls1043a_serdes.o 31*4882a593Smuzhiyunobj-$(CONFIG_ARMV8_PSCI) += ls1043a_psci.o 32*4882a593Smuzhiyunendif 33*4882a593Smuzhiyun 34*4882a593Smuzhiyunifneq ($(CONFIG_ARCH_LS1012A),) 35*4882a593Smuzhiyunobj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o 36*4882a593Smuzhiyunendif 37*4882a593Smuzhiyun 38*4882a593Smuzhiyunifneq ($(CONFIG_ARCH_LS1046A),) 39*4882a593Smuzhiyunobj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o 40*4882a593Smuzhiyunendif 41