1*4882a593Smuzhiyun# 2*4882a593Smuzhiyun# (C) Copyright 2000-2003 3*4882a593Smuzhiyun# Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4*4882a593Smuzhiyun# 5*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun# 7*4882a593Smuzhiyun 8*4882a593Smuzhiyunextra-y := start.o 9*4882a593Smuzhiyun 10*4882a593Smuzhiyunobj-y += cpu.o 11*4882a593Smuzhiyunifndef CONFIG_$(SPL_TPL_)TIMER 12*4882a593Smuzhiyunobj-y += generic_timer.o 13*4882a593Smuzhiyunendif 14*4882a593Smuzhiyunobj-y += cache_v8.o 15*4882a593Smuzhiyunobj-y += exceptions.o 16*4882a593Smuzhiyunobj-y += cache.o 17*4882a593Smuzhiyunobj-y += tlb.o 18*4882a593Smuzhiyunobj-y += transition.o 19*4882a593Smuzhiyunobj-y += fwcall.o 20*4882a593Smuzhiyunobj-y += cpu-dt.o 21*4882a593Smuzhiyun 22*4882a593Smuzhiyunobj-$(CONFIG_ARM_SMCCC) += smccc-call.o 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) 25*4882a593Smuzhiyunobj-$(CONFIG_ARM_CPU_SUSPEND) += ../armv7/suspend.o sleep.o 26*4882a593Smuzhiyunendif 27*4882a593Smuzhiyun 28*4882a593Smuzhiyunifndef CONFIG_SPL_BUILD 29*4882a593Smuzhiyunobj-$(CONFIG_ARMV8_SPIN_TABLE) += spin_table.o spin_table_v8.o 30*4882a593Smuzhiyunendif 31*4882a593Smuzhiyunobj-$(CONFIG_$(SPL_)ARMV8_SEC_FIRMWARE_SUPPORT) += sec_firmware.o sec_firmware_asm.o 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunobj-$(CONFIG_FSL_LAYERSCAPE) += fsl-layerscape/ 34*4882a593Smuzhiyunobj-$(CONFIG_S32V234) += s32v234/ 35*4882a593Smuzhiyunobj-$(CONFIG_ARCH_ZYNQMP) += zynqmp/ 36*4882a593Smuzhiyunobj-$(CONFIG_TARGET_HIKEY) += hisilicon/ 37*4882a593Smuzhiyunobj-$(CONFIG_ARMV8_PSCI) += psci.o 38*4882a593Smuzhiyunobj-$(CONFIG_ARCH_SUNXI) += lowlevel_init.o 39*4882a593Smuzhiyunobj-$(CONFIG_ARMV8_CE_SHA1) += sha1_ce_glue.o sha1_ce_core.o 40*4882a593Smuzhiyunobj-$(CONFIG_ARMV8_CE_SHA256) += sha256_ce_glue.o sha256_ce_core.o 41