1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * (C) Copyright 2010,2011 3*4882a593Smuzhiyun * Vladimir Khusainov, Emcraft Systems, vlad@emcraft.com 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * (C) Copyright 2015 6*4882a593Smuzhiyun * Kamil Lulko, <kamil.lulko@gmail.com> 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #include <common.h> 12*4882a593Smuzhiyun #include <asm/io.h> 13*4882a593Smuzhiyun #include <asm/armv7m.h> 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * This is called right before passing control to 17*4882a593Smuzhiyun * the Linux kernel point. 18*4882a593Smuzhiyun */ cleanup_before_linux(void)19*4882a593Smuzhiyunint cleanup_before_linux(void) 20*4882a593Smuzhiyun { 21*4882a593Smuzhiyun /* 22*4882a593Smuzhiyun * this function is called just before we call linux 23*4882a593Smuzhiyun * it prepares the processor for linux 24*4882a593Smuzhiyun * 25*4882a593Smuzhiyun * disable interrupt and turn off caches etc ... 26*4882a593Smuzhiyun */ 27*4882a593Smuzhiyun disable_interrupts(); 28*4882a593Smuzhiyun /* 29*4882a593Smuzhiyun * turn off D-cache 30*4882a593Smuzhiyun * dcache_disable() in turn flushes the d-cache 31*4882a593Smuzhiyun * MPU is still enabled & can't be disabled as the u-boot 32*4882a593Smuzhiyun * code might be running in sdram which by default is not 33*4882a593Smuzhiyun * executable area. 34*4882a593Smuzhiyun */ 35*4882a593Smuzhiyun dcache_disable(); 36*4882a593Smuzhiyun /* invalidate to make sure no cache line gets dirty between 37*4882a593Smuzhiyun * dcache flushing and disabling dcache */ 38*4882a593Smuzhiyun invalidate_dcache_all(); 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun return 0; 41*4882a593Smuzhiyun } 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun /* 44*4882a593Smuzhiyun * Perform the low-level reset. 45*4882a593Smuzhiyun */ reset_cpu(ulong addr)46*4882a593Smuzhiyunvoid reset_cpu(ulong addr) 47*4882a593Smuzhiyun { 48*4882a593Smuzhiyun /* 49*4882a593Smuzhiyun * Perform reset but keep priority group unchanged. 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun writel((V7M_AIRCR_VECTKEY << V7M_AIRCR_VECTKEY_SHIFT) 52*4882a593Smuzhiyun | (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK) 53*4882a593Smuzhiyun | V7M_AIRCR_SYSRESET, &V7M_SCB->aircr); 54*4882a593Smuzhiyun } 55