1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2015 Texas Insturments
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun /*
8*4882a593Smuzhiyun * CP15 specific code
9*4882a593Smuzhiyun */
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include <common.h>
12*4882a593Smuzhiyun #include <command.h>
13*4882a593Smuzhiyun #include <asm/system.h>
14*4882a593Smuzhiyun #include <asm/cache.h>
15*4882a593Smuzhiyun #include <asm/armv7.h>
16*4882a593Smuzhiyun #include <linux/compiler.h>
17*4882a593Smuzhiyun
v7_arch_cp15_set_l2aux_ctrl(u32 l2actlr,u32 cpu_midr,u32 cpu_rev_comb,u32 cpu_variant,u32 cpu_rev)18*4882a593Smuzhiyun void __weak v7_arch_cp15_set_l2aux_ctrl(u32 l2actlr, u32 cpu_midr,
19*4882a593Smuzhiyun u32 cpu_rev_comb, u32 cpu_variant,
20*4882a593Smuzhiyun u32 cpu_rev)
21*4882a593Smuzhiyun {
22*4882a593Smuzhiyun asm volatile ("mcr p15, 1, %0, c15, c0, 0\n\t" : : "r"(l2actlr));
23*4882a593Smuzhiyun }
24*4882a593Smuzhiyun
v7_arch_cp15_set_acr(u32 acr,u32 cpu_midr,u32 cpu_rev_comb,u32 cpu_variant,u32 cpu_rev)25*4882a593Smuzhiyun void __weak v7_arch_cp15_set_acr(u32 acr, u32 cpu_midr, u32 cpu_rev_comb,
26*4882a593Smuzhiyun u32 cpu_variant, u32 cpu_rev)
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun asm volatile ("mcr p15, 0, %0, c1, c0, 1\n\t" : : "r"(acr));
29*4882a593Smuzhiyun }
30