xref: /OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/bcm281xx/clk-sdio.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright 2013 Broadcom Corporation.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * SPDX-License-Identifier:      GPL-2.0+
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <asm/io.h>
9*4882a593Smuzhiyun #include <linux/errno.h>
10*4882a593Smuzhiyun #include <asm/arch/sysmap.h>
11*4882a593Smuzhiyun #include <asm/kona-common/clk.h>
12*4882a593Smuzhiyun #include "clk-core.h"
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun /* Enable appropriate clocks for an SDIO port */
clk_sdio_enable(void * base,u32 rate,u32 * actual_ratep)15*4882a593Smuzhiyun int clk_sdio_enable(void *base, u32 rate, u32 *actual_ratep)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun 	int ret;
18*4882a593Smuzhiyun 	struct clk *c;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun 	char *clkstr;
21*4882a593Smuzhiyun 	char *slpstr;
22*4882a593Smuzhiyun 	char *ahbstr;
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	switch ((u32) base) {
25*4882a593Smuzhiyun 	case CONFIG_SYS_SDIO_BASE0:
26*4882a593Smuzhiyun 		clkstr = CONFIG_SYS_SDIO0 "_clk";
27*4882a593Smuzhiyun 		ahbstr = CONFIG_SYS_SDIO0 "_ahb_clk";
28*4882a593Smuzhiyun 		slpstr = CONFIG_SYS_SDIO0 "_sleep_clk";
29*4882a593Smuzhiyun 		break;
30*4882a593Smuzhiyun 	case CONFIG_SYS_SDIO_BASE1:
31*4882a593Smuzhiyun 		clkstr = CONFIG_SYS_SDIO1 "_clk";
32*4882a593Smuzhiyun 		ahbstr = CONFIG_SYS_SDIO1 "_ahb_clk";
33*4882a593Smuzhiyun 		slpstr = CONFIG_SYS_SDIO1 "_sleep_clk";
34*4882a593Smuzhiyun 		break;
35*4882a593Smuzhiyun 	case CONFIG_SYS_SDIO_BASE2:
36*4882a593Smuzhiyun 		clkstr = CONFIG_SYS_SDIO2 "_clk";
37*4882a593Smuzhiyun 		ahbstr = CONFIG_SYS_SDIO2 "_ahb_clk";
38*4882a593Smuzhiyun 		slpstr = CONFIG_SYS_SDIO2 "_sleep_clk";
39*4882a593Smuzhiyun 		break;
40*4882a593Smuzhiyun 	case CONFIG_SYS_SDIO_BASE3:
41*4882a593Smuzhiyun 		clkstr = CONFIG_SYS_SDIO3 "_clk";
42*4882a593Smuzhiyun 		ahbstr = CONFIG_SYS_SDIO3 "_ahb_clk";
43*4882a593Smuzhiyun 		slpstr = CONFIG_SYS_SDIO3 "_sleep_clk";
44*4882a593Smuzhiyun 		break;
45*4882a593Smuzhiyun 	default:
46*4882a593Smuzhiyun 		printf("%s: base 0x%p not found\n", __func__, base);
47*4882a593Smuzhiyun 		return -EINVAL;
48*4882a593Smuzhiyun 	}
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 	ret = clk_get_and_enable(ahbstr);
51*4882a593Smuzhiyun 	if (ret)
52*4882a593Smuzhiyun 		return ret;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	ret = clk_get_and_enable(slpstr);
55*4882a593Smuzhiyun 	if (ret)
56*4882a593Smuzhiyun 		return ret;
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	c = clk_get(clkstr);
59*4882a593Smuzhiyun 	if (c) {
60*4882a593Smuzhiyun 		ret = clk_set_rate(c, rate);
61*4882a593Smuzhiyun 		if (ret)
62*4882a593Smuzhiyun 			return ret;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 		ret = clk_enable(c);
65*4882a593Smuzhiyun 		if (ret)
66*4882a593Smuzhiyun 			return ret;
67*4882a593Smuzhiyun 	} else {
68*4882a593Smuzhiyun 		printf("%s: Couldn't find %s\n", __func__, clkstr);
69*4882a593Smuzhiyun 		return -EINVAL;
70*4882a593Smuzhiyun 	}
71*4882a593Smuzhiyun 	*actual_ratep = rate;
72*4882a593Smuzhiyun 	return 0;
73*4882a593Smuzhiyun }
74