1*4882a593Smuzhiyunif CPU_V7 2*4882a593Smuzhiyun 3*4882a593Smuzhiyunconfig CPU_V7_HAS_NONSEC 4*4882a593Smuzhiyun bool 5*4882a593Smuzhiyun 6*4882a593Smuzhiyunconfig CPU_V7_HAS_VIRT 7*4882a593Smuzhiyun bool 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunconfig ARCH_SUPPORT_PSCI 10*4882a593Smuzhiyun bool 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunconfig ARMV7_NONSEC 13*4882a593Smuzhiyun bool "Enable support for booting in non-secure mode" if EXPERT 14*4882a593Smuzhiyun depends on CPU_V7_HAS_NONSEC 15*4882a593Smuzhiyun default y 16*4882a593Smuzhiyun ---help--- 17*4882a593Smuzhiyun Say Y here to enable support for booting in non-secure / SVC mode. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyunconfig ARMV7_BOOT_SEC_DEFAULT 20*4882a593Smuzhiyun bool "Boot in secure mode by default" if EXPERT 21*4882a593Smuzhiyun depends on ARMV7_NONSEC 22*4882a593Smuzhiyun default y if TEGRA 23*4882a593Smuzhiyun ---help--- 24*4882a593Smuzhiyun Say Y here to boot in secure mode by default even if non-secure mode 25*4882a593Smuzhiyun is supported. This option is useful to boot kernels which do not 26*4882a593Smuzhiyun suppport booting in non-secure mode. Only set this if you need it. 27*4882a593Smuzhiyun This can be overridden at run-time by setting the bootm_boot_mode env. 28*4882a593Smuzhiyun variable to "sec" or "nonsec". 29*4882a593Smuzhiyun 30*4882a593Smuzhiyunconfig ARMV7_VIRT 31*4882a593Smuzhiyun bool "Enable support for hardware virtualization" if EXPERT 32*4882a593Smuzhiyun depends on CPU_V7_HAS_VIRT && ARMV7_NONSEC 33*4882a593Smuzhiyun default y 34*4882a593Smuzhiyun ---help--- 35*4882a593Smuzhiyun Say Y here to boot in hypervisor (HYP) mode when booting non-secure. 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunconfig ARMV7_PSCI 38*4882a593Smuzhiyun bool "Enable PSCI support" if EXPERT 39*4882a593Smuzhiyun depends on ARMV7_NONSEC && ARCH_SUPPORT_PSCI 40*4882a593Smuzhiyun default y 41*4882a593Smuzhiyun help 42*4882a593Smuzhiyun Say Y here to enable PSCI support. 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunconfig ARMV7_PSCI_NR_CPUS 45*4882a593Smuzhiyun int "Maximum supported CPUs for PSCI" 46*4882a593Smuzhiyun depends on ARMV7_NONSEC 47*4882a593Smuzhiyun default 4 48*4882a593Smuzhiyun help 49*4882a593Smuzhiyun The maximum number of CPUs supported in the PSCI firmware. 50*4882a593Smuzhiyun It is no problem to set a larger value than the number of 51*4882a593Smuzhiyun CPUs in the actual hardware implementation. 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunconfig ARMV7_LPAE 54*4882a593Smuzhiyun bool "Use LPAE page table format" if EXPERT 55*4882a593Smuzhiyun depends on CPU_V7 56*4882a593Smuzhiyun default n 57*4882a593Smuzhiyun ---help--- 58*4882a593Smuzhiyun Say Y here to use the long descriptor page table format. This is 59*4882a593Smuzhiyun required if U-Boot runs in HYP mode. 60*4882a593Smuzhiyun 61*4882a593Smuzhiyunendif 62