1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2002
3*4882a593Smuzhiyun * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4*4882a593Smuzhiyun * Marius Groeger <mgroeger@sysgo.de>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * (C) Copyright 2002
7*4882a593Smuzhiyun * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
8*4882a593Smuzhiyun *
9*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun /*
13*4882a593Smuzhiyun * CPU specific code
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <common.h>
17*4882a593Smuzhiyun #include <command.h>
18*4882a593Smuzhiyun #include <asm/system.h>
19*4882a593Smuzhiyun #include <asm/io.h>
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun static void cache_flush(void);
22*4882a593Smuzhiyun
cleanup_before_linux(void)23*4882a593Smuzhiyun int cleanup_before_linux (void)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun /*
26*4882a593Smuzhiyun * this function is called just before we call linux
27*4882a593Smuzhiyun * it prepares the processor for linux
28*4882a593Smuzhiyun *
29*4882a593Smuzhiyun * we turn off caches etc ...
30*4882a593Smuzhiyun */
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun disable_interrupts ();
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* ARM926E-S needs the protection unit enabled for the icache to have
35*4882a593Smuzhiyun * been enabled - left for possible later use
36*4882a593Smuzhiyun * should turn off the protection unit as well....
37*4882a593Smuzhiyun */
38*4882a593Smuzhiyun /* turn off I/D-cache */
39*4882a593Smuzhiyun icache_disable();
40*4882a593Smuzhiyun dcache_disable();
41*4882a593Smuzhiyun /* flush I/D-cache */
42*4882a593Smuzhiyun cache_flush();
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun return 0;
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* flush I/D-cache */
cache_flush(void)48*4882a593Smuzhiyun static void cache_flush (void)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun unsigned long i = 0;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun asm ("mcr p15, 0, %0, c7, c5, 0": :"r" (i));
53*4882a593Smuzhiyun asm ("mcr p15, 0, %0, c7, c6, 0": :"r" (i));
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #ifndef CONFIG_ARCH_INTEGRATOR
57*4882a593Smuzhiyun
reset_cpu(ulong addr)58*4882a593Smuzhiyun __attribute__((noreturn)) void reset_cpu(ulong addr __attribute__((unused)))
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun writew(0x0, 0xfffece10);
61*4882a593Smuzhiyun writew(0x8, 0xfffece10);
62*4882a593Smuzhiyun for (;;)
63*4882a593Smuzhiyun ;
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #endif /* #ifdef CONFIG_ARCH_INTEGRATOR */
67