xref: /OK3568_Linux_fs/u-boot/arch/arm/cpu/arm926ejs/spear/timer.c (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * (C) Copyright 2009
3*4882a593Smuzhiyun  * Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * SPDX-License-Identifier:	GPL-2.0+
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #include <common.h>
9*4882a593Smuzhiyun #include <asm/io.h>
10*4882a593Smuzhiyun #include <asm/arch/hardware.h>
11*4882a593Smuzhiyun #include <asm/arch/spr_gpt.h>
12*4882a593Smuzhiyun #include <asm/arch/spr_misc.h>
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #define GPT_RESOLUTION	(CONFIG_SPEAR_HZ_CLOCK / CONFIG_SPEAR_HZ)
15*4882a593Smuzhiyun #define READ_TIMER()	(readl(&gpt_regs_p->count) & GPT_FREE_RUNNING)
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun static struct gpt_regs *const gpt_regs_p =
18*4882a593Smuzhiyun     (struct gpt_regs *)CONFIG_SPEAR_TIMERBASE;
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun static struct misc_regs *const misc_regs_p =
21*4882a593Smuzhiyun     (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #define timestamp gd->arch.tbl
26*4882a593Smuzhiyun #define lastdec gd->arch.lastinc
27*4882a593Smuzhiyun 
timer_init(void)28*4882a593Smuzhiyun int timer_init(void)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	u32 synth;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	/* Prescaler setting */
33*4882a593Smuzhiyun #if defined(CONFIG_SPEAR3XX)
34*4882a593Smuzhiyun 	writel(MISC_PRSC_CFG, &misc_regs_p->prsc2_clk_cfg);
35*4882a593Smuzhiyun 	synth = MISC_GPT4SYNTH;
36*4882a593Smuzhiyun #elif defined(CONFIG_SPEAR600)
37*4882a593Smuzhiyun 	writel(MISC_PRSC_CFG, &misc_regs_p->prsc1_clk_cfg);
38*4882a593Smuzhiyun 	synth = MISC_GPT3SYNTH;
39*4882a593Smuzhiyun #else
40*4882a593Smuzhiyun # error Incorrect config. Can only be SPEAR{600|300|310|320}
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	writel(readl(&misc_regs_p->periph_clk_cfg) | synth,
44*4882a593Smuzhiyun 	       &misc_regs_p->periph_clk_cfg);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	/* disable timers */
47*4882a593Smuzhiyun 	writel(GPT_PRESCALER_1 | GPT_MODE_AUTO_RELOAD, &gpt_regs_p->control);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	/* load value for free running */
50*4882a593Smuzhiyun 	writel(GPT_FREE_RUNNING, &gpt_regs_p->compare);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	/* auto reload, start timer */
53*4882a593Smuzhiyun 	writel(readl(&gpt_regs_p->control) | GPT_ENABLE, &gpt_regs_p->control);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	/* Reset the timer */
56*4882a593Smuzhiyun 	lastdec = READ_TIMER();
57*4882a593Smuzhiyun 	timestamp = 0;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	return 0;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun /*
63*4882a593Smuzhiyun  * timer without interrupts
64*4882a593Smuzhiyun  */
get_timer(ulong base)65*4882a593Smuzhiyun ulong get_timer(ulong base)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	return (get_timer_masked() / GPT_RESOLUTION) - base;
68*4882a593Smuzhiyun }
69*4882a593Smuzhiyun 
__udelay(unsigned long usec)70*4882a593Smuzhiyun void __udelay(unsigned long usec)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun 	ulong tmo;
73*4882a593Smuzhiyun 	ulong start = get_timer_masked();
74*4882a593Smuzhiyun 	ulong tenudelcnt = CONFIG_SPEAR_HZ_CLOCK / (1000 * 100);
75*4882a593Smuzhiyun 	ulong rndoff;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	rndoff = (usec % 10) ? 1 : 0;
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	/* tenudelcnt timer tick gives 10 microsecconds delay */
80*4882a593Smuzhiyun 	tmo = ((usec / 10) + rndoff) * tenudelcnt;
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	while ((ulong) (get_timer_masked() - start) < tmo)
83*4882a593Smuzhiyun 		;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
get_timer_masked(void)86*4882a593Smuzhiyun ulong get_timer_masked(void)
87*4882a593Smuzhiyun {
88*4882a593Smuzhiyun 	ulong now = READ_TIMER();
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	if (now >= lastdec) {
91*4882a593Smuzhiyun 		/* normal mode */
92*4882a593Smuzhiyun 		timestamp += now - lastdec;
93*4882a593Smuzhiyun 	} else {
94*4882a593Smuzhiyun 		/* we have an overflow ... */
95*4882a593Smuzhiyun 		timestamp += now + GPT_FREE_RUNNING - lastdec;
96*4882a593Smuzhiyun 	}
97*4882a593Smuzhiyun 	lastdec = now;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	return timestamp;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun 
udelay_masked(unsigned long usec)102*4882a593Smuzhiyun void udelay_masked(unsigned long usec)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun 	return udelay(usec);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun /*
108*4882a593Smuzhiyun  * This function is derived from PowerPC code (read timebase as long long).
109*4882a593Smuzhiyun  * On ARM it just returns the timer value.
110*4882a593Smuzhiyun  */
get_ticks(void)111*4882a593Smuzhiyun unsigned long long get_ticks(void)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	return get_timer(0);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /*
117*4882a593Smuzhiyun  * This function is derived from PowerPC code (timebase clock frequency).
118*4882a593Smuzhiyun  * On ARM it returns the number of timer ticks per second.
119*4882a593Smuzhiyun  */
get_tbclk(void)120*4882a593Smuzhiyun ulong get_tbclk(void)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	return CONFIG_SPEAR_HZ;
123*4882a593Smuzhiyun }
124