1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * armboot - Startup Code for ARM926EJS CPU-core 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2003 Texas Instruments 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * ----- Adapted for OMAP1610 OMAP730 from ARM925t code ------ 7*4882a593Smuzhiyun * 8*4882a593Smuzhiyun * Copyright (c) 2001 Marius Groger <mag@sysgo.de> 9*4882a593Smuzhiyun * Copyright (c) 2002 Alex Zupke <azu@sysgo.de> 10*4882a593Smuzhiyun * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 11*4882a593Smuzhiyun * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 12*4882a593Smuzhiyun * Copyright (c) 2003 Kshitij <kshitij@ti.com> 13*4882a593Smuzhiyun * Copyright (c) 2010 Albert Aribaud <albert.u.boot@aribaud.net> 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * Change to support call back into iMX28 bootrom 16*4882a593Smuzhiyun * Copyright (c) 2011 Marek Vasut <marek.vasut@gmail.com> 17*4882a593Smuzhiyun * on behalf of DENX Software Engineering GmbH 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 20*4882a593Smuzhiyun */ 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun#include <asm-offsets.h> 23*4882a593Smuzhiyun#include <config.h> 24*4882a593Smuzhiyun#include <common.h> 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun/* 27*4882a593Smuzhiyun ************************************************************************* 28*4882a593Smuzhiyun * 29*4882a593Smuzhiyun * Startup Code (reset vector) 30*4882a593Smuzhiyun * 31*4882a593Smuzhiyun * do important init only if we don't start from memory! 32*4882a593Smuzhiyun * setup Memory and board specific bits prior to relocation. 33*4882a593Smuzhiyun * relocate armboot to ram 34*4882a593Smuzhiyun * setup stack 35*4882a593Smuzhiyun * 36*4882a593Smuzhiyun ************************************************************************* 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun .globl reset 40*4882a593Smuzhiyunreset: 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * If the CPU is configured in "Wait JTAG connection mode", the stack 43*4882a593Smuzhiyun * pointer is not configured and is zero. This will cause crash when 44*4882a593Smuzhiyun * trying to push data onto stack right below here. Load the SP and make 45*4882a593Smuzhiyun * it point to the end of OCRAM if the SP is zero. 46*4882a593Smuzhiyun */ 47*4882a593Smuzhiyun cmp sp, #0x00000000 48*4882a593Smuzhiyun ldreq sp, =CONFIG_SYS_INIT_SP_ADDR 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun /* 51*4882a593Smuzhiyun * Store all registers on old stack pointer, this will allow us later to 52*4882a593Smuzhiyun * return to the BootROM and let the BootROM load U-Boot into RAM. 53*4882a593Smuzhiyun * 54*4882a593Smuzhiyun * WARNING: Register r0 and r1 are used by the BootROM to pass data 55*4882a593Smuzhiyun * to the called code. Register r0 will contain arbitrary 56*4882a593Smuzhiyun * data that are set in the BootStream. In case this code 57*4882a593Smuzhiyun * was started with CALL instruction, register r1 will contain 58*4882a593Smuzhiyun * pointer to the return value this function can then set. 59*4882a593Smuzhiyun * The code below MUST NOT CHANGE register r0 and r1 ! 60*4882a593Smuzhiyun */ 61*4882a593Smuzhiyun push {r0-r12,r14} 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun /* Save control register c1 */ 64*4882a593Smuzhiyun mrc p15, 0, r2, c1, c0, 0 65*4882a593Smuzhiyun push {r2} 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun /* Set the cpu to SVC32 mode and store old CPSR register content. */ 68*4882a593Smuzhiyun mrs r2, cpsr 69*4882a593Smuzhiyun push {r2} 70*4882a593Smuzhiyun bic r2, r2, #0x1f 71*4882a593Smuzhiyun orr r2, r2, #0xd3 72*4882a593Smuzhiyun msr cpsr, r2 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun bl board_init_ll 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* Restore BootROM's CPU mode (especially FIQ). */ 77*4882a593Smuzhiyun pop {r2} 78*4882a593Smuzhiyun msr cpsr,r2 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun /* 81*4882a593Smuzhiyun * Restore c1 register. Especially set exception vector location 82*4882a593Smuzhiyun * back to BootROM space which is required by bootrom for USB boot. 83*4882a593Smuzhiyun */ 84*4882a593Smuzhiyun pop {r2} 85*4882a593Smuzhiyun mcr p15, 0, r2, c1, c0, 0 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun pop {r0-r12,r14} 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* 90*4882a593Smuzhiyun * In case this code was started by the CALL instruction, the register 91*4882a593Smuzhiyun * r0 is examined by the BootROM after this code returns. The value in 92*4882a593Smuzhiyun * r0 must be set to 0 to indicate successful return. 93*4882a593Smuzhiyun */ 94*4882a593Smuzhiyun mov r0, #0 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun bx lr 97