1 /*
2 * (C) Copyright 2011
3 * Ilya Yanok, EmCraft Systems
4 *
5 * SPDX-License-Identifier: GPL-2.0+
6 */
7 #include <linux/types.h>
8 #include <common.h>
9
10 #ifndef CONFIG_SYS_DCACHE_OFF
invalidate_dcache_all(void)11 void invalidate_dcache_all(void)
12 {
13 asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
14 }
15
flush_dcache_all(void)16 void flush_dcache_all(void)
17 {
18 asm volatile(
19 "0:"
20 "mrc p15, 0, r15, c7, c14, 3\n"
21 "bne 0b\n"
22 "mcr p15, 0, %0, c7, c10, 4\n"
23 : : "r"(0) : "memory"
24 );
25 }
26
invalidate_dcache_range(unsigned long start,unsigned long stop)27 void invalidate_dcache_range(unsigned long start, unsigned long stop)
28 {
29 if (!check_cache_range(start, stop))
30 return;
31
32 while (start < stop) {
33 asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
34 start += CONFIG_SYS_CACHELINE_SIZE;
35 }
36 }
37
flush_dcache_range(unsigned long start,unsigned long stop)38 void flush_dcache_range(unsigned long start, unsigned long stop)
39 {
40 if (!check_cache_range(start, stop))
41 return;
42
43 while (start < stop) {
44 asm volatile("mcr p15, 0, %0, c7, c14, 1\n" : : "r"(start));
45 start += CONFIG_SYS_CACHELINE_SIZE;
46 }
47
48 asm volatile("mcr p15, 0, %0, c7, c10, 4\n" : : "r"(0));
49 }
50 #else /* #ifndef CONFIG_SYS_DCACHE_OFF */
invalidate_dcache_all(void)51 void invalidate_dcache_all(void)
52 {
53 }
54
flush_dcache_all(void)55 void flush_dcache_all(void)
56 {
57 }
58 #endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
59
60 /*
61 * Stub implementations for l2 cache operations
62 */
63
l2_cache_disable(void)64 __weak void l2_cache_disable(void) {}
65
66 #if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
invalidate_l2_cache(void)67 __weak void invalidate_l2_cache(void) {}
68 #endif
69