1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * armboot - Startup Code for OMP2420/ARM1136 CPU-core 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2004 Texas Instruments <r-woodruff2@ti.com> 5*4882a593Smuzhiyun * 6*4882a593Smuzhiyun * Copyright (c) 2001 Marius Gröger <mag@sysgo.de> 7*4882a593Smuzhiyun * Copyright (c) 2002 Alex Züpke <azu@sysgo.de> 8*4882a593Smuzhiyun * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de> 9*4882a593Smuzhiyun * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com> 10*4882a593Smuzhiyun * Copyright (c) 2003 Kshitij <kshitij@ti.com> 11*4882a593Smuzhiyun * 12*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 13*4882a593Smuzhiyun */ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun#include <asm-offsets.h> 16*4882a593Smuzhiyun#include <config.h> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun/* 19*4882a593Smuzhiyun ************************************************************************* 20*4882a593Smuzhiyun * 21*4882a593Smuzhiyun * Startup Code (reset vector) 22*4882a593Smuzhiyun * 23*4882a593Smuzhiyun * do important init only if we don't start from memory! 24*4882a593Smuzhiyun * setup Memory and board specific bits prior to relocation. 25*4882a593Smuzhiyun * relocate armboot to ram 26*4882a593Smuzhiyun * setup stack 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun ************************************************************************* 29*4882a593Smuzhiyun */ 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun .globl reset 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunreset: 34*4882a593Smuzhiyun /* 35*4882a593Smuzhiyun * set the cpu to SVC32 mode 36*4882a593Smuzhiyun */ 37*4882a593Smuzhiyun mrs r0,cpsr 38*4882a593Smuzhiyun bic r0,r0,#0x1f 39*4882a593Smuzhiyun orr r0,r0,#0xd3 40*4882a593Smuzhiyun msr cpsr,r0 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* the mask ROM code should have PLL and others stable */ 43*4882a593Smuzhiyun#ifndef CONFIG_SKIP_LOWLEVEL_INIT 44*4882a593Smuzhiyun bl cpu_init_crit 45*4882a593Smuzhiyun#endif 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun bl _main 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun/*------------------------------------------------------------------------------*/ 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun .globl c_runtime_cpu_setup 52*4882a593Smuzhiyunc_runtime_cpu_setup: 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun bx lr 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun/* 57*4882a593Smuzhiyun ************************************************************************* 58*4882a593Smuzhiyun * 59*4882a593Smuzhiyun * CPU_init_critical registers 60*4882a593Smuzhiyun * 61*4882a593Smuzhiyun * setup important registers 62*4882a593Smuzhiyun * setup memory timing 63*4882a593Smuzhiyun * 64*4882a593Smuzhiyun ************************************************************************* 65*4882a593Smuzhiyun */ 66*4882a593Smuzhiyun#ifndef CONFIG_SKIP_LOWLEVEL_INIT 67*4882a593Smuzhiyuncpu_init_crit: 68*4882a593Smuzhiyun /* 69*4882a593Smuzhiyun * flush v4 I/D caches 70*4882a593Smuzhiyun */ 71*4882a593Smuzhiyun mov r0, #0 72*4882a593Smuzhiyun mcr p15, 0, r0, c7, c7, 0 /* Invalidate I+D+BTB caches */ 73*4882a593Smuzhiyun mcr p15, 0, r0, c8, c7, 0 /* Invalidate Unified TLB */ 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* 76*4882a593Smuzhiyun * disable MMU stuff and caches 77*4882a593Smuzhiyun */ 78*4882a593Smuzhiyun mrc p15, 0, r0, c1, c0, 0 79*4882a593Smuzhiyun bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) 80*4882a593Smuzhiyun bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) 81*4882a593Smuzhiyun orr r0, r0, #0x00000002 @ set bit 1 (A) Align 82*4882a593Smuzhiyun orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache 83*4882a593Smuzhiyun mcr p15, 0, r0, c1, c0, 0 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun#ifndef CONFIG_SKIP_LOWLEVEL_INIT_ONLY 86*4882a593Smuzhiyun /* 87*4882a593Smuzhiyun * Jump to board specific initialization... The Mask ROM will have already initialized 88*4882a593Smuzhiyun * basic memory. Go here to bump up clock rate and handle wake up conditions. 89*4882a593Smuzhiyun */ 90*4882a593Smuzhiyun mov ip, lr /* persevere link reg across call */ 91*4882a593Smuzhiyun bl lowlevel_init /* go setup pll,mux,memory */ 92*4882a593Smuzhiyun mov lr, ip /* restore link */ 93*4882a593Smuzhiyun#endif 94*4882a593Smuzhiyun mov pc, lr /* back to my caller */ 95*4882a593Smuzhiyun#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ 96