1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * (C) Copyright 2007
3*4882a593Smuzhiyun * Sascha Hauer, Pengutronix
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
6*4882a593Smuzhiyun *
7*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
8*4882a593Smuzhiyun */
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #include <common.h>
11*4882a593Smuzhiyun #include <asm/io.h>
12*4882a593Smuzhiyun #include <asm/arch/imx-regs.h>
13*4882a593Smuzhiyun #include <asm/arch/crm_regs.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /* General purpose timers bitfields */
18*4882a593Smuzhiyun #define GPTCR_SWR (1<<15) /* Software reset */
19*4882a593Smuzhiyun #define GPTCR_FRR (1<<9) /* Freerun / restart */
20*4882a593Smuzhiyun #define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
21*4882a593Smuzhiyun #define GPTCR_TEN (1) /* Timer enable */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun /*
24*4882a593Smuzhiyun * nothing really to do with interrupts, just starts up a counter.
25*4882a593Smuzhiyun * The 32KHz 32-bit timer overruns in 134217 seconds
26*4882a593Smuzhiyun */
timer_init(void)27*4882a593Smuzhiyun int timer_init(void)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun int i;
30*4882a593Smuzhiyun struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
31*4882a593Smuzhiyun struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun /* setup GP Timer 1 */
34*4882a593Smuzhiyun writel(GPTCR_SWR, &gpt->ctrl);
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun for (i = 0; i < 100; i++)
39*4882a593Smuzhiyun writel(0, &gpt->ctrl); /* We have no udelay by now */
40*4882a593Smuzhiyun writel(0, &gpt->pre); /* prescaler = 1 */
41*4882a593Smuzhiyun /* Freerun Mode, 32KHz input */
42*4882a593Smuzhiyun writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
43*4882a593Smuzhiyun &gpt->ctrl);
44*4882a593Smuzhiyun writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun return 0;
47*4882a593Smuzhiyun }
48