xref: /OK3568_Linux_fs/u-boot/arch/arc/dts/nsim.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright (C) 2015-2016 Synopsys, Inc. (www.synopsys.com)
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier:	GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include "skeleton.dtsi"
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun/ {
11*4882a593Smuzhiyun	aliases {
12*4882a593Smuzhiyun		console = &arcuart0;
13*4882a593Smuzhiyun	};
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	cpu_card {
16*4882a593Smuzhiyun		core_clk: core_clk {
17*4882a593Smuzhiyun			#clock-cells = <0>;
18*4882a593Smuzhiyun			compatible = "fixed-clock";
19*4882a593Smuzhiyun			clock-frequency = <70000000>;
20*4882a593Smuzhiyun			u-boot,dm-pre-reloc;
21*4882a593Smuzhiyun		};
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	arcuart0: serial@0xc0fc1000 {
25*4882a593Smuzhiyun		compatible = "snps,arc-uart";
26*4882a593Smuzhiyun		reg = <0xc0fc1000 0x100>;
27*4882a593Smuzhiyun		clock-frequency = <70000000>;
28*4882a593Smuzhiyun	};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun};
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