1*4882a593Smuzhiyunmenu "ARC architecture" 2*4882a593Smuzhiyun depends on ARC 3*4882a593Smuzhiyun 4*4882a593Smuzhiyunconfig SYS_ARCH 5*4882a593Smuzhiyun default "arc" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyunconfig SYS_CPU 8*4882a593Smuzhiyun default "arcv1" if ISA_ARCOMPACT 9*4882a593Smuzhiyun default "arcv2" if ISA_ARCV2 10*4882a593Smuzhiyun 11*4882a593Smuzhiyunchoice 12*4882a593Smuzhiyun prompt "ARC Instruction Set" 13*4882a593Smuzhiyun default ISA_ARCOMPACT 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunconfig ISA_ARCOMPACT 16*4882a593Smuzhiyun bool "ARCompact ISA" 17*4882a593Smuzhiyun help 18*4882a593Smuzhiyun The original ARC ISA of ARC600/700 cores 19*4882a593Smuzhiyun 20*4882a593Smuzhiyunconfig ISA_ARCV2 21*4882a593Smuzhiyun bool "ARC ISA v2" 22*4882a593Smuzhiyun help 23*4882a593Smuzhiyun ISA for the Next Generation ARC-HS cores 24*4882a593Smuzhiyun 25*4882a593Smuzhiyunendchoice 26*4882a593Smuzhiyun 27*4882a593Smuzhiyunchoice 28*4882a593Smuzhiyun prompt "CPU selection" 29*4882a593Smuzhiyun default CPU_ARC770D if ISA_ARCOMPACT 30*4882a593Smuzhiyun default CPU_ARCHS38 if ISA_ARCV2 31*4882a593Smuzhiyun 32*4882a593Smuzhiyunconfig CPU_ARC750D 33*4882a593Smuzhiyun bool "ARC 750D" 34*4882a593Smuzhiyun select ARC_MMU_V2 35*4882a593Smuzhiyun depends on ISA_ARCOMPACT 36*4882a593Smuzhiyun help 37*4882a593Smuzhiyun Choose this option to build an U-Boot for ARC750D CPU. 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunconfig CPU_ARC770D 40*4882a593Smuzhiyun bool "ARC 770D" 41*4882a593Smuzhiyun select ARC_MMU_V3 42*4882a593Smuzhiyun depends on ISA_ARCOMPACT 43*4882a593Smuzhiyun help 44*4882a593Smuzhiyun Choose this option to build an U-Boot for ARC770D CPU. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyunconfig CPU_ARCEM6 47*4882a593Smuzhiyun bool "ARC EM6" 48*4882a593Smuzhiyun select ARC_MMU_ABSENT 49*4882a593Smuzhiyun depends on ISA_ARCV2 50*4882a593Smuzhiyun help 51*4882a593Smuzhiyun Next Generation ARC Core based on ISA-v2 ISA without MMU. 52*4882a593Smuzhiyun 53*4882a593Smuzhiyunconfig CPU_ARCHS36 54*4882a593Smuzhiyun bool "ARC HS36" 55*4882a593Smuzhiyun select ARC_MMU_ABSENT 56*4882a593Smuzhiyun depends on ISA_ARCV2 57*4882a593Smuzhiyun help 58*4882a593Smuzhiyun Next Generation ARC Core based on ISA-v2 ISA without MMU. 59*4882a593Smuzhiyun 60*4882a593Smuzhiyunconfig CPU_ARCHS38 61*4882a593Smuzhiyun bool "ARC HS38" 62*4882a593Smuzhiyun select ARC_MMU_V4 63*4882a593Smuzhiyun depends on ISA_ARCV2 64*4882a593Smuzhiyun help 65*4882a593Smuzhiyun Next Generation ARC Core based on ISA-v2 ISA with MMU. 66*4882a593Smuzhiyun 67*4882a593Smuzhiyunendchoice 68*4882a593Smuzhiyun 69*4882a593Smuzhiyunchoice 70*4882a593Smuzhiyun prompt "MMU Version" 71*4882a593Smuzhiyun default ARC_MMU_V3 if CPU_ARC770D 72*4882a593Smuzhiyun default ARC_MMU_V2 if CPU_ARC750D 73*4882a593Smuzhiyun default ARC_MMU_ABSENT if CPU_ARCEM6 74*4882a593Smuzhiyun default ARC_MMU_ABSENT if CPU_ARCHS36 75*4882a593Smuzhiyun default ARC_MMU_V4 if CPU_ARCHS38 76*4882a593Smuzhiyun 77*4882a593Smuzhiyunconfig ARC_MMU_ABSENT 78*4882a593Smuzhiyun bool "No MMU" 79*4882a593Smuzhiyun help 80*4882a593Smuzhiyun No MMU 81*4882a593Smuzhiyun 82*4882a593Smuzhiyunconfig ARC_MMU_V2 83*4882a593Smuzhiyun bool "MMU v2" 84*4882a593Smuzhiyun depends on CPU_ARC750D 85*4882a593Smuzhiyun help 86*4882a593Smuzhiyun Fixed the deficiency of v1 - possible thrashing in memcpy sceanrio 87*4882a593Smuzhiyun when 2 D-TLB and 1 I-TLB entries index into same 2way set. 88*4882a593Smuzhiyun 89*4882a593Smuzhiyunconfig ARC_MMU_V3 90*4882a593Smuzhiyun bool "MMU v3" 91*4882a593Smuzhiyun depends on CPU_ARC770D 92*4882a593Smuzhiyun help 93*4882a593Smuzhiyun Introduced with ARC700 4.10: New Features 94*4882a593Smuzhiyun Variable Page size (1k-16k), var JTLB size 128 x (2 or 4) 95*4882a593Smuzhiyun Shared Address Spaces (SASID) 96*4882a593Smuzhiyun 97*4882a593Smuzhiyunconfig ARC_MMU_V4 98*4882a593Smuzhiyun bool "MMU v4" 99*4882a593Smuzhiyun depends on CPU_ARCHS38 100*4882a593Smuzhiyun help 101*4882a593Smuzhiyun Introduced as a part of ARC HS38 release. 102*4882a593Smuzhiyun 103*4882a593Smuzhiyunendchoice 104*4882a593Smuzhiyun 105*4882a593Smuzhiyunconfig CPU_BIG_ENDIAN 106*4882a593Smuzhiyun bool "Enable Big Endian Mode" 107*4882a593Smuzhiyun default n 108*4882a593Smuzhiyun help 109*4882a593Smuzhiyun Build kernel for Big Endian Mode of ARC CPU 110*4882a593Smuzhiyun 111*4882a593Smuzhiyunconfig SYS_ICACHE_OFF 112*4882a593Smuzhiyun bool "Do not use Instruction Cache" 113*4882a593Smuzhiyun default n 114*4882a593Smuzhiyun 115*4882a593Smuzhiyunconfig SYS_DCACHE_OFF 116*4882a593Smuzhiyun bool "Do not use Data Cache" 117*4882a593Smuzhiyun default n 118*4882a593Smuzhiyun 119*4882a593Smuzhiyunchoice 120*4882a593Smuzhiyun prompt "Target select" 121*4882a593Smuzhiyun default TARGET_AXS103 122*4882a593Smuzhiyun 123*4882a593Smuzhiyunconfig TARGET_TB100 124*4882a593Smuzhiyun bool "Support tb100" 125*4882a593Smuzhiyun 126*4882a593Smuzhiyunconfig TARGET_NSIM 127*4882a593Smuzhiyun bool "Support standalone nSIM & Free nSIM" 128*4882a593Smuzhiyun 129*4882a593Smuzhiyunconfig TARGET_AXS101 130*4882a593Smuzhiyun bool "Support Synopsys Designware SDP board AXS101" 131*4882a593Smuzhiyun 132*4882a593Smuzhiyunconfig TARGET_AXS103 133*4882a593Smuzhiyun bool "Support Synopsys Designware SDP board AXS103" 134*4882a593Smuzhiyun 135*4882a593Smuzhiyunconfig TARGET_HSDK 136*4882a593Smuzhiyun bool "Support Synpsys HS DevelopmentKit board" 137*4882a593Smuzhiyun 138*4882a593Smuzhiyunendchoice 139*4882a593Smuzhiyun 140*4882a593Smuzhiyunsource "board/abilis/tb100/Kconfig" 141*4882a593Smuzhiyunsource "board/synopsys/Kconfig" 142*4882a593Smuzhiyunsource "board/synopsys/axs10x/Kconfig" 143*4882a593Smuzhiyunsource "board/synopsys/hsdk/Kconfig" 144*4882a593Smuzhiyun 145*4882a593Smuzhiyunendmenu 146