1*4882a593Smuzhiyun# RK3566 Release Note 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun## rk3566_ddr_{1056...920}MHz_v1.18.bin 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun| Date | File | Build commit | Severity | 6*4882a593Smuzhiyun| ---------- | ------------------------------------ | ------------ | --------- | 7*4882a593Smuzhiyun| 2023-07-17 | rk3566_ddr_{1056...920}MHz_v1.18.bin | f366f69a7d | important | 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun### Fixed 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun| Index | Severity | Update | Issue description | Issue source | 12*4882a593Smuzhiyun| ----- | -------- | ------------------------------------------------ | ------------------------------------- | ------------ | 13*4882a593Smuzhiyun| 1 | important | Fixed the suspend/resume function crash problem caused by DDR active_ranks configuration error | Suspend/resume function crash | - | 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun------ 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun## rk3566_ddr_{1056...324}MHz_v1.17.bin 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun| Date | File | Build commit | Severity | 20*4882a593Smuzhiyun| ---------- | ------------------------------------ | ------------ | --------- | 21*4882a593Smuzhiyun| 2023-06-20 | rk3566_ddr_{1056...324}MHz_v1.17.bin | 992b933606 | important | 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun### New 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun1. Added support for 4rank LPDDR3/LPDDR4/LPDDR4x of different rows. 26*4882a593Smuzhiyun2. Enable derate function for LPDDR4/LPDDR4x. 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun------ 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun## rk3566_ddr_1056MHz_eyescan_v1.16.bin 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun| Date | File | Build commit | Severity | 33*4882a593Smuzhiyun| ---------- | :----------------------------------- | ------------ | --------- | 34*4882a593Smuzhiyun| 2023-04-19 | rk3566_ddr_1056MHz_eyescan_v1.16.bin | b9c108a4eb | important | 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun### New 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun1. Add RK3566 2D eye scan support. 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun------ 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun## rk3566_ddr_{1056...324}MHz_v1.16.bin 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun| Date | File | Build commit | Severity | 45*4882a593Smuzhiyun| ---------- | ------------------------------------ | ------------ | --------- | 46*4882a593Smuzhiyun| 2022-11-16 | rk3566_ddr_{1056...324}MHz_v1.16.bin | 6f71c736ce | important | 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun### New 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun1. RK3568J/RK3568M use 1/2tREFI except LPDDR4/LPDDR4x. LPDDR4/LPDDR4x use derate mode. 51*4882a593Smuzhiyun2. TREFI, pageclose configurable by ddrbin tool. 52*4882a593Smuzhiyun3. Improve DDR4 performance. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun### Fixed 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun| Index | Severity | Update | Issue description | Issue source | 57*4882a593Smuzhiyun| ----- | --------- | ------------------------------------------------------------ | ------------------------------------------------------------ | ------------ | 58*4882a593Smuzhiyun| 1 | important | To solve the instability problem of some ddr4 when DDR run in 528MHz. | When DDR4 run in 528MHz, the system would unstable, causing a crash and restart | - | 59*4882a593Smuzhiyun| 2 | important | To solve 4GB ECC board Init fail bug | 4GB DDR4 board may crash in ddrbin | | 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun------ 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun## rk3566_ddr_{1056...324}MHz_v1.15.bin 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun| Date | File | Build commit | Severity | 66*4882a593Smuzhiyun| ---------- | ------------------------------------ | ------------ | --------- | 67*4882a593Smuzhiyun| 2022-11-08 | rk3566_ddr_{1056...324}MHz_v1.15.bin | ec2fae0c96 | important | 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun### Fixed 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun| Index | Severity | Update | Issue description | Issue source | 72*4882a593Smuzhiyun| ----- | --------- | ------------------------------------------------------------ | ------------------------------------------------------------ | ------------ | 73*4882a593Smuzhiyun| 1 | important | To solve the instability problem of some chips when DDR run in 324MHz. | When DDR run in 324MHz, the system would unstable, causing a crash and restart | - | 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun------ 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun## rk3566_ddr_{1056...324}MHz_v1.14.bin 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun| Date | File | Build commit | Severity | 80*4882a593Smuzhiyun| ---------- | :----------------------------------- | ------------ | --------- | 81*4882a593Smuzhiyun| 2022-08-27 | rk3566_ddr_{1056...324}MHz_v1.14.bin | b1f29a2a6f | important | 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun### Fixed 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun| Index | Severity | Update | Issue description | Issue source | 86*4882a593Smuzhiyun| ----- | --------- | --------------------------------------------------------- | ------------------------------------------------------------ | ------------ | 87*4882a593Smuzhiyun| 1 | moderate | fix Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32 | Fix set of t_xs_x32, t_xs_abort_x32 and t_xs_fast_x32.This bug may lead to some low density dram(128M) fail. | - | 88*4882a593Smuzhiyun| 2 | important | fix ddr4 528M stability problem | some DRAM DLL can't lock at 528M，DLL should be bypass for 528M | - | 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun------ 91