1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Test context switching to see if the DSCR SPR is correctly preserved
3*4882a593Smuzhiyun * when within a transaction.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Note: We assume that the DSCR has been left at the default value (0)
6*4882a593Smuzhiyun * for all CPUs.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Method:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Set a value into the DSCR.
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * Start a transaction, and suspend it (*).
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Hard loop checking to see if the transaction has become doomed.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * Now that we *may* have been preempted, record the DSCR and TEXASR SPRS.
17*4882a593Smuzhiyun *
18*4882a593Smuzhiyun * If the abort was because of a context switch, check the DSCR value.
19*4882a593Smuzhiyun * Otherwise, try again.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * (*) If the transaction is not suspended we can't see the problem because
22*4882a593Smuzhiyun * the transaction abort handler will restore the DSCR to it's checkpointed
23*4882a593Smuzhiyun * value before we regain control.
24*4882a593Smuzhiyun */
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <inttypes.h>
27*4882a593Smuzhiyun #include <stdio.h>
28*4882a593Smuzhiyun #include <stdlib.h>
29*4882a593Smuzhiyun #include <assert.h>
30*4882a593Smuzhiyun #include <asm/tm.h>
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #include "utils.h"
33*4882a593Smuzhiyun #include "tm.h"
34*4882a593Smuzhiyun #include "../pmu/lib.h"
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun #define SPRN_DSCR 0x03
37*4882a593Smuzhiyun
test_body(void)38*4882a593Smuzhiyun int test_body(void)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun uint64_t rv, dscr1 = 1, dscr2, texasr;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun SKIP_IF(!have_htm());
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun printf("Check DSCR TM context switch: ");
45*4882a593Smuzhiyun fflush(stdout);
46*4882a593Smuzhiyun for (;;) {
47*4882a593Smuzhiyun asm __volatile__ (
48*4882a593Smuzhiyun /* set a known value into the DSCR */
49*4882a593Smuzhiyun "ld 3, %[dscr1];"
50*4882a593Smuzhiyun "mtspr %[sprn_dscr], 3;"
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun "li %[rv], 1;"
53*4882a593Smuzhiyun /* start and suspend a transaction */
54*4882a593Smuzhiyun "tbegin.;"
55*4882a593Smuzhiyun "beq 1f;"
56*4882a593Smuzhiyun "tsuspend.;"
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* hard loop until the transaction becomes doomed */
59*4882a593Smuzhiyun "2: ;"
60*4882a593Smuzhiyun "tcheck 0;"
61*4882a593Smuzhiyun "bc 4, 0, 2b;"
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /* record DSCR and TEXASR */
64*4882a593Smuzhiyun "mfspr 3, %[sprn_dscr];"
65*4882a593Smuzhiyun "std 3, %[dscr2];"
66*4882a593Smuzhiyun "mfspr 3, %[sprn_texasr];"
67*4882a593Smuzhiyun "std 3, %[texasr];"
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun "tresume.;"
70*4882a593Smuzhiyun "tend.;"
71*4882a593Smuzhiyun "li %[rv], 0;"
72*4882a593Smuzhiyun "1: ;"
73*4882a593Smuzhiyun : [rv]"=r"(rv), [dscr2]"=m"(dscr2), [texasr]"=m"(texasr)
74*4882a593Smuzhiyun : [dscr1]"m"(dscr1)
75*4882a593Smuzhiyun , [sprn_dscr]"i"(SPRN_DSCR), [sprn_texasr]"i"(SPRN_TEXASR)
76*4882a593Smuzhiyun : "memory", "r3"
77*4882a593Smuzhiyun );
78*4882a593Smuzhiyun assert(rv); /* make sure the transaction aborted */
79*4882a593Smuzhiyun if ((texasr >> 56) != TM_CAUSE_RESCHED) {
80*4882a593Smuzhiyun continue;
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun if (dscr2 != dscr1) {
83*4882a593Smuzhiyun printf(" FAIL\n");
84*4882a593Smuzhiyun return 1;
85*4882a593Smuzhiyun } else {
86*4882a593Smuzhiyun printf(" OK\n");
87*4882a593Smuzhiyun return 0;
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
tm_resched_dscr(void)92*4882a593Smuzhiyun static int tm_resched_dscr(void)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun return eat_cpu(test_body);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
main(int argc,const char * argv[])97*4882a593Smuzhiyun int main(int argc, const char *argv[])
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return test_harness(tm_resched_dscr, "tm_resched_dscr");
100*4882a593Smuzhiyun }
101