1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright 2015, Cyril Bur, IBM Corp. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #include "basic_asm.h" 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun /* POS MUST BE 16 ALIGNED! */ 9*4882a593Smuzhiyun #define PUSH_VMX(pos,reg) \ 10*4882a593Smuzhiyun li reg,pos; \ 11*4882a593Smuzhiyun stvx v20,reg,%r1; \ 12*4882a593Smuzhiyun addi reg,reg,16; \ 13*4882a593Smuzhiyun stvx v21,reg,%r1; \ 14*4882a593Smuzhiyun addi reg,reg,16; \ 15*4882a593Smuzhiyun stvx v22,reg,%r1; \ 16*4882a593Smuzhiyun addi reg,reg,16; \ 17*4882a593Smuzhiyun stvx v23,reg,%r1; \ 18*4882a593Smuzhiyun addi reg,reg,16; \ 19*4882a593Smuzhiyun stvx v24,reg,%r1; \ 20*4882a593Smuzhiyun addi reg,reg,16; \ 21*4882a593Smuzhiyun stvx v25,reg,%r1; \ 22*4882a593Smuzhiyun addi reg,reg,16; \ 23*4882a593Smuzhiyun stvx v26,reg,%r1; \ 24*4882a593Smuzhiyun addi reg,reg,16; \ 25*4882a593Smuzhiyun stvx v27,reg,%r1; \ 26*4882a593Smuzhiyun addi reg,reg,16; \ 27*4882a593Smuzhiyun stvx v28,reg,%r1; \ 28*4882a593Smuzhiyun addi reg,reg,16; \ 29*4882a593Smuzhiyun stvx v29,reg,%r1; \ 30*4882a593Smuzhiyun addi reg,reg,16; \ 31*4882a593Smuzhiyun stvx v30,reg,%r1; \ 32*4882a593Smuzhiyun addi reg,reg,16; \ 33*4882a593Smuzhiyun stvx v31,reg,%r1; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun /* POS MUST BE 16 ALIGNED! */ 36*4882a593Smuzhiyun #define POP_VMX(pos,reg) \ 37*4882a593Smuzhiyun li reg,pos; \ 38*4882a593Smuzhiyun lvx v20,reg,%r1; \ 39*4882a593Smuzhiyun addi reg,reg,16; \ 40*4882a593Smuzhiyun lvx v21,reg,%r1; \ 41*4882a593Smuzhiyun addi reg,reg,16; \ 42*4882a593Smuzhiyun lvx v22,reg,%r1; \ 43*4882a593Smuzhiyun addi reg,reg,16; \ 44*4882a593Smuzhiyun lvx v23,reg,%r1; \ 45*4882a593Smuzhiyun addi reg,reg,16; \ 46*4882a593Smuzhiyun lvx v24,reg,%r1; \ 47*4882a593Smuzhiyun addi reg,reg,16; \ 48*4882a593Smuzhiyun lvx v25,reg,%r1; \ 49*4882a593Smuzhiyun addi reg,reg,16; \ 50*4882a593Smuzhiyun lvx v26,reg,%r1; \ 51*4882a593Smuzhiyun addi reg,reg,16; \ 52*4882a593Smuzhiyun lvx v27,reg,%r1; \ 53*4882a593Smuzhiyun addi reg,reg,16; \ 54*4882a593Smuzhiyun lvx v28,reg,%r1; \ 55*4882a593Smuzhiyun addi reg,reg,16; \ 56*4882a593Smuzhiyun lvx v29,reg,%r1; \ 57*4882a593Smuzhiyun addi reg,reg,16; \ 58*4882a593Smuzhiyun lvx v30,reg,%r1; \ 59*4882a593Smuzhiyun addi reg,reg,16; \ 60*4882a593Smuzhiyun lvx v31,reg,%r1; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* 63*4882a593Smuzhiyun * Careful this will 'clobber' vmx (by design) 64*4882a593Smuzhiyun * Don't call this from C 65*4882a593Smuzhiyun */ 66*4882a593Smuzhiyun FUNC_START(load_vmx) 67*4882a593Smuzhiyun li r5,0 68*4882a593Smuzhiyun lvx v20,r5,r3 69*4882a593Smuzhiyun addi r5,r5,16 70*4882a593Smuzhiyun lvx v21,r5,r3 71*4882a593Smuzhiyun addi r5,r5,16 72*4882a593Smuzhiyun lvx v22,r5,r3 73*4882a593Smuzhiyun addi r5,r5,16 74*4882a593Smuzhiyun lvx v23,r5,r3 75*4882a593Smuzhiyun addi r5,r5,16 76*4882a593Smuzhiyun lvx v24,r5,r3 77*4882a593Smuzhiyun addi r5,r5,16 78*4882a593Smuzhiyun lvx v25,r5,r3 79*4882a593Smuzhiyun addi r5,r5,16 80*4882a593Smuzhiyun lvx v26,r5,r3 81*4882a593Smuzhiyun addi r5,r5,16 82*4882a593Smuzhiyun lvx v27,r5,r3 83*4882a593Smuzhiyun addi r5,r5,16 84*4882a593Smuzhiyun lvx v28,r5,r3 85*4882a593Smuzhiyun addi r5,r5,16 86*4882a593Smuzhiyun lvx v29,r5,r3 87*4882a593Smuzhiyun addi r5,r5,16 88*4882a593Smuzhiyun lvx v30,r5,r3 89*4882a593Smuzhiyun addi r5,r5,16 90*4882a593Smuzhiyun lvx v31,r5,r3 91*4882a593Smuzhiyun blr 92*4882a593Smuzhiyun FUNC_END(load_vmx) 93