1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * (C) 2010,2011 Thomas Renninger <trenn@suse.de>, Novell Inc.
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Miscellaneous helpers which do not fit or are worth
6*4882a593Smuzhiyun * to put into separate headers
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #ifndef __CPUPOWERUTILS_HELPERS__
10*4882a593Smuzhiyun #define __CPUPOWERUTILS_HELPERS__
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <libintl.h>
13*4882a593Smuzhiyun #include <locale.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #include "helpers/bitmask.h"
16*4882a593Smuzhiyun #include <cpupower.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun /* Internationalization ****************************/
19*4882a593Smuzhiyun #ifdef NLS
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #define _(String) gettext(String)
22*4882a593Smuzhiyun #ifndef gettext_noop
23*4882a593Smuzhiyun #define gettext_noop(String) String
24*4882a593Smuzhiyun #endif
25*4882a593Smuzhiyun #define N_(String) gettext_noop(String)
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #else /* !NLS */
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define _(String) String
30*4882a593Smuzhiyun #define N_(String) String
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun #endif
33*4882a593Smuzhiyun /* Internationalization ****************************/
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun extern int run_as_root;
36*4882a593Smuzhiyun extern int base_cpu;
37*4882a593Smuzhiyun extern struct bitmask *cpus_chosen;
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun /* Global verbose (-d) stuff *********************************/
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun * define DEBUG via global Makefile variable
42*4882a593Smuzhiyun * Debug output is sent to stderr, do:
43*4882a593Smuzhiyun * cpupower monitor 2>/tmp/debug
44*4882a593Smuzhiyun * to split debug output away from normal output
45*4882a593Smuzhiyun */
46*4882a593Smuzhiyun #ifdef DEBUG
47*4882a593Smuzhiyun extern int be_verbose;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun #define dprint(fmt, ...) { \
50*4882a593Smuzhiyun if (be_verbose) { \
51*4882a593Smuzhiyun fprintf(stderr, "%s: " fmt, \
52*4882a593Smuzhiyun __func__, ##__VA_ARGS__); \
53*4882a593Smuzhiyun } \
54*4882a593Smuzhiyun }
55*4882a593Smuzhiyun #else
dprint(const char * fmt,...)56*4882a593Smuzhiyun static inline void dprint(const char *fmt, ...) { }
57*4882a593Smuzhiyun #endif
58*4882a593Smuzhiyun extern int be_verbose;
59*4882a593Smuzhiyun /* Global verbose (-v) stuff *********************************/
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* cpuid and cpuinfo helpers **************************/
62*4882a593Smuzhiyun enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL,
63*4882a593Smuzhiyun X86_VENDOR_AMD, X86_VENDOR_HYGON, X86_VENDOR_MAX};
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #define CPUPOWER_CAP_INV_TSC 0x00000001
66*4882a593Smuzhiyun #define CPUPOWER_CAP_APERF 0x00000002
67*4882a593Smuzhiyun #define CPUPOWER_CAP_AMD_CBP 0x00000004
68*4882a593Smuzhiyun #define CPUPOWER_CAP_PERF_BIAS 0x00000008
69*4882a593Smuzhiyun #define CPUPOWER_CAP_HAS_TURBO_RATIO 0x00000010
70*4882a593Smuzhiyun #define CPUPOWER_CAP_IS_SNB 0x00000020
71*4882a593Smuzhiyun #define CPUPOWER_CAP_INTEL_IDA 0x00000040
72*4882a593Smuzhiyun #define CPUPOWER_CAP_AMD_RDPRU 0x00000080
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun #define CPUPOWER_AMD_CPBDIS 0x02000000
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #define MAX_HW_PSTATES 10
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun struct cpupower_cpu_info {
79*4882a593Smuzhiyun enum cpupower_cpu_vendor vendor;
80*4882a593Smuzhiyun unsigned int family;
81*4882a593Smuzhiyun unsigned int model;
82*4882a593Smuzhiyun unsigned int stepping;
83*4882a593Smuzhiyun /* CPU capabilities read out from cpuid */
84*4882a593Smuzhiyun unsigned long long caps;
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* get_cpu_info
88*4882a593Smuzhiyun *
89*4882a593Smuzhiyun * Extract CPU vendor, family, model, stepping info from /proc/cpuinfo
90*4882a593Smuzhiyun *
91*4882a593Smuzhiyun * Returns 0 on success or a negative error code
92*4882a593Smuzhiyun * Only used on x86, below global's struct values are zero/unknown on
93*4882a593Smuzhiyun * other archs
94*4882a593Smuzhiyun */
95*4882a593Smuzhiyun extern int get_cpu_info(struct cpupower_cpu_info *cpu_info);
96*4882a593Smuzhiyun extern struct cpupower_cpu_info cpupower_cpu_info;
97*4882a593Smuzhiyun /* cpuid and cpuinfo helpers **************************/
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun /* X86 ONLY ****************************************/
100*4882a593Smuzhiyun #if defined(__i386__) || defined(__x86_64__)
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun #include <pci/pci.h>
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* Read/Write msr ****************************/
105*4882a593Smuzhiyun extern int read_msr(int cpu, unsigned int idx, unsigned long long *val);
106*4882a593Smuzhiyun extern int write_msr(int cpu, unsigned int idx, unsigned long long val);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun extern int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val);
109*4882a593Smuzhiyun extern int msr_intel_get_perf_bias(unsigned int cpu);
110*4882a593Smuzhiyun extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu);
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* Read/Write msr ****************************/
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /* PCI stuff ****************************/
115*4882a593Smuzhiyun extern int amd_pci_get_num_boost_states(int *active, int *states);
116*4882a593Smuzhiyun extern struct pci_dev *pci_acc_init(struct pci_access **pacc, int domain,
117*4882a593Smuzhiyun int bus, int slot, int func, int vendor,
118*4882a593Smuzhiyun int dev);
119*4882a593Smuzhiyun extern struct pci_dev *pci_slot_func_init(struct pci_access **pacc,
120*4882a593Smuzhiyun int slot, int func);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /* PCI stuff ****************************/
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* AMD HW pstate decoding **************************/
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun extern int decode_pstates(unsigned int cpu, unsigned int cpu_family,
127*4882a593Smuzhiyun int boost_states, unsigned long *pstates, int *no);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun /* AMD HW pstate decoding **************************/
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun extern int cpufreq_has_boost_support(unsigned int cpu, int *support,
132*4882a593Smuzhiyun int *active, int * states);
133*4882a593Smuzhiyun /*
134*4882a593Smuzhiyun * CPUID functions returning a single datum
135*4882a593Smuzhiyun */
136*4882a593Smuzhiyun unsigned int cpuid_eax(unsigned int op);
137*4882a593Smuzhiyun unsigned int cpuid_ebx(unsigned int op);
138*4882a593Smuzhiyun unsigned int cpuid_ecx(unsigned int op);
139*4882a593Smuzhiyun unsigned int cpuid_edx(unsigned int op);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun /* cpuid and cpuinfo helpers **************************/
142*4882a593Smuzhiyun /* X86 ONLY ********************************************/
143*4882a593Smuzhiyun #else
decode_pstates(unsigned int cpu,unsigned int cpu_family,int boost_states,unsigned long * pstates,int * no)144*4882a593Smuzhiyun static inline int decode_pstates(unsigned int cpu, unsigned int cpu_family,
145*4882a593Smuzhiyun int boost_states, unsigned long *pstates,
146*4882a593Smuzhiyun int *no)
147*4882a593Smuzhiyun { return -1; };
148*4882a593Smuzhiyun
read_msr(int cpu,unsigned int idx,unsigned long long * val)149*4882a593Smuzhiyun static inline int read_msr(int cpu, unsigned int idx, unsigned long long *val)
150*4882a593Smuzhiyun { return -1; };
write_msr(int cpu,unsigned int idx,unsigned long long val)151*4882a593Smuzhiyun static inline int write_msr(int cpu, unsigned int idx, unsigned long long val)
152*4882a593Smuzhiyun { return -1; };
msr_intel_set_perf_bias(unsigned int cpu,unsigned int val)153*4882a593Smuzhiyun static inline int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val)
154*4882a593Smuzhiyun { return -1; };
msr_intel_get_perf_bias(unsigned int cpu)155*4882a593Smuzhiyun static inline int msr_intel_get_perf_bias(unsigned int cpu)
156*4882a593Smuzhiyun { return -1; };
msr_intel_get_turbo_ratio(unsigned int cpu)157*4882a593Smuzhiyun static inline unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu)
158*4882a593Smuzhiyun { return 0; };
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* Read/Write msr ****************************/
161*4882a593Smuzhiyun
cpufreq_has_boost_support(unsigned int cpu,int * support,int * active,int * states)162*4882a593Smuzhiyun static inline int cpufreq_has_boost_support(unsigned int cpu, int *support,
163*4882a593Smuzhiyun int *active, int * states)
164*4882a593Smuzhiyun { return -1; }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun /* cpuid and cpuinfo helpers **************************/
167*4882a593Smuzhiyun
cpuid_eax(unsigned int op)168*4882a593Smuzhiyun static inline unsigned int cpuid_eax(unsigned int op) { return 0; };
cpuid_ebx(unsigned int op)169*4882a593Smuzhiyun static inline unsigned int cpuid_ebx(unsigned int op) { return 0; };
cpuid_ecx(unsigned int op)170*4882a593Smuzhiyun static inline unsigned int cpuid_ecx(unsigned int op) { return 0; };
cpuid_edx(unsigned int op)171*4882a593Smuzhiyun static inline unsigned int cpuid_edx(unsigned int op) { return 0; };
172*4882a593Smuzhiyun #endif /* defined(__i386__) || defined(__x86_64__) */
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun #endif /* __CPUPOWERUTILS_HELPERS__ */
175