1*4882a593Smuzhiyun[config] 2*4882a593Smuzhiyuncommand = stat 3*4882a593Smuzhiyunargs = -ddd kill >/dev/null 2>&1 4*4882a593Smuzhiyunret = 1 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_TASK_CLOCK 8*4882a593Smuzhiyun[event1:base-stat] 9*4882a593Smuzhiyunfd=1 10*4882a593Smuzhiyuntype=1 11*4882a593Smuzhiyunconfig=1 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CONTEXT_SWITCHES 14*4882a593Smuzhiyun[event2:base-stat] 15*4882a593Smuzhiyunfd=2 16*4882a593Smuzhiyuntype=1 17*4882a593Smuzhiyunconfig=3 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CPU_MIGRATIONS 20*4882a593Smuzhiyun[event3:base-stat] 21*4882a593Smuzhiyunfd=3 22*4882a593Smuzhiyuntype=1 23*4882a593Smuzhiyunconfig=4 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_PAGE_FAULTS 26*4882a593Smuzhiyun[event4:base-stat] 27*4882a593Smuzhiyunfd=4 28*4882a593Smuzhiyuntype=1 29*4882a593Smuzhiyunconfig=2 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun# PERF_TYPE_HARDWARE / PERF_COUNT_HW_CPU_CYCLES 32*4882a593Smuzhiyun[event5:base-stat] 33*4882a593Smuzhiyunfd=5 34*4882a593Smuzhiyuntype=0 35*4882a593Smuzhiyunconfig=0 36*4882a593Smuzhiyunoptional=1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_FRONTEND 39*4882a593Smuzhiyun[event6:base-stat] 40*4882a593Smuzhiyunfd=6 41*4882a593Smuzhiyuntype=0 42*4882a593Smuzhiyunconfig=7 43*4882a593Smuzhiyunoptional=1 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_BACKEND 46*4882a593Smuzhiyun[event7:base-stat] 47*4882a593Smuzhiyunfd=7 48*4882a593Smuzhiyuntype=0 49*4882a593Smuzhiyunconfig=8 50*4882a593Smuzhiyunoptional=1 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun# PERF_TYPE_HARDWARE / PERF_COUNT_HW_INSTRUCTIONS 53*4882a593Smuzhiyun[event8:base-stat] 54*4882a593Smuzhiyunfd=8 55*4882a593Smuzhiyuntype=0 56*4882a593Smuzhiyunconfig=1 57*4882a593Smuzhiyunoptional=1 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_INSTRUCTIONS 60*4882a593Smuzhiyun[event9:base-stat] 61*4882a593Smuzhiyunfd=9 62*4882a593Smuzhiyuntype=0 63*4882a593Smuzhiyunconfig=4 64*4882a593Smuzhiyunoptional=1 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_MISSES 67*4882a593Smuzhiyun[event10:base-stat] 68*4882a593Smuzhiyunfd=10 69*4882a593Smuzhiyuntype=0 70*4882a593Smuzhiyunconfig=5 71*4882a593Smuzhiyunoptional=1 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE / 74*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_L1D << 0 | 75*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 76*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) 77*4882a593Smuzhiyun[event11:base-stat] 78*4882a593Smuzhiyunfd=11 79*4882a593Smuzhiyuntype=3 80*4882a593Smuzhiyunconfig=0 81*4882a593Smuzhiyunoptional=1 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE / 84*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_L1D << 0 | 85*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 86*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) 87*4882a593Smuzhiyun[event12:base-stat] 88*4882a593Smuzhiyunfd=12 89*4882a593Smuzhiyuntype=3 90*4882a593Smuzhiyunconfig=65536 91*4882a593Smuzhiyunoptional=1 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE / 94*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_LL << 0 | 95*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 96*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) 97*4882a593Smuzhiyun[event13:base-stat] 98*4882a593Smuzhiyunfd=13 99*4882a593Smuzhiyuntype=3 100*4882a593Smuzhiyunconfig=2 101*4882a593Smuzhiyunoptional=1 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 104*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_LL << 0 | 105*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 106*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) 107*4882a593Smuzhiyun[event14:base-stat] 108*4882a593Smuzhiyunfd=14 109*4882a593Smuzhiyuntype=3 110*4882a593Smuzhiyunconfig=65538 111*4882a593Smuzhiyunoptional=1 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 114*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_L1I << 0 | 115*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 116*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) 117*4882a593Smuzhiyun[event15:base-stat] 118*4882a593Smuzhiyunfd=15 119*4882a593Smuzhiyuntype=3 120*4882a593Smuzhiyunconfig=1 121*4882a593Smuzhiyunoptional=1 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 124*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_L1I << 0 | 125*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 126*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) 127*4882a593Smuzhiyun[event16:base-stat] 128*4882a593Smuzhiyunfd=16 129*4882a593Smuzhiyuntype=3 130*4882a593Smuzhiyunconfig=65537 131*4882a593Smuzhiyunoptional=1 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 134*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_DTLB << 0 | 135*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 136*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) 137*4882a593Smuzhiyun[event17:base-stat] 138*4882a593Smuzhiyunfd=17 139*4882a593Smuzhiyuntype=3 140*4882a593Smuzhiyunconfig=3 141*4882a593Smuzhiyunoptional=1 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 144*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_DTLB << 0 | 145*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 146*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) 147*4882a593Smuzhiyun[event18:base-stat] 148*4882a593Smuzhiyunfd=18 149*4882a593Smuzhiyuntype=3 150*4882a593Smuzhiyunconfig=65539 151*4882a593Smuzhiyunoptional=1 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 154*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_ITLB << 0 | 155*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 156*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) 157*4882a593Smuzhiyun[event19:base-stat] 158*4882a593Smuzhiyunfd=19 159*4882a593Smuzhiyuntype=3 160*4882a593Smuzhiyunconfig=4 161*4882a593Smuzhiyunoptional=1 162*4882a593Smuzhiyun 163*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 164*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_ITLB << 0 | 165*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_READ << 8) | 166*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) 167*4882a593Smuzhiyun[event20:base-stat] 168*4882a593Smuzhiyunfd=20 169*4882a593Smuzhiyuntype=3 170*4882a593Smuzhiyunconfig=65540 171*4882a593Smuzhiyunoptional=1 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 174*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_L1D << 0 | 175*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) | 176*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16) 177*4882a593Smuzhiyun[event21:base-stat] 178*4882a593Smuzhiyunfd=21 179*4882a593Smuzhiyuntype=3 180*4882a593Smuzhiyunconfig=512 181*4882a593Smuzhiyunoptional=1 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun# PERF_TYPE_HW_CACHE, 184*4882a593Smuzhiyun# PERF_COUNT_HW_CACHE_L1D << 0 | 185*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) | 186*4882a593Smuzhiyun# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16) 187*4882a593Smuzhiyun[event22:base-stat] 188*4882a593Smuzhiyunfd=22 189*4882a593Smuzhiyuntype=3 190*4882a593Smuzhiyunconfig=66048 191*4882a593Smuzhiyunoptional=1 192