1*4882a593Smuzhiyun[ 2*4882a593Smuzhiyun { 3*4882a593Smuzhiyun "EventCode": "0x14", 4*4882a593Smuzhiyun "Counter": "0,1,2,3", 5*4882a593Smuzhiyun "UMask": "0x1", 6*4882a593Smuzhiyun "EventName": "ARITH.CYCLES_DIV_BUSY", 7*4882a593Smuzhiyun "SampleAfterValue": "2000000", 8*4882a593Smuzhiyun "BriefDescription": "Cycles the divider is busy" 9*4882a593Smuzhiyun }, 10*4882a593Smuzhiyun { 11*4882a593Smuzhiyun "EventCode": "0x14", 12*4882a593Smuzhiyun "Invert": "1", 13*4882a593Smuzhiyun "Counter": "0,1,2,3", 14*4882a593Smuzhiyun "UMask": "0x1", 15*4882a593Smuzhiyun "EventName": "ARITH.DIV", 16*4882a593Smuzhiyun "SampleAfterValue": "2000000", 17*4882a593Smuzhiyun "BriefDescription": "Divide Operations executed", 18*4882a593Smuzhiyun "CounterMask": "1", 19*4882a593Smuzhiyun "EdgeDetect": "1" 20*4882a593Smuzhiyun }, 21*4882a593Smuzhiyun { 22*4882a593Smuzhiyun "EventCode": "0x14", 23*4882a593Smuzhiyun "Counter": "0,1,2,3", 24*4882a593Smuzhiyun "UMask": "0x2", 25*4882a593Smuzhiyun "EventName": "ARITH.MUL", 26*4882a593Smuzhiyun "SampleAfterValue": "2000000", 27*4882a593Smuzhiyun "BriefDescription": "Multiply operations executed" 28*4882a593Smuzhiyun }, 29*4882a593Smuzhiyun { 30*4882a593Smuzhiyun "EventCode": "0xE6", 31*4882a593Smuzhiyun "Counter": "0,1,2,3", 32*4882a593Smuzhiyun "UMask": "0x2", 33*4882a593Smuzhiyun "EventName": "BACLEAR.BAD_TARGET", 34*4882a593Smuzhiyun "SampleAfterValue": "2000000", 35*4882a593Smuzhiyun "BriefDescription": "BACLEAR asserted with bad target address" 36*4882a593Smuzhiyun }, 37*4882a593Smuzhiyun { 38*4882a593Smuzhiyun "EventCode": "0xE6", 39*4882a593Smuzhiyun "Counter": "0,1,2,3", 40*4882a593Smuzhiyun "UMask": "0x1", 41*4882a593Smuzhiyun "EventName": "BACLEAR.CLEAR", 42*4882a593Smuzhiyun "SampleAfterValue": "2000000", 43*4882a593Smuzhiyun "BriefDescription": "BACLEAR asserted, regardless of cause " 44*4882a593Smuzhiyun }, 45*4882a593Smuzhiyun { 46*4882a593Smuzhiyun "EventCode": "0xA7", 47*4882a593Smuzhiyun "Counter": "0,1,2,3", 48*4882a593Smuzhiyun "UMask": "0x1", 49*4882a593Smuzhiyun "EventName": "BACLEAR_FORCE_IQ", 50*4882a593Smuzhiyun "SampleAfterValue": "2000000", 51*4882a593Smuzhiyun "BriefDescription": "Instruction queue forced BACLEAR" 52*4882a593Smuzhiyun }, 53*4882a593Smuzhiyun { 54*4882a593Smuzhiyun "EventCode": "0xE0", 55*4882a593Smuzhiyun "Counter": "0,1,2,3", 56*4882a593Smuzhiyun "UMask": "0x1", 57*4882a593Smuzhiyun "EventName": "BR_INST_DECODED", 58*4882a593Smuzhiyun "SampleAfterValue": "2000000", 59*4882a593Smuzhiyun "BriefDescription": "Branch instructions decoded" 60*4882a593Smuzhiyun }, 61*4882a593Smuzhiyun { 62*4882a593Smuzhiyun "EventCode": "0x88", 63*4882a593Smuzhiyun "Counter": "0,1,2,3", 64*4882a593Smuzhiyun "UMask": "0x7f", 65*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.ANY", 66*4882a593Smuzhiyun "SampleAfterValue": "200000", 67*4882a593Smuzhiyun "BriefDescription": "Branch instructions executed" 68*4882a593Smuzhiyun }, 69*4882a593Smuzhiyun { 70*4882a593Smuzhiyun "EventCode": "0x88", 71*4882a593Smuzhiyun "Counter": "0,1,2,3", 72*4882a593Smuzhiyun "UMask": "0x1", 73*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.COND", 74*4882a593Smuzhiyun "SampleAfterValue": "200000", 75*4882a593Smuzhiyun "BriefDescription": "Conditional branch instructions executed" 76*4882a593Smuzhiyun }, 77*4882a593Smuzhiyun { 78*4882a593Smuzhiyun "EventCode": "0x88", 79*4882a593Smuzhiyun "Counter": "0,1,2,3", 80*4882a593Smuzhiyun "UMask": "0x2", 81*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.DIRECT", 82*4882a593Smuzhiyun "SampleAfterValue": "200000", 83*4882a593Smuzhiyun "BriefDescription": "Unconditional branches executed" 84*4882a593Smuzhiyun }, 85*4882a593Smuzhiyun { 86*4882a593Smuzhiyun "EventCode": "0x88", 87*4882a593Smuzhiyun "Counter": "0,1,2,3", 88*4882a593Smuzhiyun "UMask": "0x10", 89*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.DIRECT_NEAR_CALL", 90*4882a593Smuzhiyun "SampleAfterValue": "20000", 91*4882a593Smuzhiyun "BriefDescription": "Unconditional call branches executed" 92*4882a593Smuzhiyun }, 93*4882a593Smuzhiyun { 94*4882a593Smuzhiyun "EventCode": "0x88", 95*4882a593Smuzhiyun "Counter": "0,1,2,3", 96*4882a593Smuzhiyun "UMask": "0x20", 97*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.INDIRECT_NEAR_CALL", 98*4882a593Smuzhiyun "SampleAfterValue": "20000", 99*4882a593Smuzhiyun "BriefDescription": "Indirect call branches executed" 100*4882a593Smuzhiyun }, 101*4882a593Smuzhiyun { 102*4882a593Smuzhiyun "EventCode": "0x88", 103*4882a593Smuzhiyun "Counter": "0,1,2,3", 104*4882a593Smuzhiyun "UMask": "0x4", 105*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.INDIRECT_NON_CALL", 106*4882a593Smuzhiyun "SampleAfterValue": "20000", 107*4882a593Smuzhiyun "BriefDescription": "Indirect non call branches executed" 108*4882a593Smuzhiyun }, 109*4882a593Smuzhiyun { 110*4882a593Smuzhiyun "EventCode": "0x88", 111*4882a593Smuzhiyun "Counter": "0,1,2,3", 112*4882a593Smuzhiyun "UMask": "0x30", 113*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.NEAR_CALLS", 114*4882a593Smuzhiyun "SampleAfterValue": "20000", 115*4882a593Smuzhiyun "BriefDescription": "Call branches executed" 116*4882a593Smuzhiyun }, 117*4882a593Smuzhiyun { 118*4882a593Smuzhiyun "EventCode": "0x88", 119*4882a593Smuzhiyun "Counter": "0,1,2,3", 120*4882a593Smuzhiyun "UMask": "0x7", 121*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.NON_CALLS", 122*4882a593Smuzhiyun "SampleAfterValue": "200000", 123*4882a593Smuzhiyun "BriefDescription": "All non call branches executed" 124*4882a593Smuzhiyun }, 125*4882a593Smuzhiyun { 126*4882a593Smuzhiyun "EventCode": "0x88", 127*4882a593Smuzhiyun "Counter": "0,1,2,3", 128*4882a593Smuzhiyun "UMask": "0x8", 129*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.RETURN_NEAR", 130*4882a593Smuzhiyun "SampleAfterValue": "20000", 131*4882a593Smuzhiyun "BriefDescription": "Indirect return branches executed" 132*4882a593Smuzhiyun }, 133*4882a593Smuzhiyun { 134*4882a593Smuzhiyun "EventCode": "0x88", 135*4882a593Smuzhiyun "Counter": "0,1,2,3", 136*4882a593Smuzhiyun "UMask": "0x40", 137*4882a593Smuzhiyun "EventName": "BR_INST_EXEC.TAKEN", 138*4882a593Smuzhiyun "SampleAfterValue": "200000", 139*4882a593Smuzhiyun "BriefDescription": "Taken branches executed" 140*4882a593Smuzhiyun }, 141*4882a593Smuzhiyun { 142*4882a593Smuzhiyun "PEBS": "1", 143*4882a593Smuzhiyun "EventCode": "0xC4", 144*4882a593Smuzhiyun "Counter": "0,1,2,3", 145*4882a593Smuzhiyun "UMask": "0x4", 146*4882a593Smuzhiyun "EventName": "BR_INST_RETIRED.ALL_BRANCHES", 147*4882a593Smuzhiyun "SampleAfterValue": "200000", 148*4882a593Smuzhiyun "BriefDescription": "Retired branch instructions (Precise Event)" 149*4882a593Smuzhiyun }, 150*4882a593Smuzhiyun { 151*4882a593Smuzhiyun "PEBS": "1", 152*4882a593Smuzhiyun "EventCode": "0xC4", 153*4882a593Smuzhiyun "Counter": "0,1,2,3", 154*4882a593Smuzhiyun "UMask": "0x1", 155*4882a593Smuzhiyun "EventName": "BR_INST_RETIRED.CONDITIONAL", 156*4882a593Smuzhiyun "SampleAfterValue": "200000", 157*4882a593Smuzhiyun "BriefDescription": "Retired conditional branch instructions (Precise Event)" 158*4882a593Smuzhiyun }, 159*4882a593Smuzhiyun { 160*4882a593Smuzhiyun "PEBS": "1", 161*4882a593Smuzhiyun "EventCode": "0xC4", 162*4882a593Smuzhiyun "Counter": "0,1,2,3", 163*4882a593Smuzhiyun "UMask": "0x2", 164*4882a593Smuzhiyun "EventName": "BR_INST_RETIRED.NEAR_CALL", 165*4882a593Smuzhiyun "SampleAfterValue": "20000", 166*4882a593Smuzhiyun "BriefDescription": "Retired near call instructions (Precise Event)" 167*4882a593Smuzhiyun }, 168*4882a593Smuzhiyun { 169*4882a593Smuzhiyun "EventCode": "0x89", 170*4882a593Smuzhiyun "Counter": "0,1,2,3", 171*4882a593Smuzhiyun "UMask": "0x7f", 172*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.ANY", 173*4882a593Smuzhiyun "SampleAfterValue": "20000", 174*4882a593Smuzhiyun "BriefDescription": "Mispredicted branches executed" 175*4882a593Smuzhiyun }, 176*4882a593Smuzhiyun { 177*4882a593Smuzhiyun "EventCode": "0x89", 178*4882a593Smuzhiyun "Counter": "0,1,2,3", 179*4882a593Smuzhiyun "UMask": "0x1", 180*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.COND", 181*4882a593Smuzhiyun "SampleAfterValue": "20000", 182*4882a593Smuzhiyun "BriefDescription": "Mispredicted conditional branches executed" 183*4882a593Smuzhiyun }, 184*4882a593Smuzhiyun { 185*4882a593Smuzhiyun "EventCode": "0x89", 186*4882a593Smuzhiyun "Counter": "0,1,2,3", 187*4882a593Smuzhiyun "UMask": "0x2", 188*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.DIRECT", 189*4882a593Smuzhiyun "SampleAfterValue": "20000", 190*4882a593Smuzhiyun "BriefDescription": "Mispredicted unconditional branches executed" 191*4882a593Smuzhiyun }, 192*4882a593Smuzhiyun { 193*4882a593Smuzhiyun "EventCode": "0x89", 194*4882a593Smuzhiyun "Counter": "0,1,2,3", 195*4882a593Smuzhiyun "UMask": "0x10", 196*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.DIRECT_NEAR_CALL", 197*4882a593Smuzhiyun "SampleAfterValue": "2000", 198*4882a593Smuzhiyun "BriefDescription": "Mispredicted non call branches executed" 199*4882a593Smuzhiyun }, 200*4882a593Smuzhiyun { 201*4882a593Smuzhiyun "EventCode": "0x89", 202*4882a593Smuzhiyun "Counter": "0,1,2,3", 203*4882a593Smuzhiyun "UMask": "0x20", 204*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.INDIRECT_NEAR_CALL", 205*4882a593Smuzhiyun "SampleAfterValue": "2000", 206*4882a593Smuzhiyun "BriefDescription": "Mispredicted indirect call branches executed" 207*4882a593Smuzhiyun }, 208*4882a593Smuzhiyun { 209*4882a593Smuzhiyun "EventCode": "0x89", 210*4882a593Smuzhiyun "Counter": "0,1,2,3", 211*4882a593Smuzhiyun "UMask": "0x4", 212*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.INDIRECT_NON_CALL", 213*4882a593Smuzhiyun "SampleAfterValue": "2000", 214*4882a593Smuzhiyun "BriefDescription": "Mispredicted indirect non call branches executed" 215*4882a593Smuzhiyun }, 216*4882a593Smuzhiyun { 217*4882a593Smuzhiyun "EventCode": "0x89", 218*4882a593Smuzhiyun "Counter": "0,1,2,3", 219*4882a593Smuzhiyun "UMask": "0x30", 220*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.NEAR_CALLS", 221*4882a593Smuzhiyun "SampleAfterValue": "2000", 222*4882a593Smuzhiyun "BriefDescription": "Mispredicted call branches executed" 223*4882a593Smuzhiyun }, 224*4882a593Smuzhiyun { 225*4882a593Smuzhiyun "EventCode": "0x89", 226*4882a593Smuzhiyun "Counter": "0,1,2,3", 227*4882a593Smuzhiyun "UMask": "0x7", 228*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.NON_CALLS", 229*4882a593Smuzhiyun "SampleAfterValue": "20000", 230*4882a593Smuzhiyun "BriefDescription": "Mispredicted non call branches executed" 231*4882a593Smuzhiyun }, 232*4882a593Smuzhiyun { 233*4882a593Smuzhiyun "EventCode": "0x89", 234*4882a593Smuzhiyun "Counter": "0,1,2,3", 235*4882a593Smuzhiyun "UMask": "0x8", 236*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.RETURN_NEAR", 237*4882a593Smuzhiyun "SampleAfterValue": "2000", 238*4882a593Smuzhiyun "BriefDescription": "Mispredicted return branches executed" 239*4882a593Smuzhiyun }, 240*4882a593Smuzhiyun { 241*4882a593Smuzhiyun "EventCode": "0x89", 242*4882a593Smuzhiyun "Counter": "0,1,2,3", 243*4882a593Smuzhiyun "UMask": "0x40", 244*4882a593Smuzhiyun "EventName": "BR_MISP_EXEC.TAKEN", 245*4882a593Smuzhiyun "SampleAfterValue": "20000", 246*4882a593Smuzhiyun "BriefDescription": "Mispredicted taken branches executed" 247*4882a593Smuzhiyun }, 248*4882a593Smuzhiyun { 249*4882a593Smuzhiyun "PEBS": "1", 250*4882a593Smuzhiyun "EventCode": "0xC5", 251*4882a593Smuzhiyun "Counter": "0,1,2,3", 252*4882a593Smuzhiyun "UMask": "0x4", 253*4882a593Smuzhiyun "EventName": "BR_MISP_RETIRED.ALL_BRANCHES", 254*4882a593Smuzhiyun "SampleAfterValue": "20000", 255*4882a593Smuzhiyun "BriefDescription": "Mispredicted retired branch instructions (Precise Event)" 256*4882a593Smuzhiyun }, 257*4882a593Smuzhiyun { 258*4882a593Smuzhiyun "PEBS": "1", 259*4882a593Smuzhiyun "EventCode": "0xC5", 260*4882a593Smuzhiyun "Counter": "0,1,2,3", 261*4882a593Smuzhiyun "UMask": "0x1", 262*4882a593Smuzhiyun "EventName": "BR_MISP_RETIRED.CONDITIONAL", 263*4882a593Smuzhiyun "SampleAfterValue": "20000", 264*4882a593Smuzhiyun "BriefDescription": "Mispredicted conditional retired branches (Precise Event)" 265*4882a593Smuzhiyun }, 266*4882a593Smuzhiyun { 267*4882a593Smuzhiyun "PEBS": "1", 268*4882a593Smuzhiyun "EventCode": "0xC5", 269*4882a593Smuzhiyun "Counter": "0,1,2,3", 270*4882a593Smuzhiyun "UMask": "0x2", 271*4882a593Smuzhiyun "EventName": "BR_MISP_RETIRED.NEAR_CALL", 272*4882a593Smuzhiyun "SampleAfterValue": "2000", 273*4882a593Smuzhiyun "BriefDescription": "Mispredicted near retired calls (Precise Event)" 274*4882a593Smuzhiyun }, 275*4882a593Smuzhiyun { 276*4882a593Smuzhiyun "EventCode": "0x0", 277*4882a593Smuzhiyun "Counter": "Fixed counter 3", 278*4882a593Smuzhiyun "UMask": "0x0", 279*4882a593Smuzhiyun "EventName": "CPU_CLK_UNHALTED.REF", 280*4882a593Smuzhiyun "SampleAfterValue": "2000000", 281*4882a593Smuzhiyun "BriefDescription": "Reference cycles when thread is not halted (fixed counter)" 282*4882a593Smuzhiyun }, 283*4882a593Smuzhiyun { 284*4882a593Smuzhiyun "EventCode": "0x3C", 285*4882a593Smuzhiyun "Counter": "0,1,2,3", 286*4882a593Smuzhiyun "UMask": "0x1", 287*4882a593Smuzhiyun "EventName": "CPU_CLK_UNHALTED.REF_P", 288*4882a593Smuzhiyun "SampleAfterValue": "100000", 289*4882a593Smuzhiyun "BriefDescription": "Reference base clock (133 Mhz) cycles when thread is not halted (programmable counter)" 290*4882a593Smuzhiyun }, 291*4882a593Smuzhiyun { 292*4882a593Smuzhiyun "EventCode": "0x0", 293*4882a593Smuzhiyun "Counter": "Fixed counter 2", 294*4882a593Smuzhiyun "UMask": "0x0", 295*4882a593Smuzhiyun "EventName": "CPU_CLK_UNHALTED.THREAD", 296*4882a593Smuzhiyun "SampleAfterValue": "2000000", 297*4882a593Smuzhiyun "BriefDescription": "Cycles when thread is not halted (fixed counter)" 298*4882a593Smuzhiyun }, 299*4882a593Smuzhiyun { 300*4882a593Smuzhiyun "EventCode": "0x3C", 301*4882a593Smuzhiyun "Counter": "0,1,2,3", 302*4882a593Smuzhiyun "UMask": "0x0", 303*4882a593Smuzhiyun "EventName": "CPU_CLK_UNHALTED.THREAD_P", 304*4882a593Smuzhiyun "SampleAfterValue": "2000000", 305*4882a593Smuzhiyun "BriefDescription": "Cycles when thread is not halted (programmable counter)" 306*4882a593Smuzhiyun }, 307*4882a593Smuzhiyun { 308*4882a593Smuzhiyun "EventCode": "0x3C", 309*4882a593Smuzhiyun "Invert": "1", 310*4882a593Smuzhiyun "Counter": "0,1,2,3", 311*4882a593Smuzhiyun "UMask": "0x0", 312*4882a593Smuzhiyun "EventName": "CPU_CLK_UNHALTED.TOTAL_CYCLES", 313*4882a593Smuzhiyun "SampleAfterValue": "2000000", 314*4882a593Smuzhiyun "BriefDescription": "Total CPU cycles", 315*4882a593Smuzhiyun "CounterMask": "2" 316*4882a593Smuzhiyun }, 317*4882a593Smuzhiyun { 318*4882a593Smuzhiyun "EventCode": "0x87", 319*4882a593Smuzhiyun "Counter": "0,1,2,3", 320*4882a593Smuzhiyun "UMask": "0xf", 321*4882a593Smuzhiyun "EventName": "ILD_STALL.ANY", 322*4882a593Smuzhiyun "SampleAfterValue": "2000000", 323*4882a593Smuzhiyun "BriefDescription": "Any Instruction Length Decoder stall cycles" 324*4882a593Smuzhiyun }, 325*4882a593Smuzhiyun { 326*4882a593Smuzhiyun "EventCode": "0x87", 327*4882a593Smuzhiyun "Counter": "0,1,2,3", 328*4882a593Smuzhiyun "UMask": "0x4", 329*4882a593Smuzhiyun "EventName": "ILD_STALL.IQ_FULL", 330*4882a593Smuzhiyun "SampleAfterValue": "2000000", 331*4882a593Smuzhiyun "BriefDescription": "Instruction Queue full stall cycles" 332*4882a593Smuzhiyun }, 333*4882a593Smuzhiyun { 334*4882a593Smuzhiyun "EventCode": "0x87", 335*4882a593Smuzhiyun "Counter": "0,1,2,3", 336*4882a593Smuzhiyun "UMask": "0x1", 337*4882a593Smuzhiyun "EventName": "ILD_STALL.LCP", 338*4882a593Smuzhiyun "SampleAfterValue": "2000000", 339*4882a593Smuzhiyun "BriefDescription": "Length Change Prefix stall cycles" 340*4882a593Smuzhiyun }, 341*4882a593Smuzhiyun { 342*4882a593Smuzhiyun "EventCode": "0x87", 343*4882a593Smuzhiyun "Counter": "0,1,2,3", 344*4882a593Smuzhiyun "UMask": "0x2", 345*4882a593Smuzhiyun "EventName": "ILD_STALL.MRU", 346*4882a593Smuzhiyun "SampleAfterValue": "2000000", 347*4882a593Smuzhiyun "BriefDescription": "Stall cycles due to BPU MRU bypass" 348*4882a593Smuzhiyun }, 349*4882a593Smuzhiyun { 350*4882a593Smuzhiyun "EventCode": "0x87", 351*4882a593Smuzhiyun "Counter": "0,1,2,3", 352*4882a593Smuzhiyun "UMask": "0x8", 353*4882a593Smuzhiyun "EventName": "ILD_STALL.REGEN", 354*4882a593Smuzhiyun "SampleAfterValue": "2000000", 355*4882a593Smuzhiyun "BriefDescription": "Regen stall cycles" 356*4882a593Smuzhiyun }, 357*4882a593Smuzhiyun { 358*4882a593Smuzhiyun "EventCode": "0x18", 359*4882a593Smuzhiyun "Counter": "0,1,2,3", 360*4882a593Smuzhiyun "UMask": "0x1", 361*4882a593Smuzhiyun "EventName": "INST_DECODED.DEC0", 362*4882a593Smuzhiyun "SampleAfterValue": "2000000", 363*4882a593Smuzhiyun "BriefDescription": "Instructions that must be decoded by decoder 0" 364*4882a593Smuzhiyun }, 365*4882a593Smuzhiyun { 366*4882a593Smuzhiyun "EventCode": "0x1E", 367*4882a593Smuzhiyun "Counter": "0,1,2,3", 368*4882a593Smuzhiyun "UMask": "0x1", 369*4882a593Smuzhiyun "EventName": "INST_QUEUE_WRITE_CYCLES", 370*4882a593Smuzhiyun "SampleAfterValue": "2000000", 371*4882a593Smuzhiyun "BriefDescription": "Cycles instructions are written to the instruction queue" 372*4882a593Smuzhiyun }, 373*4882a593Smuzhiyun { 374*4882a593Smuzhiyun "EventCode": "0x17", 375*4882a593Smuzhiyun "Counter": "0,1,2,3", 376*4882a593Smuzhiyun "UMask": "0x1", 377*4882a593Smuzhiyun "EventName": "INST_QUEUE_WRITES", 378*4882a593Smuzhiyun "SampleAfterValue": "2000000", 379*4882a593Smuzhiyun "BriefDescription": "Instructions written to instruction queue." 380*4882a593Smuzhiyun }, 381*4882a593Smuzhiyun { 382*4882a593Smuzhiyun "EventCode": "0x0", 383*4882a593Smuzhiyun "Counter": "Fixed counter 1", 384*4882a593Smuzhiyun "UMask": "0x0", 385*4882a593Smuzhiyun "EventName": "INST_RETIRED.ANY", 386*4882a593Smuzhiyun "SampleAfterValue": "2000000", 387*4882a593Smuzhiyun "BriefDescription": "Instructions retired (fixed counter)" 388*4882a593Smuzhiyun }, 389*4882a593Smuzhiyun { 390*4882a593Smuzhiyun "PEBS": "1", 391*4882a593Smuzhiyun "EventCode": "0xC0", 392*4882a593Smuzhiyun "Counter": "0,1,2,3", 393*4882a593Smuzhiyun "UMask": "0x1", 394*4882a593Smuzhiyun "EventName": "INST_RETIRED.ANY_P", 395*4882a593Smuzhiyun "SampleAfterValue": "2000000", 396*4882a593Smuzhiyun "BriefDescription": "Instructions retired (Programmable counter and Precise Event)" 397*4882a593Smuzhiyun }, 398*4882a593Smuzhiyun { 399*4882a593Smuzhiyun "PEBS": "1", 400*4882a593Smuzhiyun "EventCode": "0xC0", 401*4882a593Smuzhiyun "Counter": "0,1,2,3", 402*4882a593Smuzhiyun "UMask": "0x4", 403*4882a593Smuzhiyun "EventName": "INST_RETIRED.MMX", 404*4882a593Smuzhiyun "SampleAfterValue": "2000000", 405*4882a593Smuzhiyun "BriefDescription": "Retired MMX instructions (Precise Event)" 406*4882a593Smuzhiyun }, 407*4882a593Smuzhiyun { 408*4882a593Smuzhiyun "PEBS": "1", 409*4882a593Smuzhiyun "EventCode": "0xC0", 410*4882a593Smuzhiyun "Invert": "1", 411*4882a593Smuzhiyun "Counter": "0,1,2,3", 412*4882a593Smuzhiyun "UMask": "0x1", 413*4882a593Smuzhiyun "EventName": "INST_RETIRED.TOTAL_CYCLES", 414*4882a593Smuzhiyun "SampleAfterValue": "2000000", 415*4882a593Smuzhiyun "BriefDescription": "Total cycles (Precise Event)", 416*4882a593Smuzhiyun "CounterMask": "16" 417*4882a593Smuzhiyun }, 418*4882a593Smuzhiyun { 419*4882a593Smuzhiyun "PEBS": "1", 420*4882a593Smuzhiyun "EventCode": "0xC0", 421*4882a593Smuzhiyun "Counter": "0,1,2,3", 422*4882a593Smuzhiyun "UMask": "0x2", 423*4882a593Smuzhiyun "EventName": "INST_RETIRED.X87", 424*4882a593Smuzhiyun "SampleAfterValue": "2000000", 425*4882a593Smuzhiyun "BriefDescription": "Retired floating-point operations (Precise Event)" 426*4882a593Smuzhiyun }, 427*4882a593Smuzhiyun { 428*4882a593Smuzhiyun "EventCode": "0x4C", 429*4882a593Smuzhiyun "Counter": "0,1", 430*4882a593Smuzhiyun "UMask": "0x1", 431*4882a593Smuzhiyun "EventName": "LOAD_HIT_PRE", 432*4882a593Smuzhiyun "SampleAfterValue": "200000", 433*4882a593Smuzhiyun "BriefDescription": "Load operations conflicting with software prefetches" 434*4882a593Smuzhiyun }, 435*4882a593Smuzhiyun { 436*4882a593Smuzhiyun "EventCode": "0xA8", 437*4882a593Smuzhiyun "Counter": "0,1,2,3", 438*4882a593Smuzhiyun "UMask": "0x1", 439*4882a593Smuzhiyun "EventName": "LSD.ACTIVE", 440*4882a593Smuzhiyun "SampleAfterValue": "2000000", 441*4882a593Smuzhiyun "BriefDescription": "Cycles when uops were delivered by the LSD", 442*4882a593Smuzhiyun "CounterMask": "1" 443*4882a593Smuzhiyun }, 444*4882a593Smuzhiyun { 445*4882a593Smuzhiyun "EventCode": "0xA8", 446*4882a593Smuzhiyun "Invert": "1", 447*4882a593Smuzhiyun "Counter": "0,1,2,3", 448*4882a593Smuzhiyun "UMask": "0x1", 449*4882a593Smuzhiyun "EventName": "LSD.INACTIVE", 450*4882a593Smuzhiyun "SampleAfterValue": "2000000", 451*4882a593Smuzhiyun "BriefDescription": "Cycles no uops were delivered by the LSD", 452*4882a593Smuzhiyun "CounterMask": "1" 453*4882a593Smuzhiyun }, 454*4882a593Smuzhiyun { 455*4882a593Smuzhiyun "EventCode": "0x20", 456*4882a593Smuzhiyun "Counter": "0,1,2,3", 457*4882a593Smuzhiyun "UMask": "0x1", 458*4882a593Smuzhiyun "EventName": "LSD_OVERFLOW", 459*4882a593Smuzhiyun "SampleAfterValue": "2000000", 460*4882a593Smuzhiyun "BriefDescription": "Loops that can't stream from the instruction queue" 461*4882a593Smuzhiyun }, 462*4882a593Smuzhiyun { 463*4882a593Smuzhiyun "EventCode": "0xC3", 464*4882a593Smuzhiyun "Counter": "0,1,2,3", 465*4882a593Smuzhiyun "UMask": "0x1", 466*4882a593Smuzhiyun "EventName": "MACHINE_CLEARS.CYCLES", 467*4882a593Smuzhiyun "SampleAfterValue": "20000", 468*4882a593Smuzhiyun "BriefDescription": "Cycles machine clear asserted" 469*4882a593Smuzhiyun }, 470*4882a593Smuzhiyun { 471*4882a593Smuzhiyun "EventCode": "0xC3", 472*4882a593Smuzhiyun "Counter": "0,1,2,3", 473*4882a593Smuzhiyun "UMask": "0x2", 474*4882a593Smuzhiyun "EventName": "MACHINE_CLEARS.MEM_ORDER", 475*4882a593Smuzhiyun "SampleAfterValue": "20000", 476*4882a593Smuzhiyun "BriefDescription": "Execution pipeline restart due to Memory ordering conflicts" 477*4882a593Smuzhiyun }, 478*4882a593Smuzhiyun { 479*4882a593Smuzhiyun "EventCode": "0xC3", 480*4882a593Smuzhiyun "Counter": "0,1,2,3", 481*4882a593Smuzhiyun "UMask": "0x4", 482*4882a593Smuzhiyun "EventName": "MACHINE_CLEARS.SMC", 483*4882a593Smuzhiyun "SampleAfterValue": "20000", 484*4882a593Smuzhiyun "BriefDescription": "Self-Modifying Code detected" 485*4882a593Smuzhiyun }, 486*4882a593Smuzhiyun { 487*4882a593Smuzhiyun "EventCode": "0xA2", 488*4882a593Smuzhiyun "Counter": "0,1,2,3", 489*4882a593Smuzhiyun "UMask": "0x1", 490*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.ANY", 491*4882a593Smuzhiyun "SampleAfterValue": "2000000", 492*4882a593Smuzhiyun "BriefDescription": "Resource related stall cycles" 493*4882a593Smuzhiyun }, 494*4882a593Smuzhiyun { 495*4882a593Smuzhiyun "EventCode": "0xA2", 496*4882a593Smuzhiyun "Counter": "0,1,2,3", 497*4882a593Smuzhiyun "UMask": "0x20", 498*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.FPCW", 499*4882a593Smuzhiyun "SampleAfterValue": "2000000", 500*4882a593Smuzhiyun "BriefDescription": "FPU control word write stall cycles" 501*4882a593Smuzhiyun }, 502*4882a593Smuzhiyun { 503*4882a593Smuzhiyun "EventCode": "0xA2", 504*4882a593Smuzhiyun "Counter": "0,1,2,3", 505*4882a593Smuzhiyun "UMask": "0x2", 506*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.LOAD", 507*4882a593Smuzhiyun "SampleAfterValue": "2000000", 508*4882a593Smuzhiyun "BriefDescription": "Load buffer stall cycles" 509*4882a593Smuzhiyun }, 510*4882a593Smuzhiyun { 511*4882a593Smuzhiyun "EventCode": "0xA2", 512*4882a593Smuzhiyun "Counter": "0,1,2,3", 513*4882a593Smuzhiyun "UMask": "0x40", 514*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.MXCSR", 515*4882a593Smuzhiyun "SampleAfterValue": "2000000", 516*4882a593Smuzhiyun "BriefDescription": "MXCSR rename stall cycles" 517*4882a593Smuzhiyun }, 518*4882a593Smuzhiyun { 519*4882a593Smuzhiyun "EventCode": "0xA2", 520*4882a593Smuzhiyun "Counter": "0,1,2,3", 521*4882a593Smuzhiyun "UMask": "0x80", 522*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.OTHER", 523*4882a593Smuzhiyun "SampleAfterValue": "2000000", 524*4882a593Smuzhiyun "BriefDescription": "Other Resource related stall cycles" 525*4882a593Smuzhiyun }, 526*4882a593Smuzhiyun { 527*4882a593Smuzhiyun "EventCode": "0xA2", 528*4882a593Smuzhiyun "Counter": "0,1,2,3", 529*4882a593Smuzhiyun "UMask": "0x10", 530*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.ROB_FULL", 531*4882a593Smuzhiyun "SampleAfterValue": "2000000", 532*4882a593Smuzhiyun "BriefDescription": "ROB full stall cycles" 533*4882a593Smuzhiyun }, 534*4882a593Smuzhiyun { 535*4882a593Smuzhiyun "EventCode": "0xA2", 536*4882a593Smuzhiyun "Counter": "0,1,2,3", 537*4882a593Smuzhiyun "UMask": "0x4", 538*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.RS_FULL", 539*4882a593Smuzhiyun "SampleAfterValue": "2000000", 540*4882a593Smuzhiyun "BriefDescription": "Reservation Station full stall cycles" 541*4882a593Smuzhiyun }, 542*4882a593Smuzhiyun { 543*4882a593Smuzhiyun "EventCode": "0xA2", 544*4882a593Smuzhiyun "Counter": "0,1,2,3", 545*4882a593Smuzhiyun "UMask": "0x8", 546*4882a593Smuzhiyun "EventName": "RESOURCE_STALLS.STORE", 547*4882a593Smuzhiyun "SampleAfterValue": "2000000", 548*4882a593Smuzhiyun "BriefDescription": "Store buffer stall cycles" 549*4882a593Smuzhiyun }, 550*4882a593Smuzhiyun { 551*4882a593Smuzhiyun "PEBS": "1", 552*4882a593Smuzhiyun "EventCode": "0xC7", 553*4882a593Smuzhiyun "Counter": "0,1,2,3", 554*4882a593Smuzhiyun "UMask": "0x4", 555*4882a593Smuzhiyun "EventName": "SSEX_UOPS_RETIRED.PACKED_DOUBLE", 556*4882a593Smuzhiyun "SampleAfterValue": "200000", 557*4882a593Smuzhiyun "BriefDescription": "SIMD Packed-Double Uops retired (Precise Event)" 558*4882a593Smuzhiyun }, 559*4882a593Smuzhiyun { 560*4882a593Smuzhiyun "PEBS": "1", 561*4882a593Smuzhiyun "EventCode": "0xC7", 562*4882a593Smuzhiyun "Counter": "0,1,2,3", 563*4882a593Smuzhiyun "UMask": "0x1", 564*4882a593Smuzhiyun "EventName": "SSEX_UOPS_RETIRED.PACKED_SINGLE", 565*4882a593Smuzhiyun "SampleAfterValue": "200000", 566*4882a593Smuzhiyun "BriefDescription": "SIMD Packed-Single Uops retired (Precise Event)" 567*4882a593Smuzhiyun }, 568*4882a593Smuzhiyun { 569*4882a593Smuzhiyun "PEBS": "1", 570*4882a593Smuzhiyun "EventCode": "0xC7", 571*4882a593Smuzhiyun "Counter": "0,1,2,3", 572*4882a593Smuzhiyun "UMask": "0x8", 573*4882a593Smuzhiyun "EventName": "SSEX_UOPS_RETIRED.SCALAR_DOUBLE", 574*4882a593Smuzhiyun "SampleAfterValue": "200000", 575*4882a593Smuzhiyun "BriefDescription": "SIMD Scalar-Double Uops retired (Precise Event)" 576*4882a593Smuzhiyun }, 577*4882a593Smuzhiyun { 578*4882a593Smuzhiyun "PEBS": "1", 579*4882a593Smuzhiyun "EventCode": "0xC7", 580*4882a593Smuzhiyun "Counter": "0,1,2,3", 581*4882a593Smuzhiyun "UMask": "0x2", 582*4882a593Smuzhiyun "EventName": "SSEX_UOPS_RETIRED.SCALAR_SINGLE", 583*4882a593Smuzhiyun "SampleAfterValue": "200000", 584*4882a593Smuzhiyun "BriefDescription": "SIMD Scalar-Single Uops retired (Precise Event)" 585*4882a593Smuzhiyun }, 586*4882a593Smuzhiyun { 587*4882a593Smuzhiyun "PEBS": "1", 588*4882a593Smuzhiyun "EventCode": "0xC7", 589*4882a593Smuzhiyun "Counter": "0,1,2,3", 590*4882a593Smuzhiyun "UMask": "0x10", 591*4882a593Smuzhiyun "EventName": "SSEX_UOPS_RETIRED.VECTOR_INTEGER", 592*4882a593Smuzhiyun "SampleAfterValue": "200000", 593*4882a593Smuzhiyun "BriefDescription": "SIMD Vector Integer Uops retired (Precise Event)" 594*4882a593Smuzhiyun }, 595*4882a593Smuzhiyun { 596*4882a593Smuzhiyun "EventCode": "0xDB", 597*4882a593Smuzhiyun "Counter": "0,1,2,3", 598*4882a593Smuzhiyun "UMask": "0x1", 599*4882a593Smuzhiyun "EventName": "UOP_UNFUSION", 600*4882a593Smuzhiyun "SampleAfterValue": "2000000", 601*4882a593Smuzhiyun "BriefDescription": "Uop unfusions due to FP exceptions" 602*4882a593Smuzhiyun }, 603*4882a593Smuzhiyun { 604*4882a593Smuzhiyun "EventCode": "0xD1", 605*4882a593Smuzhiyun "Counter": "0,1,2,3", 606*4882a593Smuzhiyun "UMask": "0x4", 607*4882a593Smuzhiyun "EventName": "UOPS_DECODED.ESP_FOLDING", 608*4882a593Smuzhiyun "SampleAfterValue": "2000000", 609*4882a593Smuzhiyun "BriefDescription": "Stack pointer instructions decoded" 610*4882a593Smuzhiyun }, 611*4882a593Smuzhiyun { 612*4882a593Smuzhiyun "EventCode": "0xD1", 613*4882a593Smuzhiyun "Counter": "0,1,2,3", 614*4882a593Smuzhiyun "UMask": "0x8", 615*4882a593Smuzhiyun "EventName": "UOPS_DECODED.ESP_SYNC", 616*4882a593Smuzhiyun "SampleAfterValue": "2000000", 617*4882a593Smuzhiyun "BriefDescription": "Stack pointer sync operations" 618*4882a593Smuzhiyun }, 619*4882a593Smuzhiyun { 620*4882a593Smuzhiyun "EventCode": "0xD1", 621*4882a593Smuzhiyun "Counter": "0,1,2,3", 622*4882a593Smuzhiyun "UMask": "0x2", 623*4882a593Smuzhiyun "EventName": "UOPS_DECODED.MS_CYCLES_ACTIVE", 624*4882a593Smuzhiyun "SampleAfterValue": "2000000", 625*4882a593Smuzhiyun "BriefDescription": "Uops decoded by Microcode Sequencer", 626*4882a593Smuzhiyun "CounterMask": "1" 627*4882a593Smuzhiyun }, 628*4882a593Smuzhiyun { 629*4882a593Smuzhiyun "EventCode": "0xD1", 630*4882a593Smuzhiyun "Invert": "1", 631*4882a593Smuzhiyun "Counter": "0,1,2,3", 632*4882a593Smuzhiyun "UMask": "0x1", 633*4882a593Smuzhiyun "EventName": "UOPS_DECODED.STALL_CYCLES", 634*4882a593Smuzhiyun "SampleAfterValue": "2000000", 635*4882a593Smuzhiyun "BriefDescription": "Cycles no Uops are decoded", 636*4882a593Smuzhiyun "CounterMask": "1" 637*4882a593Smuzhiyun }, 638*4882a593Smuzhiyun { 639*4882a593Smuzhiyun "EventCode": "0xB1", 640*4882a593Smuzhiyun "Counter": "0,1,2,3", 641*4882a593Smuzhiyun "UMask": "0x3f", 642*4882a593Smuzhiyun "AnyThread": "1", 643*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES", 644*4882a593Smuzhiyun "SampleAfterValue": "2000000", 645*4882a593Smuzhiyun "BriefDescription": "Cycles Uops executed on any port (core count)", 646*4882a593Smuzhiyun "CounterMask": "1" 647*4882a593Smuzhiyun }, 648*4882a593Smuzhiyun { 649*4882a593Smuzhiyun "EventCode": "0xB1", 650*4882a593Smuzhiyun "Counter": "0,1,2,3", 651*4882a593Smuzhiyun "UMask": "0x1f", 652*4882a593Smuzhiyun "AnyThread": "1", 653*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.CORE_ACTIVE_CYCLES_NO_PORT5", 654*4882a593Smuzhiyun "SampleAfterValue": "2000000", 655*4882a593Smuzhiyun "BriefDescription": "Cycles Uops executed on ports 0-4 (core count)", 656*4882a593Smuzhiyun "CounterMask": "1" 657*4882a593Smuzhiyun }, 658*4882a593Smuzhiyun { 659*4882a593Smuzhiyun "EventCode": "0xB1", 660*4882a593Smuzhiyun "Invert": "1", 661*4882a593Smuzhiyun "Counter": "0,1,2,3", 662*4882a593Smuzhiyun "UMask": "0x3f", 663*4882a593Smuzhiyun "AnyThread": "1", 664*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.CORE_STALL_COUNT", 665*4882a593Smuzhiyun "SampleAfterValue": "2000000", 666*4882a593Smuzhiyun "BriefDescription": "Uops executed on any port (core count)", 667*4882a593Smuzhiyun "CounterMask": "1", 668*4882a593Smuzhiyun "EdgeDetect": "1" 669*4882a593Smuzhiyun }, 670*4882a593Smuzhiyun { 671*4882a593Smuzhiyun "EventCode": "0xB1", 672*4882a593Smuzhiyun "Invert": "1", 673*4882a593Smuzhiyun "Counter": "0,1,2,3", 674*4882a593Smuzhiyun "UMask": "0x1f", 675*4882a593Smuzhiyun "AnyThread": "1", 676*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.CORE_STALL_COUNT_NO_PORT5", 677*4882a593Smuzhiyun "SampleAfterValue": "2000000", 678*4882a593Smuzhiyun "BriefDescription": "Uops executed on ports 0-4 (core count)", 679*4882a593Smuzhiyun "CounterMask": "1", 680*4882a593Smuzhiyun "EdgeDetect": "1" 681*4882a593Smuzhiyun }, 682*4882a593Smuzhiyun { 683*4882a593Smuzhiyun "EventCode": "0xB1", 684*4882a593Smuzhiyun "Invert": "1", 685*4882a593Smuzhiyun "Counter": "0,1,2,3", 686*4882a593Smuzhiyun "UMask": "0x3f", 687*4882a593Smuzhiyun "AnyThread": "1", 688*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES", 689*4882a593Smuzhiyun "SampleAfterValue": "2000000", 690*4882a593Smuzhiyun "BriefDescription": "Cycles no Uops issued on any port (core count)", 691*4882a593Smuzhiyun "CounterMask": "1" 692*4882a593Smuzhiyun }, 693*4882a593Smuzhiyun { 694*4882a593Smuzhiyun "EventCode": "0xB1", 695*4882a593Smuzhiyun "Invert": "1", 696*4882a593Smuzhiyun "Counter": "0,1,2,3", 697*4882a593Smuzhiyun "UMask": "0x1f", 698*4882a593Smuzhiyun "AnyThread": "1", 699*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.CORE_STALL_CYCLES_NO_PORT5", 700*4882a593Smuzhiyun "SampleAfterValue": "2000000", 701*4882a593Smuzhiyun "BriefDescription": "Cycles no Uops issued on ports 0-4 (core count)", 702*4882a593Smuzhiyun "CounterMask": "1" 703*4882a593Smuzhiyun }, 704*4882a593Smuzhiyun { 705*4882a593Smuzhiyun "EventCode": "0xB1", 706*4882a593Smuzhiyun "Counter": "0,1,2,3", 707*4882a593Smuzhiyun "UMask": "0x1", 708*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT0", 709*4882a593Smuzhiyun "SampleAfterValue": "2000000", 710*4882a593Smuzhiyun "BriefDescription": "Uops executed on port 0" 711*4882a593Smuzhiyun }, 712*4882a593Smuzhiyun { 713*4882a593Smuzhiyun "EventCode": "0xB1", 714*4882a593Smuzhiyun "Counter": "0,1,2,3", 715*4882a593Smuzhiyun "UMask": "0x40", 716*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT015", 717*4882a593Smuzhiyun "SampleAfterValue": "2000000", 718*4882a593Smuzhiyun "BriefDescription": "Uops issued on ports 0, 1 or 5" 719*4882a593Smuzhiyun }, 720*4882a593Smuzhiyun { 721*4882a593Smuzhiyun "EventCode": "0xB1", 722*4882a593Smuzhiyun "Invert": "1", 723*4882a593Smuzhiyun "Counter": "0,1,2,3", 724*4882a593Smuzhiyun "UMask": "0x40", 725*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT015_STALL_CYCLES", 726*4882a593Smuzhiyun "SampleAfterValue": "2000000", 727*4882a593Smuzhiyun "BriefDescription": "Cycles no Uops issued on ports 0, 1 or 5", 728*4882a593Smuzhiyun "CounterMask": "1" 729*4882a593Smuzhiyun }, 730*4882a593Smuzhiyun { 731*4882a593Smuzhiyun "EventCode": "0xB1", 732*4882a593Smuzhiyun "Counter": "0,1,2,3", 733*4882a593Smuzhiyun "UMask": "0x2", 734*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT1", 735*4882a593Smuzhiyun "SampleAfterValue": "2000000", 736*4882a593Smuzhiyun "BriefDescription": "Uops executed on port 1" 737*4882a593Smuzhiyun }, 738*4882a593Smuzhiyun { 739*4882a593Smuzhiyun "EventCode": "0xB1", 740*4882a593Smuzhiyun "Counter": "0,1,2,3", 741*4882a593Smuzhiyun "UMask": "0x4", 742*4882a593Smuzhiyun "AnyThread": "1", 743*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT2_CORE", 744*4882a593Smuzhiyun "SampleAfterValue": "2000000", 745*4882a593Smuzhiyun "BriefDescription": "Uops executed on port 2 (core count)" 746*4882a593Smuzhiyun }, 747*4882a593Smuzhiyun { 748*4882a593Smuzhiyun "EventCode": "0xB1", 749*4882a593Smuzhiyun "Counter": "0,1,2,3", 750*4882a593Smuzhiyun "UMask": "0x80", 751*4882a593Smuzhiyun "AnyThread": "1", 752*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT234_CORE", 753*4882a593Smuzhiyun "SampleAfterValue": "2000000", 754*4882a593Smuzhiyun "BriefDescription": "Uops issued on ports 2, 3 or 4" 755*4882a593Smuzhiyun }, 756*4882a593Smuzhiyun { 757*4882a593Smuzhiyun "EventCode": "0xB1", 758*4882a593Smuzhiyun "Counter": "0,1,2,3", 759*4882a593Smuzhiyun "UMask": "0x8", 760*4882a593Smuzhiyun "AnyThread": "1", 761*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT3_CORE", 762*4882a593Smuzhiyun "SampleAfterValue": "2000000", 763*4882a593Smuzhiyun "BriefDescription": "Uops executed on port 3 (core count)" 764*4882a593Smuzhiyun }, 765*4882a593Smuzhiyun { 766*4882a593Smuzhiyun "EventCode": "0xB1", 767*4882a593Smuzhiyun "Counter": "0,1,2,3", 768*4882a593Smuzhiyun "UMask": "0x10", 769*4882a593Smuzhiyun "AnyThread": "1", 770*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT4_CORE", 771*4882a593Smuzhiyun "SampleAfterValue": "2000000", 772*4882a593Smuzhiyun "BriefDescription": "Uops executed on port 4 (core count)" 773*4882a593Smuzhiyun }, 774*4882a593Smuzhiyun { 775*4882a593Smuzhiyun "EventCode": "0xB1", 776*4882a593Smuzhiyun "Counter": "0,1,2,3", 777*4882a593Smuzhiyun "UMask": "0x20", 778*4882a593Smuzhiyun "EventName": "UOPS_EXECUTED.PORT5", 779*4882a593Smuzhiyun "SampleAfterValue": "2000000", 780*4882a593Smuzhiyun "BriefDescription": "Uops executed on port 5" 781*4882a593Smuzhiyun }, 782*4882a593Smuzhiyun { 783*4882a593Smuzhiyun "EventCode": "0xE", 784*4882a593Smuzhiyun "Counter": "0,1,2,3", 785*4882a593Smuzhiyun "UMask": "0x1", 786*4882a593Smuzhiyun "EventName": "UOPS_ISSUED.ANY", 787*4882a593Smuzhiyun "SampleAfterValue": "2000000", 788*4882a593Smuzhiyun "BriefDescription": "Uops issued" 789*4882a593Smuzhiyun }, 790*4882a593Smuzhiyun { 791*4882a593Smuzhiyun "EventCode": "0xE", 792*4882a593Smuzhiyun "Invert": "1", 793*4882a593Smuzhiyun "Counter": "0,1,2,3", 794*4882a593Smuzhiyun "UMask": "0x1", 795*4882a593Smuzhiyun "AnyThread": "1", 796*4882a593Smuzhiyun "EventName": "UOPS_ISSUED.CORE_STALL_CYCLES", 797*4882a593Smuzhiyun "SampleAfterValue": "2000000", 798*4882a593Smuzhiyun "BriefDescription": "Cycles no Uops were issued on any thread", 799*4882a593Smuzhiyun "CounterMask": "1" 800*4882a593Smuzhiyun }, 801*4882a593Smuzhiyun { 802*4882a593Smuzhiyun "EventCode": "0xE", 803*4882a593Smuzhiyun "Counter": "0,1,2,3", 804*4882a593Smuzhiyun "UMask": "0x1", 805*4882a593Smuzhiyun "AnyThread": "1", 806*4882a593Smuzhiyun "EventName": "UOPS_ISSUED.CYCLES_ALL_THREADS", 807*4882a593Smuzhiyun "SampleAfterValue": "2000000", 808*4882a593Smuzhiyun "BriefDescription": "Cycles Uops were issued on either thread", 809*4882a593Smuzhiyun "CounterMask": "1" 810*4882a593Smuzhiyun }, 811*4882a593Smuzhiyun { 812*4882a593Smuzhiyun "EventCode": "0xE", 813*4882a593Smuzhiyun "Counter": "0,1,2,3", 814*4882a593Smuzhiyun "UMask": "0x2", 815*4882a593Smuzhiyun "EventName": "UOPS_ISSUED.FUSED", 816*4882a593Smuzhiyun "SampleAfterValue": "2000000", 817*4882a593Smuzhiyun "BriefDescription": "Fused Uops issued" 818*4882a593Smuzhiyun }, 819*4882a593Smuzhiyun { 820*4882a593Smuzhiyun "EventCode": "0xE", 821*4882a593Smuzhiyun "Invert": "1", 822*4882a593Smuzhiyun "Counter": "0,1,2,3", 823*4882a593Smuzhiyun "UMask": "0x1", 824*4882a593Smuzhiyun "EventName": "UOPS_ISSUED.STALL_CYCLES", 825*4882a593Smuzhiyun "SampleAfterValue": "2000000", 826*4882a593Smuzhiyun "BriefDescription": "Cycles no Uops were issued", 827*4882a593Smuzhiyun "CounterMask": "1" 828*4882a593Smuzhiyun }, 829*4882a593Smuzhiyun { 830*4882a593Smuzhiyun "PEBS": "1", 831*4882a593Smuzhiyun "EventCode": "0xC2", 832*4882a593Smuzhiyun "Counter": "0,1,2,3", 833*4882a593Smuzhiyun "UMask": "0x1", 834*4882a593Smuzhiyun "EventName": "UOPS_RETIRED.ACTIVE_CYCLES", 835*4882a593Smuzhiyun "SampleAfterValue": "2000000", 836*4882a593Smuzhiyun "BriefDescription": "Cycles Uops are being retired", 837*4882a593Smuzhiyun "CounterMask": "1" 838*4882a593Smuzhiyun }, 839*4882a593Smuzhiyun { 840*4882a593Smuzhiyun "PEBS": "1", 841*4882a593Smuzhiyun "EventCode": "0xC2", 842*4882a593Smuzhiyun "Counter": "0,1,2,3", 843*4882a593Smuzhiyun "UMask": "0x1", 844*4882a593Smuzhiyun "EventName": "UOPS_RETIRED.ANY", 845*4882a593Smuzhiyun "SampleAfterValue": "2000000", 846*4882a593Smuzhiyun "BriefDescription": "Uops retired (Precise Event)" 847*4882a593Smuzhiyun }, 848*4882a593Smuzhiyun { 849*4882a593Smuzhiyun "PEBS": "1", 850*4882a593Smuzhiyun "EventCode": "0xC2", 851*4882a593Smuzhiyun "Counter": "0,1,2,3", 852*4882a593Smuzhiyun "UMask": "0x4", 853*4882a593Smuzhiyun "EventName": "UOPS_RETIRED.MACRO_FUSED", 854*4882a593Smuzhiyun "SampleAfterValue": "2000000", 855*4882a593Smuzhiyun "BriefDescription": "Macro-fused Uops retired (Precise Event)" 856*4882a593Smuzhiyun }, 857*4882a593Smuzhiyun { 858*4882a593Smuzhiyun "PEBS": "1", 859*4882a593Smuzhiyun "EventCode": "0xC2", 860*4882a593Smuzhiyun "Counter": "0,1,2,3", 861*4882a593Smuzhiyun "UMask": "0x2", 862*4882a593Smuzhiyun "EventName": "UOPS_RETIRED.RETIRE_SLOTS", 863*4882a593Smuzhiyun "SampleAfterValue": "2000000", 864*4882a593Smuzhiyun "BriefDescription": "Retirement slots used (Precise Event)" 865*4882a593Smuzhiyun }, 866*4882a593Smuzhiyun { 867*4882a593Smuzhiyun "PEBS": "1", 868*4882a593Smuzhiyun "EventCode": "0xC2", 869*4882a593Smuzhiyun "Invert": "1", 870*4882a593Smuzhiyun "Counter": "0,1,2,3", 871*4882a593Smuzhiyun "UMask": "0x1", 872*4882a593Smuzhiyun "EventName": "UOPS_RETIRED.STALL_CYCLES", 873*4882a593Smuzhiyun "SampleAfterValue": "2000000", 874*4882a593Smuzhiyun "BriefDescription": "Cycles Uops are not retiring (Precise Event)", 875*4882a593Smuzhiyun "CounterMask": "1" 876*4882a593Smuzhiyun }, 877*4882a593Smuzhiyun { 878*4882a593Smuzhiyun "PEBS": "1", 879*4882a593Smuzhiyun "EventCode": "0xC2", 880*4882a593Smuzhiyun "Invert": "1", 881*4882a593Smuzhiyun "Counter": "0,1,2,3", 882*4882a593Smuzhiyun "UMask": "0x1", 883*4882a593Smuzhiyun "EventName": "UOPS_RETIRED.TOTAL_CYCLES", 884*4882a593Smuzhiyun "SampleAfterValue": "2000000", 885*4882a593Smuzhiyun "BriefDescription": "Total cycles using precise uop retired event (Precise Event)", 886*4882a593Smuzhiyun "CounterMask": "16" 887*4882a593Smuzhiyun }, 888*4882a593Smuzhiyun { 889*4882a593Smuzhiyun "PEBS": "2", 890*4882a593Smuzhiyun "EventCode": "0xC0", 891*4882a593Smuzhiyun "Invert": "1", 892*4882a593Smuzhiyun "Counter": "0,1,2,3", 893*4882a593Smuzhiyun "UMask": "0x1", 894*4882a593Smuzhiyun "EventName": "INST_RETIRED.TOTAL_CYCLES_PS", 895*4882a593Smuzhiyun "SampleAfterValue": "2000000", 896*4882a593Smuzhiyun "BriefDescription": "Total cycles (Precise Event)", 897*4882a593Smuzhiyun "CounterMask": "16" 898*4882a593Smuzhiyun } 899*4882a593Smuzhiyun]