1*4882a593Smuzhiyun[ 2*4882a593Smuzhiyun { 3*4882a593Smuzhiyun "EventCode": "0xC1", 4*4882a593Smuzhiyun "UMask": "0x8", 5*4882a593Smuzhiyun "BriefDescription": "Number of transitions from AVX-256 to legacy SSE when penalty applicable.", 6*4882a593Smuzhiyun "Counter": "0,1,2,3", 7*4882a593Smuzhiyun "EventName": "OTHER_ASSISTS.AVX_TO_SSE", 8*4882a593Smuzhiyun "Errata": "HSD56, HSM57", 9*4882a593Smuzhiyun "SampleAfterValue": "100003", 10*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 11*4882a593Smuzhiyun }, 12*4882a593Smuzhiyun { 13*4882a593Smuzhiyun "EventCode": "0xC1", 14*4882a593Smuzhiyun "UMask": "0x10", 15*4882a593Smuzhiyun "BriefDescription": "Number of transitions from SSE to AVX-256 when penalty applicable.", 16*4882a593Smuzhiyun "Counter": "0,1,2,3", 17*4882a593Smuzhiyun "EventName": "OTHER_ASSISTS.SSE_TO_AVX", 18*4882a593Smuzhiyun "Errata": "HSD56, HSM57", 19*4882a593Smuzhiyun "SampleAfterValue": "100003", 20*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 21*4882a593Smuzhiyun }, 22*4882a593Smuzhiyun { 23*4882a593Smuzhiyun "EventCode": "0xC6", 24*4882a593Smuzhiyun "UMask": "0x7", 25*4882a593Smuzhiyun "BriefDescription": "Approximate counts of AVX & AVX2 256-bit instructions, including non-arithmetic instructions, loads, and stores. May count non-AVX instructions that employ 256-bit operations, including (but not necessarily limited to) rep string instructions that use 256-bit loads and stores for optimized performance, XSAVE* and XRSTOR*, and operations that transition the x87 FPU data registers between x87 and MMX.", 26*4882a593Smuzhiyun "Counter": "0,1,2,3", 27*4882a593Smuzhiyun "EventName": "AVX_INSTS.ALL", 28*4882a593Smuzhiyun "PublicDescription": "Note that a whole rep string only counts AVX_INST.ALL once.", 29*4882a593Smuzhiyun "SampleAfterValue": "2000003", 30*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 31*4882a593Smuzhiyun }, 32*4882a593Smuzhiyun { 33*4882a593Smuzhiyun "EventCode": "0xCA", 34*4882a593Smuzhiyun "UMask": "0x2", 35*4882a593Smuzhiyun "BriefDescription": "Number of X87 assists due to output value.", 36*4882a593Smuzhiyun "Counter": "0,1,2,3", 37*4882a593Smuzhiyun "EventName": "FP_ASSIST.X87_OUTPUT", 38*4882a593Smuzhiyun "PublicDescription": "Number of X87 FP assists due to output values.", 39*4882a593Smuzhiyun "SampleAfterValue": "100003", 40*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 41*4882a593Smuzhiyun }, 42*4882a593Smuzhiyun { 43*4882a593Smuzhiyun "EventCode": "0xCA", 44*4882a593Smuzhiyun "UMask": "0x4", 45*4882a593Smuzhiyun "BriefDescription": "Number of X87 assists due to input value.", 46*4882a593Smuzhiyun "Counter": "0,1,2,3", 47*4882a593Smuzhiyun "EventName": "FP_ASSIST.X87_INPUT", 48*4882a593Smuzhiyun "PublicDescription": "Number of X87 FP assists due to input values.", 49*4882a593Smuzhiyun "SampleAfterValue": "100003", 50*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 51*4882a593Smuzhiyun }, 52*4882a593Smuzhiyun { 53*4882a593Smuzhiyun "EventCode": "0xCA", 54*4882a593Smuzhiyun "UMask": "0x8", 55*4882a593Smuzhiyun "BriefDescription": "Number of SIMD FP assists due to Output values", 56*4882a593Smuzhiyun "Counter": "0,1,2,3", 57*4882a593Smuzhiyun "EventName": "FP_ASSIST.SIMD_OUTPUT", 58*4882a593Smuzhiyun "PublicDescription": "Number of SIMD FP assists due to output values.", 59*4882a593Smuzhiyun "SampleAfterValue": "100003", 60*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 61*4882a593Smuzhiyun }, 62*4882a593Smuzhiyun { 63*4882a593Smuzhiyun "EventCode": "0xCA", 64*4882a593Smuzhiyun "UMask": "0x10", 65*4882a593Smuzhiyun "BriefDescription": "Number of SIMD FP assists due to input values", 66*4882a593Smuzhiyun "Counter": "0,1,2,3", 67*4882a593Smuzhiyun "EventName": "FP_ASSIST.SIMD_INPUT", 68*4882a593Smuzhiyun "PublicDescription": "Number of SIMD FP assists due to input values.", 69*4882a593Smuzhiyun "SampleAfterValue": "100003", 70*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3,4,5,6,7" 71*4882a593Smuzhiyun }, 72*4882a593Smuzhiyun { 73*4882a593Smuzhiyun "EventCode": "0xCA", 74*4882a593Smuzhiyun "UMask": "0x1e", 75*4882a593Smuzhiyun "BriefDescription": "Cycles with any input/output SSE or FP assist", 76*4882a593Smuzhiyun "Counter": "0,1,2,3", 77*4882a593Smuzhiyun "EventName": "FP_ASSIST.ANY", 78*4882a593Smuzhiyun "CounterMask": "1", 79*4882a593Smuzhiyun "PublicDescription": "Cycles with any input/output SSE* or FP assists.", 80*4882a593Smuzhiyun "SampleAfterValue": "100003", 81*4882a593Smuzhiyun "CounterHTOff": "0,1,2,3" 82*4882a593Smuzhiyun } 83*4882a593Smuzhiyun]