xref: /OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/x86/bonnell/pipeline.json (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun[
2*4882a593Smuzhiyun    {
3*4882a593Smuzhiyun        "EventCode": "0x2",
4*4882a593Smuzhiyun        "Counter": "0,1",
5*4882a593Smuzhiyun        "UMask": "0x83",
6*4882a593Smuzhiyun        "EventName": "STORE_FORWARDS.ANY",
7*4882a593Smuzhiyun        "SampleAfterValue": "200000",
8*4882a593Smuzhiyun        "BriefDescription": "All store forwards"
9*4882a593Smuzhiyun    },
10*4882a593Smuzhiyun    {
11*4882a593Smuzhiyun        "EventCode": "0x2",
12*4882a593Smuzhiyun        "Counter": "0,1",
13*4882a593Smuzhiyun        "UMask": "0x81",
14*4882a593Smuzhiyun        "EventName": "STORE_FORWARDS.GOOD",
15*4882a593Smuzhiyun        "SampleAfterValue": "200000",
16*4882a593Smuzhiyun        "BriefDescription": "Good store forwards"
17*4882a593Smuzhiyun    },
18*4882a593Smuzhiyun    {
19*4882a593Smuzhiyun        "EventCode": "0x3",
20*4882a593Smuzhiyun        "Counter": "0,1",
21*4882a593Smuzhiyun        "UMask": "0x7f",
22*4882a593Smuzhiyun        "EventName": "REISSUE.ANY",
23*4882a593Smuzhiyun        "SampleAfterValue": "200000",
24*4882a593Smuzhiyun        "BriefDescription": "Micro-op reissues for any cause"
25*4882a593Smuzhiyun    },
26*4882a593Smuzhiyun    {
27*4882a593Smuzhiyun        "EventCode": "0x3",
28*4882a593Smuzhiyun        "Counter": "0,1",
29*4882a593Smuzhiyun        "UMask": "0xff",
30*4882a593Smuzhiyun        "EventName": "REISSUE.ANY.AR",
31*4882a593Smuzhiyun        "SampleAfterValue": "200000",
32*4882a593Smuzhiyun        "BriefDescription": "Micro-op reissues for any cause (At Retirement)"
33*4882a593Smuzhiyun    },
34*4882a593Smuzhiyun    {
35*4882a593Smuzhiyun        "EventCode": "0x12",
36*4882a593Smuzhiyun        "Counter": "0,1",
37*4882a593Smuzhiyun        "UMask": "0x1",
38*4882a593Smuzhiyun        "EventName": "MUL.S",
39*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
40*4882a593Smuzhiyun        "BriefDescription": "Multiply operations executed."
41*4882a593Smuzhiyun    },
42*4882a593Smuzhiyun    {
43*4882a593Smuzhiyun        "EventCode": "0x12",
44*4882a593Smuzhiyun        "Counter": "0,1",
45*4882a593Smuzhiyun        "UMask": "0x81",
46*4882a593Smuzhiyun        "EventName": "MUL.AR",
47*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
48*4882a593Smuzhiyun        "BriefDescription": "Multiply operations retired"
49*4882a593Smuzhiyun    },
50*4882a593Smuzhiyun    {
51*4882a593Smuzhiyun        "EventCode": "0x13",
52*4882a593Smuzhiyun        "Counter": "0,1",
53*4882a593Smuzhiyun        "UMask": "0x1",
54*4882a593Smuzhiyun        "EventName": "DIV.S",
55*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
56*4882a593Smuzhiyun        "BriefDescription": "Divide operations executed."
57*4882a593Smuzhiyun    },
58*4882a593Smuzhiyun    {
59*4882a593Smuzhiyun        "EventCode": "0x13",
60*4882a593Smuzhiyun        "Counter": "0,1",
61*4882a593Smuzhiyun        "UMask": "0x81",
62*4882a593Smuzhiyun        "EventName": "DIV.AR",
63*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
64*4882a593Smuzhiyun        "BriefDescription": "Divide operations retired"
65*4882a593Smuzhiyun    },
66*4882a593Smuzhiyun    {
67*4882a593Smuzhiyun        "EventCode": "0x14",
68*4882a593Smuzhiyun        "Counter": "0,1",
69*4882a593Smuzhiyun        "UMask": "0x1",
70*4882a593Smuzhiyun        "EventName": "CYCLES_DIV_BUSY",
71*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
72*4882a593Smuzhiyun        "BriefDescription": "Cycles the divider is busy."
73*4882a593Smuzhiyun    },
74*4882a593Smuzhiyun    {
75*4882a593Smuzhiyun        "EventCode": "0x3C",
76*4882a593Smuzhiyun        "Counter": "0,1",
77*4882a593Smuzhiyun        "UMask": "0x0",
78*4882a593Smuzhiyun        "EventName": "CPU_CLK_UNHALTED.CORE_P",
79*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
80*4882a593Smuzhiyun        "BriefDescription": "Core cycles when core is not halted"
81*4882a593Smuzhiyun    },
82*4882a593Smuzhiyun    {
83*4882a593Smuzhiyun        "EventCode": "0x3C",
84*4882a593Smuzhiyun        "Counter": "0,1",
85*4882a593Smuzhiyun        "UMask": "0x1",
86*4882a593Smuzhiyun        "EventName": "CPU_CLK_UNHALTED.BUS",
87*4882a593Smuzhiyun        "SampleAfterValue": "200000",
88*4882a593Smuzhiyun        "BriefDescription": "Bus cycles when core is not halted"
89*4882a593Smuzhiyun    },
90*4882a593Smuzhiyun    {
91*4882a593Smuzhiyun        "EventCode": "0xA",
92*4882a593Smuzhiyun        "Counter": "Fixed counter 2",
93*4882a593Smuzhiyun        "UMask": "0x0",
94*4882a593Smuzhiyun        "EventName": "CPU_CLK_UNHALTED.CORE",
95*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
96*4882a593Smuzhiyun        "BriefDescription": "Core cycles when core is not halted"
97*4882a593Smuzhiyun    },
98*4882a593Smuzhiyun    {
99*4882a593Smuzhiyun        "EventCode": "0xA",
100*4882a593Smuzhiyun        "Counter": "Fixed counter 3",
101*4882a593Smuzhiyun        "UMask": "0x0",
102*4882a593Smuzhiyun        "EventName": "CPU_CLK_UNHALTED.REF",
103*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
104*4882a593Smuzhiyun        "BriefDescription": "Reference cycles when core is not halted."
105*4882a593Smuzhiyun    },
106*4882a593Smuzhiyun    {
107*4882a593Smuzhiyun        "EventCode": "0x88",
108*4882a593Smuzhiyun        "Counter": "0,1",
109*4882a593Smuzhiyun        "UMask": "0x1",
110*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.COND",
111*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
112*4882a593Smuzhiyun        "BriefDescription": "All macro conditional branch instructions."
113*4882a593Smuzhiyun    },
114*4882a593Smuzhiyun    {
115*4882a593Smuzhiyun        "EventCode": "0x88",
116*4882a593Smuzhiyun        "Counter": "0,1",
117*4882a593Smuzhiyun        "UMask": "0x2",
118*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.UNCOND",
119*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
120*4882a593Smuzhiyun        "BriefDescription": "All macro unconditional branch instructions, excluding calls and indirects"
121*4882a593Smuzhiyun    },
122*4882a593Smuzhiyun    {
123*4882a593Smuzhiyun        "EventCode": "0x88",
124*4882a593Smuzhiyun        "Counter": "0,1",
125*4882a593Smuzhiyun        "UMask": "0x4",
126*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.IND",
127*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
128*4882a593Smuzhiyun        "BriefDescription": "All indirect branches that are not calls."
129*4882a593Smuzhiyun    },
130*4882a593Smuzhiyun    {
131*4882a593Smuzhiyun        "EventCode": "0x88",
132*4882a593Smuzhiyun        "Counter": "0,1",
133*4882a593Smuzhiyun        "UMask": "0x8",
134*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.RET",
135*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
136*4882a593Smuzhiyun        "BriefDescription": "All indirect branches that have a return mnemonic"
137*4882a593Smuzhiyun    },
138*4882a593Smuzhiyun    {
139*4882a593Smuzhiyun        "EventCode": "0x88",
140*4882a593Smuzhiyun        "Counter": "0,1",
141*4882a593Smuzhiyun        "UMask": "0x10",
142*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.DIR_CALL",
143*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
144*4882a593Smuzhiyun        "BriefDescription": "All non-indirect calls"
145*4882a593Smuzhiyun    },
146*4882a593Smuzhiyun    {
147*4882a593Smuzhiyun        "EventCode": "0x88",
148*4882a593Smuzhiyun        "Counter": "0,1",
149*4882a593Smuzhiyun        "UMask": "0x20",
150*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.IND_CALL",
151*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
152*4882a593Smuzhiyun        "BriefDescription": "All indirect calls, including both register and memory indirect."
153*4882a593Smuzhiyun    },
154*4882a593Smuzhiyun    {
155*4882a593Smuzhiyun        "EventCode": "0x88",
156*4882a593Smuzhiyun        "Counter": "0,1",
157*4882a593Smuzhiyun        "UMask": "0x41",
158*4882a593Smuzhiyun        "EventName": "BR_INST_TYPE_RETIRED.COND_TAKEN",
159*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
160*4882a593Smuzhiyun        "BriefDescription": "Only taken macro conditional branch instructions"
161*4882a593Smuzhiyun    },
162*4882a593Smuzhiyun    {
163*4882a593Smuzhiyun        "EventCode": "0x89",
164*4882a593Smuzhiyun        "Counter": "0,1",
165*4882a593Smuzhiyun        "UMask": "0x1",
166*4882a593Smuzhiyun        "EventName": "BR_MISSP_TYPE_RETIRED.COND",
167*4882a593Smuzhiyun        "SampleAfterValue": "200000",
168*4882a593Smuzhiyun        "BriefDescription": "Mispredicted cond branch instructions retired"
169*4882a593Smuzhiyun    },
170*4882a593Smuzhiyun    {
171*4882a593Smuzhiyun        "EventCode": "0x89",
172*4882a593Smuzhiyun        "Counter": "0,1",
173*4882a593Smuzhiyun        "UMask": "0x2",
174*4882a593Smuzhiyun        "EventName": "BR_MISSP_TYPE_RETIRED.IND",
175*4882a593Smuzhiyun        "SampleAfterValue": "200000",
176*4882a593Smuzhiyun        "BriefDescription": "Mispredicted ind branches that are not calls"
177*4882a593Smuzhiyun    },
178*4882a593Smuzhiyun    {
179*4882a593Smuzhiyun        "EventCode": "0x89",
180*4882a593Smuzhiyun        "Counter": "0,1",
181*4882a593Smuzhiyun        "UMask": "0x4",
182*4882a593Smuzhiyun        "EventName": "BR_MISSP_TYPE_RETIRED.RETURN",
183*4882a593Smuzhiyun        "SampleAfterValue": "200000",
184*4882a593Smuzhiyun        "BriefDescription": "Mispredicted return branches"
185*4882a593Smuzhiyun    },
186*4882a593Smuzhiyun    {
187*4882a593Smuzhiyun        "EventCode": "0x89",
188*4882a593Smuzhiyun        "Counter": "0,1",
189*4882a593Smuzhiyun        "UMask": "0x8",
190*4882a593Smuzhiyun        "EventName": "BR_MISSP_TYPE_RETIRED.IND_CALL",
191*4882a593Smuzhiyun        "SampleAfterValue": "200000",
192*4882a593Smuzhiyun        "BriefDescription": "Mispredicted indirect calls, including both register and memory indirect."
193*4882a593Smuzhiyun    },
194*4882a593Smuzhiyun    {
195*4882a593Smuzhiyun        "EventCode": "0x89",
196*4882a593Smuzhiyun        "Counter": "0,1",
197*4882a593Smuzhiyun        "UMask": "0x11",
198*4882a593Smuzhiyun        "EventName": "BR_MISSP_TYPE_RETIRED.COND_TAKEN",
199*4882a593Smuzhiyun        "SampleAfterValue": "200000",
200*4882a593Smuzhiyun        "BriefDescription": "Mispredicted and taken cond branch instructions retired"
201*4882a593Smuzhiyun    },
202*4882a593Smuzhiyun    {
203*4882a593Smuzhiyun        "PEBS": "2",
204*4882a593Smuzhiyun        "EventCode": "0xC0",
205*4882a593Smuzhiyun        "Counter": "0,1",
206*4882a593Smuzhiyun        "UMask": "0x0",
207*4882a593Smuzhiyun        "EventName": "INST_RETIRED.ANY_P",
208*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
209*4882a593Smuzhiyun        "BriefDescription": "Instructions retired (precise event)."
210*4882a593Smuzhiyun    },
211*4882a593Smuzhiyun    {
212*4882a593Smuzhiyun        "EventCode": "0xA",
213*4882a593Smuzhiyun        "Counter": "Fixed counter 1",
214*4882a593Smuzhiyun        "UMask": "0x0",
215*4882a593Smuzhiyun        "EventName": "INST_RETIRED.ANY",
216*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
217*4882a593Smuzhiyun        "BriefDescription": "Instructions retired."
218*4882a593Smuzhiyun    },
219*4882a593Smuzhiyun    {
220*4882a593Smuzhiyun        "EventCode": "0xC2",
221*4882a593Smuzhiyun        "Counter": "0,1",
222*4882a593Smuzhiyun        "UMask": "0x10",
223*4882a593Smuzhiyun        "EventName": "UOPS_RETIRED.ANY",
224*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
225*4882a593Smuzhiyun        "BriefDescription": "Micro-ops retired."
226*4882a593Smuzhiyun    },
227*4882a593Smuzhiyun    {
228*4882a593Smuzhiyun        "EventCode": "0xC2",
229*4882a593Smuzhiyun        "Counter": "0,1",
230*4882a593Smuzhiyun        "UMask": "0x10",
231*4882a593Smuzhiyun        "EventName": "UOPS_RETIRED.STALLED_CYCLES",
232*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
233*4882a593Smuzhiyun        "BriefDescription": "Cycles no micro-ops retired."
234*4882a593Smuzhiyun    },
235*4882a593Smuzhiyun    {
236*4882a593Smuzhiyun        "EventCode": "0xC2",
237*4882a593Smuzhiyun        "Counter": "0,1",
238*4882a593Smuzhiyun        "UMask": "0x10",
239*4882a593Smuzhiyun        "EventName": "UOPS_RETIRED.STALLS",
240*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
241*4882a593Smuzhiyun        "BriefDescription": "Periods no micro-ops retired."
242*4882a593Smuzhiyun    },
243*4882a593Smuzhiyun    {
244*4882a593Smuzhiyun        "EventCode": "0xC3",
245*4882a593Smuzhiyun        "Counter": "0,1",
246*4882a593Smuzhiyun        "UMask": "0x1",
247*4882a593Smuzhiyun        "EventName": "MACHINE_CLEARS.SMC",
248*4882a593Smuzhiyun        "SampleAfterValue": "200000",
249*4882a593Smuzhiyun        "BriefDescription": "Self-Modifying Code detected."
250*4882a593Smuzhiyun    },
251*4882a593Smuzhiyun    {
252*4882a593Smuzhiyun        "EventCode": "0xC4",
253*4882a593Smuzhiyun        "Counter": "0,1",
254*4882a593Smuzhiyun        "UMask": "0x0",
255*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.ANY",
256*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
257*4882a593Smuzhiyun        "BriefDescription": "Retired branch instructions."
258*4882a593Smuzhiyun    },
259*4882a593Smuzhiyun    {
260*4882a593Smuzhiyun        "EventCode": "0xC4",
261*4882a593Smuzhiyun        "Counter": "0,1",
262*4882a593Smuzhiyun        "UMask": "0x1",
263*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.PRED_NOT_TAKEN",
264*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
265*4882a593Smuzhiyun        "BriefDescription": "Retired branch instructions that were predicted not-taken."
266*4882a593Smuzhiyun    },
267*4882a593Smuzhiyun    {
268*4882a593Smuzhiyun        "EventCode": "0xC4",
269*4882a593Smuzhiyun        "Counter": "0,1",
270*4882a593Smuzhiyun        "UMask": "0x2",
271*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.MISPRED_NOT_TAKEN",
272*4882a593Smuzhiyun        "SampleAfterValue": "200000",
273*4882a593Smuzhiyun        "BriefDescription": "Retired branch instructions that were mispredicted not-taken."
274*4882a593Smuzhiyun    },
275*4882a593Smuzhiyun    {
276*4882a593Smuzhiyun        "EventCode": "0xC4",
277*4882a593Smuzhiyun        "Counter": "0,1",
278*4882a593Smuzhiyun        "UMask": "0x4",
279*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.PRED_TAKEN",
280*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
281*4882a593Smuzhiyun        "BriefDescription": "Retired branch instructions that were predicted taken."
282*4882a593Smuzhiyun    },
283*4882a593Smuzhiyun    {
284*4882a593Smuzhiyun        "EventCode": "0xC4",
285*4882a593Smuzhiyun        "Counter": "0,1",
286*4882a593Smuzhiyun        "UMask": "0x8",
287*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.MISPRED_TAKEN",
288*4882a593Smuzhiyun        "SampleAfterValue": "200000",
289*4882a593Smuzhiyun        "BriefDescription": "Retired branch instructions that were mispredicted taken."
290*4882a593Smuzhiyun    },
291*4882a593Smuzhiyun    {
292*4882a593Smuzhiyun        "EventCode": "0xC4",
293*4882a593Smuzhiyun        "Counter": "0,1",
294*4882a593Smuzhiyun        "UMask": "0xc",
295*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.TAKEN",
296*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
297*4882a593Smuzhiyun        "BriefDescription": "Retired taken branch instructions."
298*4882a593Smuzhiyun    },
299*4882a593Smuzhiyun    {
300*4882a593Smuzhiyun        "EventCode": "0xC4",
301*4882a593Smuzhiyun        "Counter": "0,1",
302*4882a593Smuzhiyun        "UMask": "0xf",
303*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.ANY1",
304*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
305*4882a593Smuzhiyun        "BriefDescription": "Retired branch instructions."
306*4882a593Smuzhiyun    },
307*4882a593Smuzhiyun    {
308*4882a593Smuzhiyun        "PEBS": "1",
309*4882a593Smuzhiyun        "EventCode": "0xC5",
310*4882a593Smuzhiyun        "Counter": "0,1",
311*4882a593Smuzhiyun        "UMask": "0x0",
312*4882a593Smuzhiyun        "EventName": "BR_INST_RETIRED.MISPRED",
313*4882a593Smuzhiyun        "SampleAfterValue": "200000",
314*4882a593Smuzhiyun        "BriefDescription": "Retired mispredicted branch instructions (precise event)."
315*4882a593Smuzhiyun    },
316*4882a593Smuzhiyun    {
317*4882a593Smuzhiyun        "EventCode": "0xDC",
318*4882a593Smuzhiyun        "Counter": "0,1",
319*4882a593Smuzhiyun        "UMask": "0x2",
320*4882a593Smuzhiyun        "EventName": "RESOURCE_STALLS.DIV_BUSY",
321*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
322*4882a593Smuzhiyun        "BriefDescription": "Cycles issue is stalled due to div busy."
323*4882a593Smuzhiyun    },
324*4882a593Smuzhiyun    {
325*4882a593Smuzhiyun        "EventCode": "0xE0",
326*4882a593Smuzhiyun        "Counter": "0,1",
327*4882a593Smuzhiyun        "UMask": "0x1",
328*4882a593Smuzhiyun        "EventName": "BR_INST_DECODED",
329*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
330*4882a593Smuzhiyun        "BriefDescription": "Branch instructions decoded"
331*4882a593Smuzhiyun    },
332*4882a593Smuzhiyun    {
333*4882a593Smuzhiyun        "EventCode": "0xE4",
334*4882a593Smuzhiyun        "Counter": "0,1",
335*4882a593Smuzhiyun        "UMask": "0x1",
336*4882a593Smuzhiyun        "EventName": "BOGUS_BR",
337*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
338*4882a593Smuzhiyun        "BriefDescription": "Bogus branches"
339*4882a593Smuzhiyun    },
340*4882a593Smuzhiyun    {
341*4882a593Smuzhiyun        "EventCode": "0xE6",
342*4882a593Smuzhiyun        "Counter": "0,1",
343*4882a593Smuzhiyun        "UMask": "0x1",
344*4882a593Smuzhiyun        "EventName": "BACLEARS.ANY",
345*4882a593Smuzhiyun        "SampleAfterValue": "2000000",
346*4882a593Smuzhiyun        "BriefDescription": "BACLEARS asserted."
347*4882a593Smuzhiyun    },
348*4882a593Smuzhiyun    {
349*4882a593Smuzhiyun        "EventCode": "0x3",
350*4882a593Smuzhiyun        "Counter": "0,1",
351*4882a593Smuzhiyun        "UMask": "0x1",
352*4882a593Smuzhiyun        "EventName": "REISSUE.OVERLAP_STORE",
353*4882a593Smuzhiyun        "SampleAfterValue": "200000",
354*4882a593Smuzhiyun        "BriefDescription": "Micro-op reissues on a store-load collision"
355*4882a593Smuzhiyun    },
356*4882a593Smuzhiyun    {
357*4882a593Smuzhiyun        "EventCode": "0x3",
358*4882a593Smuzhiyun        "Counter": "0,1",
359*4882a593Smuzhiyun        "UMask": "0x81",
360*4882a593Smuzhiyun        "EventName": "REISSUE.OVERLAP_STORE.AR",
361*4882a593Smuzhiyun        "SampleAfterValue": "200000",
362*4882a593Smuzhiyun        "BriefDescription": "Micro-op reissues on a store-load collision (At Retirement)"
363*4882a593Smuzhiyun    }
364*4882a593Smuzhiyun]