xref: /OK3568_Linux_fs/kernel/tools/perf/pmu-events/arch/powerpc/power8/pipeline.json (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun[
2*4882a593Smuzhiyun  {
3*4882a593Smuzhiyun    "EventCode": "0x100f2",
4*4882a593Smuzhiyun    "EventName": "PM_1PLUS_PPC_CMPL",
5*4882a593Smuzhiyun    "BriefDescription": "1 or more ppc insts finished",
6*4882a593Smuzhiyun    "PublicDescription": "1 or more ppc insts finished (completed)"
7*4882a593Smuzhiyun  },
8*4882a593Smuzhiyun  {
9*4882a593Smuzhiyun    "EventCode": "0x400f2",
10*4882a593Smuzhiyun    "EventName": "PM_1PLUS_PPC_DISP",
11*4882a593Smuzhiyun    "BriefDescription": "Cycles at least one Instr Dispatched",
12*4882a593Smuzhiyun    "PublicDescription": "Cycles at least one Instr Dispatched. Could be a group with only microcode. Issue HW016521"
13*4882a593Smuzhiyun  },
14*4882a593Smuzhiyun  {
15*4882a593Smuzhiyun    "EventCode": "0x100fa",
16*4882a593Smuzhiyun    "EventName": "PM_ANY_THRD_RUN_CYC",
17*4882a593Smuzhiyun    "BriefDescription": "One of threads in run_cycles",
18*4882a593Smuzhiyun    "PublicDescription": "Any thread in run_cycles (was one thread in run_cycles)"
19*4882a593Smuzhiyun  },
20*4882a593Smuzhiyun  {
21*4882a593Smuzhiyun    "EventCode": "0x4000a",
22*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL",
23*4882a593Smuzhiyun    "BriefDescription": "Completion stall",
24*4882a593Smuzhiyun    "PublicDescription": ""
25*4882a593Smuzhiyun  },
26*4882a593Smuzhiyun  {
27*4882a593Smuzhiyun    "EventCode": "0x4d018",
28*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_BRU",
29*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to a Branch Unit",
30*4882a593Smuzhiyun    "PublicDescription": ""
31*4882a593Smuzhiyun  },
32*4882a593Smuzhiyun  {
33*4882a593Smuzhiyun    "EventCode": "0x2c012",
34*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DCACHE_MISS",
35*4882a593Smuzhiyun    "BriefDescription": "Completion stall by Dcache miss",
36*4882a593Smuzhiyun    "PublicDescription": ""
37*4882a593Smuzhiyun  },
38*4882a593Smuzhiyun  {
39*4882a593Smuzhiyun    "EventCode": "0x2c018",
40*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DMISS_L21_L31",
41*4882a593Smuzhiyun    "BriefDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)",
42*4882a593Smuzhiyun    "PublicDescription": ""
43*4882a593Smuzhiyun  },
44*4882a593Smuzhiyun  {
45*4882a593Smuzhiyun    "EventCode": "0x2c016",
46*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DMISS_L2L3",
47*4882a593Smuzhiyun    "BriefDescription": "Completion stall by Dcache miss which resolved in L2/L3",
48*4882a593Smuzhiyun    "PublicDescription": ""
49*4882a593Smuzhiyun  },
50*4882a593Smuzhiyun  {
51*4882a593Smuzhiyun    "EventCode": "0x4c016",
52*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DMISS_L2L3_CONFLICT",
53*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to cache miss that resolves in the L2 or L3 with a conflict",
54*4882a593Smuzhiyun    "PublicDescription": "Completion stall due to cache miss resolving in core's L2/L3 with a conflict"
55*4882a593Smuzhiyun  },
56*4882a593Smuzhiyun  {
57*4882a593Smuzhiyun    "EventCode": "0x4c01a",
58*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DMISS_L3MISS",
59*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to cache miss resolving missed the L3",
60*4882a593Smuzhiyun    "PublicDescription": ""
61*4882a593Smuzhiyun  },
62*4882a593Smuzhiyun  {
63*4882a593Smuzhiyun    "EventCode": "0x4c018",
64*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DMISS_LMEM",
65*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to cache miss that resolves in local memory",
66*4882a593Smuzhiyun    "PublicDescription": "Completion stall due to cache miss resolving in core's Local Memory"
67*4882a593Smuzhiyun  },
68*4882a593Smuzhiyun  {
69*4882a593Smuzhiyun    "EventCode": "0x2c01c",
70*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_DMISS_REMOTE",
71*4882a593Smuzhiyun    "BriefDescription": "Completion stall by Dcache miss which resolved from remote chip (cache or memory)",
72*4882a593Smuzhiyun    "PublicDescription": "Completion stall by Dcache miss which resolved on chip ( excluding local L2/L3)"
73*4882a593Smuzhiyun  },
74*4882a593Smuzhiyun  {
75*4882a593Smuzhiyun    "EventCode": "0x4c012",
76*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_ERAT_MISS",
77*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to LSU reject ERAT miss",
78*4882a593Smuzhiyun    "PublicDescription": ""
79*4882a593Smuzhiyun  },
80*4882a593Smuzhiyun  {
81*4882a593Smuzhiyun    "EventCode": "0x4d016",
82*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_FXLONG",
83*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to a long latency fixed point instruction",
84*4882a593Smuzhiyun    "PublicDescription": ""
85*4882a593Smuzhiyun  },
86*4882a593Smuzhiyun  {
87*4882a593Smuzhiyun    "EventCode": "0x2d016",
88*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_FXU",
89*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to FXU",
90*4882a593Smuzhiyun    "PublicDescription": ""
91*4882a593Smuzhiyun  },
92*4882a593Smuzhiyun  {
93*4882a593Smuzhiyun    "EventCode": "0x30036",
94*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_HWSYNC",
95*4882a593Smuzhiyun    "BriefDescription": "completion stall due to hwsync",
96*4882a593Smuzhiyun    "PublicDescription": ""
97*4882a593Smuzhiyun  },
98*4882a593Smuzhiyun  {
99*4882a593Smuzhiyun    "EventCode": "0x4d014",
100*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_LOAD_FINISH",
101*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to a Load finish",
102*4882a593Smuzhiyun    "PublicDescription": ""
103*4882a593Smuzhiyun  },
104*4882a593Smuzhiyun  {
105*4882a593Smuzhiyun    "EventCode": "0x2c010",
106*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_LSU",
107*4882a593Smuzhiyun    "BriefDescription": "Completion stall by LSU instruction",
108*4882a593Smuzhiyun    "PublicDescription": ""
109*4882a593Smuzhiyun  },
110*4882a593Smuzhiyun  {
111*4882a593Smuzhiyun    "EventCode": "0x10036",
112*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_LWSYNC",
113*4882a593Smuzhiyun    "BriefDescription": "completion stall due to isync/lwsync",
114*4882a593Smuzhiyun    "PublicDescription": ""
115*4882a593Smuzhiyun  },
116*4882a593Smuzhiyun  {
117*4882a593Smuzhiyun    "EventCode": "0x30006",
118*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_OTHER_CMPL",
119*4882a593Smuzhiyun    "BriefDescription": "Instructions core completed while this tread was stalled",
120*4882a593Smuzhiyun    "PublicDescription": "Instructions core completed while this thread was stalled"
121*4882a593Smuzhiyun  },
122*4882a593Smuzhiyun  {
123*4882a593Smuzhiyun    "EventCode": "0x4c01c",
124*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_ST_FWD",
125*4882a593Smuzhiyun    "BriefDescription": "Completion stall due to store forward",
126*4882a593Smuzhiyun    "PublicDescription": ""
127*4882a593Smuzhiyun  },
128*4882a593Smuzhiyun  {
129*4882a593Smuzhiyun    "EventCode": "0x1001c",
130*4882a593Smuzhiyun    "EventName": "PM_CMPLU_STALL_THRD",
131*4882a593Smuzhiyun    "BriefDescription": "Completion Stalled due to thread conflict. Group ready to complete but it was another thread's turn",
132*4882a593Smuzhiyun    "PublicDescription": "Completion stall due to thread conflict"
133*4882a593Smuzhiyun  },
134*4882a593Smuzhiyun  {
135*4882a593Smuzhiyun    "EventCode": "0x1e",
136*4882a593Smuzhiyun    "EventName": "PM_CYC",
137*4882a593Smuzhiyun    "BriefDescription": "Cycles",
138*4882a593Smuzhiyun    "PublicDescription": ""
139*4882a593Smuzhiyun  },
140*4882a593Smuzhiyun  {
141*4882a593Smuzhiyun    "EventCode": "0x10006",
142*4882a593Smuzhiyun    "EventName": "PM_DISP_HELD",
143*4882a593Smuzhiyun    "BriefDescription": "Dispatch Held",
144*4882a593Smuzhiyun    "PublicDescription": ""
145*4882a593Smuzhiyun  },
146*4882a593Smuzhiyun  {
147*4882a593Smuzhiyun    "EventCode": "0x4003c",
148*4882a593Smuzhiyun    "EventName": "PM_DISP_HELD_SYNC_HOLD",
149*4882a593Smuzhiyun    "BriefDescription": "Dispatch held due to SYNC hold",
150*4882a593Smuzhiyun    "PublicDescription": ""
151*4882a593Smuzhiyun  },
152*4882a593Smuzhiyun  {
153*4882a593Smuzhiyun    "EventCode": "0x200f8",
154*4882a593Smuzhiyun    "EventName": "PM_EXT_INT",
155*4882a593Smuzhiyun    "BriefDescription": "external interrupt",
156*4882a593Smuzhiyun    "PublicDescription": ""
157*4882a593Smuzhiyun  },
158*4882a593Smuzhiyun  {
159*4882a593Smuzhiyun    "EventCode": "0x400f8",
160*4882a593Smuzhiyun    "EventName": "PM_FLUSH",
161*4882a593Smuzhiyun    "BriefDescription": "Flush (any type)",
162*4882a593Smuzhiyun    "PublicDescription": ""
163*4882a593Smuzhiyun  },
164*4882a593Smuzhiyun  {
165*4882a593Smuzhiyun    "EventCode": "0x30012",
166*4882a593Smuzhiyun    "EventName": "PM_FLUSH_COMPLETION",
167*4882a593Smuzhiyun    "BriefDescription": "Completion Flush",
168*4882a593Smuzhiyun    "PublicDescription": ""
169*4882a593Smuzhiyun  },
170*4882a593Smuzhiyun  {
171*4882a593Smuzhiyun    "EventCode": "0x3000c",
172*4882a593Smuzhiyun    "EventName": "PM_FREQ_DOWN",
173*4882a593Smuzhiyun    "BriefDescription": "Power Management: Below Threshold B",
174*4882a593Smuzhiyun    "PublicDescription": "Frequency is being slewed down due to Power Management"
175*4882a593Smuzhiyun  },
176*4882a593Smuzhiyun  {
177*4882a593Smuzhiyun    "EventCode": "0x4000c",
178*4882a593Smuzhiyun    "EventName": "PM_FREQ_UP",
179*4882a593Smuzhiyun    "BriefDescription": "Power Management: Above Threshold A",
180*4882a593Smuzhiyun    "PublicDescription": "Frequency is being slewed up due to Power Management"
181*4882a593Smuzhiyun  },
182*4882a593Smuzhiyun  {
183*4882a593Smuzhiyun    "EventCode": "0x2000a",
184*4882a593Smuzhiyun    "EventName": "PM_HV_CYC",
185*4882a593Smuzhiyun    "BriefDescription": "Cycles in which msr_hv is high. Note that this event does not take msr_pr into consideration",
186*4882a593Smuzhiyun    "PublicDescription": "cycles in hypervisor mode"
187*4882a593Smuzhiyun  },
188*4882a593Smuzhiyun  {
189*4882a593Smuzhiyun    "EventCode": "0x3405e",
190*4882a593Smuzhiyun    "EventName": "PM_IFETCH_THROTTLE",
191*4882a593Smuzhiyun    "BriefDescription": "Cycles in which Instruction fetch throttle was active",
192*4882a593Smuzhiyun    "PublicDescription": "Cycles instruction fecth was throttled in IFU"
193*4882a593Smuzhiyun  },
194*4882a593Smuzhiyun  {
195*4882a593Smuzhiyun    "EventCode": "0x10014",
196*4882a593Smuzhiyun    "EventName": "PM_IOPS_CMPL",
197*4882a593Smuzhiyun    "BriefDescription": "Internal Operations completed",
198*4882a593Smuzhiyun    "PublicDescription": "IOPS Completed"
199*4882a593Smuzhiyun  },
200*4882a593Smuzhiyun  {
201*4882a593Smuzhiyun    "EventCode": "0x3c058",
202*4882a593Smuzhiyun    "EventName": "PM_LARX_FIN",
203*4882a593Smuzhiyun    "BriefDescription": "Larx finished",
204*4882a593Smuzhiyun    "PublicDescription": ""
205*4882a593Smuzhiyun  },
206*4882a593Smuzhiyun  {
207*4882a593Smuzhiyun    "EventCode": "0x1002e",
208*4882a593Smuzhiyun    "EventName": "PM_LD_CMPL",
209*4882a593Smuzhiyun    "BriefDescription": "count of Loads completed",
210*4882a593Smuzhiyun    "PublicDescription": ""
211*4882a593Smuzhiyun  },
212*4882a593Smuzhiyun  {
213*4882a593Smuzhiyun    "EventCode": "0x10062",
214*4882a593Smuzhiyun    "EventName": "PM_LD_L3MISS_PEND_CYC",
215*4882a593Smuzhiyun    "BriefDescription": "Cycles L3 miss was pending for this thread",
216*4882a593Smuzhiyun    "PublicDescription": ""
217*4882a593Smuzhiyun  },
218*4882a593Smuzhiyun  {
219*4882a593Smuzhiyun    "EventCode": "0x30066",
220*4882a593Smuzhiyun    "EventName": "PM_LSU_FIN",
221*4882a593Smuzhiyun    "BriefDescription": "LSU Finished an instruction (up to 2 per cycle)",
222*4882a593Smuzhiyun    "PublicDescription": ""
223*4882a593Smuzhiyun  },
224*4882a593Smuzhiyun  {
225*4882a593Smuzhiyun    "EventCode": "0x2003e",
226*4882a593Smuzhiyun    "EventName": "PM_LSU_LMQ_SRQ_EMPTY_CYC",
227*4882a593Smuzhiyun    "BriefDescription": "LSU empty (lmq and srq empty)",
228*4882a593Smuzhiyun    "PublicDescription": ""
229*4882a593Smuzhiyun  },
230*4882a593Smuzhiyun  {
231*4882a593Smuzhiyun    "EventCode": "0x2e05c",
232*4882a593Smuzhiyun    "EventName": "PM_LSU_REJECT_ERAT_MISS",
233*4882a593Smuzhiyun    "BriefDescription": "LSU Reject due to ERAT (up to 4 per cycles)",
234*4882a593Smuzhiyun    "PublicDescription": ""
235*4882a593Smuzhiyun  },
236*4882a593Smuzhiyun  {
237*4882a593Smuzhiyun    "EventCode": "0x4e05c",
238*4882a593Smuzhiyun    "EventName": "PM_LSU_REJECT_LHS",
239*4882a593Smuzhiyun    "BriefDescription": "LSU Reject due to LHS (up to 4 per cycle)",
240*4882a593Smuzhiyun    "PublicDescription": ""
241*4882a593Smuzhiyun  },
242*4882a593Smuzhiyun  {
243*4882a593Smuzhiyun    "EventCode": "0x1e05c",
244*4882a593Smuzhiyun    "EventName": "PM_LSU_REJECT_LMQ_FULL",
245*4882a593Smuzhiyun    "BriefDescription": "LSU reject due to LMQ full ( 4 per cycle)",
246*4882a593Smuzhiyun    "PublicDescription": ""
247*4882a593Smuzhiyun  },
248*4882a593Smuzhiyun  {
249*4882a593Smuzhiyun    "EventCode": "0x1001a",
250*4882a593Smuzhiyun    "EventName": "PM_LSU_SRQ_FULL_CYC",
251*4882a593Smuzhiyun    "BriefDescription": "Storage Queue is full and is blocking dispatch",
252*4882a593Smuzhiyun    "PublicDescription": "SRQ is Full"
253*4882a593Smuzhiyun  },
254*4882a593Smuzhiyun  {
255*4882a593Smuzhiyun    "EventCode": "0x40014",
256*4882a593Smuzhiyun    "EventName": "PM_PROBE_NOP_DISP",
257*4882a593Smuzhiyun    "BriefDescription": "ProbeNops dispatched",
258*4882a593Smuzhiyun    "PublicDescription": ""
259*4882a593Smuzhiyun  },
260*4882a593Smuzhiyun  {
261*4882a593Smuzhiyun    "EventCode": "0x600f4",
262*4882a593Smuzhiyun    "EventName": "PM_RUN_CYC",
263*4882a593Smuzhiyun    "BriefDescription": "Run_cycles",
264*4882a593Smuzhiyun    "PublicDescription": ""
265*4882a593Smuzhiyun  },
266*4882a593Smuzhiyun  {
267*4882a593Smuzhiyun    "EventCode": "0x3006c",
268*4882a593Smuzhiyun    "EventName": "PM_RUN_CYC_SMT2_MODE",
269*4882a593Smuzhiyun    "BriefDescription": "Cycles run latch is set and core is in SMT2 mode",
270*4882a593Smuzhiyun    "PublicDescription": ""
271*4882a593Smuzhiyun  },
272*4882a593Smuzhiyun  {
273*4882a593Smuzhiyun    "EventCode": "0x2006c",
274*4882a593Smuzhiyun    "EventName": "PM_RUN_CYC_SMT4_MODE",
275*4882a593Smuzhiyun    "BriefDescription": "cycles this threads run latch is set and the core is in SMT4 mode",
276*4882a593Smuzhiyun    "PublicDescription": "Cycles run latch is set and core is in SMT4 mode"
277*4882a593Smuzhiyun  },
278*4882a593Smuzhiyun  {
279*4882a593Smuzhiyun    "EventCode": "0x1006c",
280*4882a593Smuzhiyun    "EventName": "PM_RUN_CYC_ST_MODE",
281*4882a593Smuzhiyun    "BriefDescription": "Cycles run latch is set and core is in ST mode",
282*4882a593Smuzhiyun    "PublicDescription": ""
283*4882a593Smuzhiyun  },
284*4882a593Smuzhiyun  {
285*4882a593Smuzhiyun    "EventCode": "0x500fa",
286*4882a593Smuzhiyun    "EventName": "PM_RUN_INST_CMPL",
287*4882a593Smuzhiyun    "BriefDescription": "Run_Instructions",
288*4882a593Smuzhiyun    "PublicDescription": ""
289*4882a593Smuzhiyun  },
290*4882a593Smuzhiyun  {
291*4882a593Smuzhiyun    "EventCode": "0x1e058",
292*4882a593Smuzhiyun    "EventName": "PM_STCX_FAIL",
293*4882a593Smuzhiyun    "BriefDescription": "stcx failed",
294*4882a593Smuzhiyun    "PublicDescription": ""
295*4882a593Smuzhiyun  },
296*4882a593Smuzhiyun  {
297*4882a593Smuzhiyun    "EventCode": "0x20016",
298*4882a593Smuzhiyun    "EventName": "PM_ST_CMPL",
299*4882a593Smuzhiyun    "BriefDescription": "Store completion count",
300*4882a593Smuzhiyun    "PublicDescription": ""
301*4882a593Smuzhiyun  },
302*4882a593Smuzhiyun  {
303*4882a593Smuzhiyun    "EventCode": "0x200f0",
304*4882a593Smuzhiyun    "EventName": "PM_ST_FIN",
305*4882a593Smuzhiyun    "BriefDescription": "Store Instructions Finished",
306*4882a593Smuzhiyun    "PublicDescription": "Store Instructions Finished (store sent to nest)"
307*4882a593Smuzhiyun  },
308*4882a593Smuzhiyun  {
309*4882a593Smuzhiyun    "EventCode": "0x20018",
310*4882a593Smuzhiyun    "EventName": "PM_ST_FWD",
311*4882a593Smuzhiyun    "BriefDescription": "Store forwards that finished",
312*4882a593Smuzhiyun    "PublicDescription": ""
313*4882a593Smuzhiyun  },
314*4882a593Smuzhiyun  {
315*4882a593Smuzhiyun    "EventCode": "0x10026",
316*4882a593Smuzhiyun    "EventName": "PM_TABLEWALK_CYC",
317*4882a593Smuzhiyun    "BriefDescription": "Cycles when a tablewalk (I or D) is active",
318*4882a593Smuzhiyun    "PublicDescription": "Tablewalk Active"
319*4882a593Smuzhiyun  },
320*4882a593Smuzhiyun  {
321*4882a593Smuzhiyun    "EventCode": "0x300f8",
322*4882a593Smuzhiyun    "EventName": "PM_TB_BIT_TRANS",
323*4882a593Smuzhiyun    "BriefDescription": "timebase event",
324*4882a593Smuzhiyun    "PublicDescription": ""
325*4882a593Smuzhiyun  },
326*4882a593Smuzhiyun  {
327*4882a593Smuzhiyun    "EventCode": "0x2000c",
328*4882a593Smuzhiyun    "EventName": "PM_THRD_ALL_RUN_CYC",
329*4882a593Smuzhiyun    "BriefDescription": "All Threads in Run_cycles (was both threads in run_cycles)",
330*4882a593Smuzhiyun    "PublicDescription": ""
331*4882a593Smuzhiyun  },
332*4882a593Smuzhiyun  {
333*4882a593Smuzhiyun    "EventCode": "0x30058",
334*4882a593Smuzhiyun    "EventName": "PM_TLBIE_FIN",
335*4882a593Smuzhiyun    "BriefDescription": "tlbie finished",
336*4882a593Smuzhiyun    "PublicDescription": ""
337*4882a593Smuzhiyun  },
338*4882a593Smuzhiyun  {
339*4882a593Smuzhiyun    "EventCode": "0x10060",
340*4882a593Smuzhiyun    "EventName": "PM_TM_TRANS_RUN_CYC",
341*4882a593Smuzhiyun    "BriefDescription": "run cycles in transactional state",
342*4882a593Smuzhiyun    "PublicDescription": ""
343*4882a593Smuzhiyun  },
344*4882a593Smuzhiyun  {
345*4882a593Smuzhiyun    "EventCode": "0x2e012",
346*4882a593Smuzhiyun    "EventName": "PM_TM_TX_PASS_RUN_CYC",
347*4882a593Smuzhiyun    "BriefDescription": "cycles spent in successful transactions",
348*4882a593Smuzhiyun    "PublicDescription": "run cycles spent in successful transactions"
349*4882a593Smuzhiyun  }
350*4882a593Smuzhiyun]
351