1*4882a593Smuzhiyun 2*4882a593SmuzhiyunThe contents of this directory allow users to specify PMU events in their 3*4882a593SmuzhiyunCPUs by their symbolic names rather than raw event codes (see example below). 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe main program in this directory, is the 'jevents', which is built and 6*4882a593Smuzhiyunexecuted _BEFORE_ the perf binary itself is built. 7*4882a593Smuzhiyun 8*4882a593SmuzhiyunThe 'jevents' program tries to locate and process JSON files in the directory 9*4882a593Smuzhiyuntree tools/perf/pmu-events/arch/foo. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun - Regular files with '.json' extension in the name are assumed to be 12*4882a593Smuzhiyun JSON files, each of which describes a set of PMU events. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun - The CSV file that maps a specific CPU to its set of PMU events is to 15*4882a593Smuzhiyun be named 'mapfile.csv' (see below for mapfile format). 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun - Directories are traversed, but all other files are ignored. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun - To reduce JSON event duplication per architecture, platform JSONs may 20*4882a593Smuzhiyun use "ArchStdEvent" keyword to dereference an "Architecture standard 21*4882a593Smuzhiyun events", defined in architecture standard JSONs. 22*4882a593Smuzhiyun Architecture standard JSONs must be located in the architecture root 23*4882a593Smuzhiyun folder. Matching is based on the "EventName" field. 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunThe PMU events supported by a CPU model are expected to grouped into topics 26*4882a593Smuzhiyunsuch as Pipelining, Cache, Memory, Floating-point etc. All events for a topic 27*4882a593Smuzhiyunshould be placed in a separate JSON file - where the file name identifies 28*4882a593Smuzhiyunthe topic. Eg: "Floating-point.json". 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunAll the topic JSON files for a CPU model/family should be in a separate 31*4882a593Smuzhiyunsub directory. Thus for the Silvermont X86 CPU: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun $ ls tools/perf/pmu-events/arch/x86/silvermont 34*4882a593Smuzhiyun cache.json memory.json virtual-memory.json 35*4882a593Smuzhiyun frontend.json pipeline.json 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunThe JSONs folder for a CPU model/family may be placed in the root arch 38*4882a593Smuzhiyunfolder, or may be placed in a vendor sub-folder under the arch folder 39*4882a593Smuzhiyunfor instances where the arch and vendor are not the same. 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunUsing the JSON files and the mapfile, 'jevents' generates the C source file, 42*4882a593Smuzhiyun'pmu-events.c', which encodes the two sets of tables: 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun - Set of 'PMU events tables' for all known CPUs in the architecture, 45*4882a593Smuzhiyun (one table like the following, per JSON file; table name 'pme_power8' 46*4882a593Smuzhiyun is derived from JSON file name, 'power8.json'). 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun struct pmu_event pme_power8[] = { 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun ... 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun { 53*4882a593Smuzhiyun .name = "pm_1plus_ppc_cmpl", 54*4882a593Smuzhiyun .event = "event=0x100f2", 55*4882a593Smuzhiyun .desc = "1 or more ppc insts finished,", 56*4882a593Smuzhiyun }, 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun ... 59*4882a593Smuzhiyun } 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun - A 'mapping table' that maps each CPU of the architecture, to its 62*4882a593Smuzhiyun 'PMU events table' 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun struct pmu_events_map pmu_events_map[] = { 65*4882a593Smuzhiyun { 66*4882a593Smuzhiyun .cpuid = "004b0000", 67*4882a593Smuzhiyun .version = "1", 68*4882a593Smuzhiyun .type = "core", 69*4882a593Smuzhiyun .table = pme_power8 70*4882a593Smuzhiyun }, 71*4882a593Smuzhiyun ... 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593SmuzhiyunAfter the 'pmu-events.c' is generated, it is compiled and the resulting 76*4882a593Smuzhiyun'pmu-events.o' is added to 'libperf.a' which is then used to build perf. 77*4882a593Smuzhiyun 78*4882a593SmuzhiyunNOTES: 79*4882a593Smuzhiyun 1. Several CPUs can support same set of events and hence use a common 80*4882a593Smuzhiyun JSON file. Hence several entries in the pmu_events_map[] could map 81*4882a593Smuzhiyun to a single 'PMU events table'. 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun 2. The 'pmu-events.h' has an extern declaration for the mapping table 84*4882a593Smuzhiyun and the generated 'pmu-events.c' defines this table. 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun 3. _All_ known CPU tables for architecture are included in the perf 87*4882a593Smuzhiyun binary. 88*4882a593Smuzhiyun 89*4882a593SmuzhiyunAt run time, perf determines the actual CPU it is running on, finds the 90*4882a593Smuzhiyunmatching events table and builds aliases for those events. This allows 91*4882a593Smuzhiyunusers to specify events by their name: 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun $ perf stat -e pm_1plus_ppc_cmpl sleep 1 94*4882a593Smuzhiyun 95*4882a593Smuzhiyunwhere 'pm_1plus_ppc_cmpl' is a Power8 PMU event. 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunHowever some errors in processing may cause the alias build to fail. 98*4882a593Smuzhiyun 99*4882a593SmuzhiyunMapfile format 100*4882a593Smuzhiyun=============== 101*4882a593Smuzhiyun 102*4882a593SmuzhiyunThe mapfile enables multiple CPU models to share a single set of PMU events. 103*4882a593SmuzhiyunIt is required even if such mapping is 1:1. 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunThe mapfile.csv format is expected to be: 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun Header line 108*4882a593Smuzhiyun CPUID,Version,Dir/path/name,Type 109*4882a593Smuzhiyun 110*4882a593Smuzhiyunwhere: 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun Comma: 113*4882a593Smuzhiyun is the required field delimiter (i.e other fields cannot 114*4882a593Smuzhiyun have commas within them). 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun Comments: 117*4882a593Smuzhiyun Lines in which the first character is either '\n' or '#' 118*4882a593Smuzhiyun are ignored. 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun Header line 121*4882a593Smuzhiyun The header line is the first line in the file, which is 122*4882a593Smuzhiyun always _IGNORED_. It can be empty. 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun CPUID: 125*4882a593Smuzhiyun CPUID is an arch-specific char string, that can be used 126*4882a593Smuzhiyun to identify CPU (and associate it with a set of PMU events 127*4882a593Smuzhiyun it supports). Multiple CPUIDS can point to the same 128*4882a593Smuzhiyun File/path/name.json. 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun Example: 131*4882a593Smuzhiyun CPUID == 'GenuineIntel-6-2E' (on x86). 132*4882a593Smuzhiyun CPUID == '004b0100' (PVR value in Powerpc) 133*4882a593Smuzhiyun Version: 134*4882a593Smuzhiyun is the Version of the mapfile. 135*4882a593Smuzhiyun 136*4882a593Smuzhiyun Dir/path/name: 137*4882a593Smuzhiyun is the pathname to the directory containing the CPU's JSON 138*4882a593Smuzhiyun files, relative to the directory containing the mapfile.csv 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun Type: 141*4882a593Smuzhiyun indicates whether the events are "core" or "uncore" events. 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun Eg: 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun $ grep silvermont tools/perf/pmu-events/arch/x86/mapfile.csv 147*4882a593Smuzhiyun GenuineIntel-6-37,v13,silvermont,core 148*4882a593Smuzhiyun GenuineIntel-6-4D,v13,silvermont,core 149*4882a593Smuzhiyun GenuineIntel-6-4C,v13,silvermont,core 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun i.e the three CPU models use the JSON files (i.e PMU events) listed 152*4882a593Smuzhiyun in the directory 'tools/perf/pmu-events/arch/x86/silvermont'. 153