1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * intel_pt.c: Intel Processor Trace support
4*4882a593Smuzhiyun * Copyright (c) 2013-2015, Intel Corporation.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <errno.h>
8*4882a593Smuzhiyun #include <stdbool.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/types.h>
11*4882a593Smuzhiyun #include <linux/bitops.h>
12*4882a593Smuzhiyun #include <linux/log2.h>
13*4882a593Smuzhiyun #include <linux/zalloc.h>
14*4882a593Smuzhiyun #include <cpuid.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include "../../../util/session.h"
17*4882a593Smuzhiyun #include "../../../util/event.h"
18*4882a593Smuzhiyun #include "../../../util/evlist.h"
19*4882a593Smuzhiyun #include "../../../util/evsel.h"
20*4882a593Smuzhiyun #include "../../../util/evsel_config.h"
21*4882a593Smuzhiyun #include "../../../util/cpumap.h"
22*4882a593Smuzhiyun #include "../../../util/mmap.h"
23*4882a593Smuzhiyun #include <subcmd/parse-options.h>
24*4882a593Smuzhiyun #include "../../../util/parse-events.h"
25*4882a593Smuzhiyun #include "../../../util/pmu.h"
26*4882a593Smuzhiyun #include "../../../util/debug.h"
27*4882a593Smuzhiyun #include "../../../util/auxtrace.h"
28*4882a593Smuzhiyun #include "../../../util/perf_api_probe.h"
29*4882a593Smuzhiyun #include "../../../util/record.h"
30*4882a593Smuzhiyun #include "../../../util/target.h"
31*4882a593Smuzhiyun #include "../../../util/tsc.h"
32*4882a593Smuzhiyun #include <internal/lib.h> // page_size
33*4882a593Smuzhiyun #include "../../../util/intel-pt.h"
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define KiB(x) ((x) * 1024)
36*4882a593Smuzhiyun #define MiB(x) ((x) * 1024 * 1024)
37*4882a593Smuzhiyun #define KiB_MASK(x) (KiB(x) - 1)
38*4882a593Smuzhiyun #define MiB_MASK(x) (MiB(x) - 1)
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define INTEL_PT_PSB_PERIOD_NEAR 256
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun struct intel_pt_snapshot_ref {
43*4882a593Smuzhiyun void *ref_buf;
44*4882a593Smuzhiyun size_t ref_offset;
45*4882a593Smuzhiyun bool wrapped;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun struct intel_pt_recording {
49*4882a593Smuzhiyun struct auxtrace_record itr;
50*4882a593Smuzhiyun struct perf_pmu *intel_pt_pmu;
51*4882a593Smuzhiyun int have_sched_switch;
52*4882a593Smuzhiyun struct evlist *evlist;
53*4882a593Smuzhiyun bool snapshot_mode;
54*4882a593Smuzhiyun bool snapshot_init_done;
55*4882a593Smuzhiyun size_t snapshot_size;
56*4882a593Smuzhiyun size_t snapshot_ref_buf_size;
57*4882a593Smuzhiyun int snapshot_ref_cnt;
58*4882a593Smuzhiyun struct intel_pt_snapshot_ref *snapshot_refs;
59*4882a593Smuzhiyun size_t priv_size;
60*4882a593Smuzhiyun };
61*4882a593Smuzhiyun
intel_pt_parse_terms_with_default(const char * pmu_name,struct list_head * formats,const char * str,u64 * config)62*4882a593Smuzhiyun static int intel_pt_parse_terms_with_default(const char *pmu_name,
63*4882a593Smuzhiyun struct list_head *formats,
64*4882a593Smuzhiyun const char *str,
65*4882a593Smuzhiyun u64 *config)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun struct list_head *terms;
68*4882a593Smuzhiyun struct perf_event_attr attr = { .size = 0, };
69*4882a593Smuzhiyun int err;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun terms = malloc(sizeof(struct list_head));
72*4882a593Smuzhiyun if (!terms)
73*4882a593Smuzhiyun return -ENOMEM;
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun INIT_LIST_HEAD(terms);
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun err = parse_events_terms(terms, str);
78*4882a593Smuzhiyun if (err)
79*4882a593Smuzhiyun goto out_free;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun attr.config = *config;
82*4882a593Smuzhiyun err = perf_pmu__config_terms(pmu_name, formats, &attr, terms, true,
83*4882a593Smuzhiyun NULL);
84*4882a593Smuzhiyun if (err)
85*4882a593Smuzhiyun goto out_free;
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun *config = attr.config;
88*4882a593Smuzhiyun out_free:
89*4882a593Smuzhiyun parse_events_terms__delete(terms);
90*4882a593Smuzhiyun return err;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
intel_pt_parse_terms(const char * pmu_name,struct list_head * formats,const char * str,u64 * config)93*4882a593Smuzhiyun static int intel_pt_parse_terms(const char *pmu_name, struct list_head *formats,
94*4882a593Smuzhiyun const char *str, u64 *config)
95*4882a593Smuzhiyun {
96*4882a593Smuzhiyun *config = 0;
97*4882a593Smuzhiyun return intel_pt_parse_terms_with_default(pmu_name, formats, str,
98*4882a593Smuzhiyun config);
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
intel_pt_masked_bits(u64 mask,u64 bits)101*4882a593Smuzhiyun static u64 intel_pt_masked_bits(u64 mask, u64 bits)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun const u64 top_bit = 1ULL << 63;
104*4882a593Smuzhiyun u64 res = 0;
105*4882a593Smuzhiyun int i;
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun for (i = 0; i < 64; i++) {
108*4882a593Smuzhiyun if (mask & top_bit) {
109*4882a593Smuzhiyun res <<= 1;
110*4882a593Smuzhiyun if (bits & top_bit)
111*4882a593Smuzhiyun res |= 1;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun mask <<= 1;
114*4882a593Smuzhiyun bits <<= 1;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun return res;
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun
intel_pt_read_config(struct perf_pmu * intel_pt_pmu,const char * str,struct evlist * evlist,u64 * res)120*4882a593Smuzhiyun static int intel_pt_read_config(struct perf_pmu *intel_pt_pmu, const char *str,
121*4882a593Smuzhiyun struct evlist *evlist, u64 *res)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun struct evsel *evsel;
124*4882a593Smuzhiyun u64 mask;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun *res = 0;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun mask = perf_pmu__format_bits(&intel_pt_pmu->format, str);
129*4882a593Smuzhiyun if (!mask)
130*4882a593Smuzhiyun return -EINVAL;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun evlist__for_each_entry(evlist, evsel) {
133*4882a593Smuzhiyun if (evsel->core.attr.type == intel_pt_pmu->type) {
134*4882a593Smuzhiyun *res = intel_pt_masked_bits(mask, evsel->core.attr.config);
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return -EINVAL;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
intel_pt_psb_period(struct perf_pmu * intel_pt_pmu,struct evlist * evlist)142*4882a593Smuzhiyun static size_t intel_pt_psb_period(struct perf_pmu *intel_pt_pmu,
143*4882a593Smuzhiyun struct evlist *evlist)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun u64 val;
146*4882a593Smuzhiyun int err, topa_multiple_entries;
147*4882a593Smuzhiyun size_t psb_period;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "caps/topa_multiple_entries",
150*4882a593Smuzhiyun "%d", &topa_multiple_entries) != 1)
151*4882a593Smuzhiyun topa_multiple_entries = 0;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun * Use caps/topa_multiple_entries to indicate early hardware that had
155*4882a593Smuzhiyun * extra frequent PSBs.
156*4882a593Smuzhiyun */
157*4882a593Smuzhiyun if (!topa_multiple_entries) {
158*4882a593Smuzhiyun psb_period = 256;
159*4882a593Smuzhiyun goto out;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun err = intel_pt_read_config(intel_pt_pmu, "psb_period", evlist, &val);
163*4882a593Smuzhiyun if (err)
164*4882a593Smuzhiyun val = 0;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun psb_period = 1 << (val + 11);
167*4882a593Smuzhiyun out:
168*4882a593Smuzhiyun pr_debug2("%s psb_period %zu\n", intel_pt_pmu->name, psb_period);
169*4882a593Smuzhiyun return psb_period;
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun
intel_pt_pick_bit(int bits,int target)172*4882a593Smuzhiyun static int intel_pt_pick_bit(int bits, int target)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun int pos, pick = -1;
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun for (pos = 0; bits; bits >>= 1, pos++) {
177*4882a593Smuzhiyun if (bits & 1) {
178*4882a593Smuzhiyun if (pos <= target || pick < 0)
179*4882a593Smuzhiyun pick = pos;
180*4882a593Smuzhiyun if (pos >= target)
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return pick;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
intel_pt_default_config(struct perf_pmu * intel_pt_pmu)188*4882a593Smuzhiyun static u64 intel_pt_default_config(struct perf_pmu *intel_pt_pmu)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun char buf[256];
191*4882a593Smuzhiyun int mtc, mtc_periods = 0, mtc_period;
192*4882a593Smuzhiyun int psb_cyc, psb_periods, psb_period;
193*4882a593Smuzhiyun int pos = 0;
194*4882a593Smuzhiyun u64 config;
195*4882a593Smuzhiyun char c;
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun pos += scnprintf(buf + pos, sizeof(buf) - pos, "tsc");
198*4882a593Smuzhiyun
199*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc", "%d",
200*4882a593Smuzhiyun &mtc) != 1)
201*4882a593Smuzhiyun mtc = 1;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (mtc) {
204*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "caps/mtc_periods", "%x",
205*4882a593Smuzhiyun &mtc_periods) != 1)
206*4882a593Smuzhiyun mtc_periods = 0;
207*4882a593Smuzhiyun if (mtc_periods) {
208*4882a593Smuzhiyun mtc_period = intel_pt_pick_bit(mtc_periods, 3);
209*4882a593Smuzhiyun pos += scnprintf(buf + pos, sizeof(buf) - pos,
210*4882a593Smuzhiyun ",mtc,mtc_period=%d", mtc_period);
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun }
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_cyc", "%d",
215*4882a593Smuzhiyun &psb_cyc) != 1)
216*4882a593Smuzhiyun psb_cyc = 1;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun if (psb_cyc && mtc_periods) {
219*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "caps/psb_periods", "%x",
220*4882a593Smuzhiyun &psb_periods) != 1)
221*4882a593Smuzhiyun psb_periods = 0;
222*4882a593Smuzhiyun if (psb_periods) {
223*4882a593Smuzhiyun psb_period = intel_pt_pick_bit(psb_periods, 3);
224*4882a593Smuzhiyun pos += scnprintf(buf + pos, sizeof(buf) - pos,
225*4882a593Smuzhiyun ",psb_period=%d", psb_period);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
230*4882a593Smuzhiyun perf_pmu__scan_file(intel_pt_pmu, "format/branch", "%c", &c) == 1)
231*4882a593Smuzhiyun pos += scnprintf(buf + pos, sizeof(buf) - pos, ",pt,branch");
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun pr_debug2("%s default config: %s\n", intel_pt_pmu->name, buf);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format, buf,
236*4882a593Smuzhiyun &config);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun return config;
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
intel_pt_parse_snapshot_options(struct auxtrace_record * itr,struct record_opts * opts,const char * str)241*4882a593Smuzhiyun static int intel_pt_parse_snapshot_options(struct auxtrace_record *itr,
242*4882a593Smuzhiyun struct record_opts *opts,
243*4882a593Smuzhiyun const char *str)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun struct intel_pt_recording *ptr =
246*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
247*4882a593Smuzhiyun unsigned long long snapshot_size = 0;
248*4882a593Smuzhiyun char *endptr;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun if (str) {
251*4882a593Smuzhiyun snapshot_size = strtoull(str, &endptr, 0);
252*4882a593Smuzhiyun if (*endptr || snapshot_size > SIZE_MAX)
253*4882a593Smuzhiyun return -1;
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun opts->auxtrace_snapshot_mode = true;
257*4882a593Smuzhiyun opts->auxtrace_snapshot_size = snapshot_size;
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun ptr->snapshot_size = snapshot_size;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun struct perf_event_attr *
intel_pt_pmu_default_config(struct perf_pmu * intel_pt_pmu)265*4882a593Smuzhiyun intel_pt_pmu_default_config(struct perf_pmu *intel_pt_pmu)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct perf_event_attr *attr;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun attr = zalloc(sizeof(struct perf_event_attr));
270*4882a593Smuzhiyun if (!attr)
271*4882a593Smuzhiyun return NULL;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun attr->config = intel_pt_default_config(intel_pt_pmu);
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun intel_pt_pmu->selectable = true;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun return attr;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
intel_pt_find_filter(struct evlist * evlist,struct perf_pmu * intel_pt_pmu)280*4882a593Smuzhiyun static const char *intel_pt_find_filter(struct evlist *evlist,
281*4882a593Smuzhiyun struct perf_pmu *intel_pt_pmu)
282*4882a593Smuzhiyun {
283*4882a593Smuzhiyun struct evsel *evsel;
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun evlist__for_each_entry(evlist, evsel) {
286*4882a593Smuzhiyun if (evsel->core.attr.type == intel_pt_pmu->type)
287*4882a593Smuzhiyun return evsel->filter;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun return NULL;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
intel_pt_filter_bytes(const char * filter)293*4882a593Smuzhiyun static size_t intel_pt_filter_bytes(const char *filter)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun size_t len = filter ? strlen(filter) : 0;
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun return len ? roundup(len + 1, 8) : 0;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun static size_t
intel_pt_info_priv_size(struct auxtrace_record * itr,struct evlist * evlist)301*4882a593Smuzhiyun intel_pt_info_priv_size(struct auxtrace_record *itr, struct evlist *evlist)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct intel_pt_recording *ptr =
304*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
305*4882a593Smuzhiyun const char *filter = intel_pt_find_filter(evlist, ptr->intel_pt_pmu);
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun ptr->priv_size = (INTEL_PT_AUXTRACE_PRIV_MAX * sizeof(u64)) +
308*4882a593Smuzhiyun intel_pt_filter_bytes(filter);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun return ptr->priv_size;
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
intel_pt_tsc_ctc_ratio(u32 * n,u32 * d)313*4882a593Smuzhiyun static void intel_pt_tsc_ctc_ratio(u32 *n, u32 *d)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun unsigned int eax = 0, ebx = 0, ecx = 0, edx = 0;
316*4882a593Smuzhiyun
317*4882a593Smuzhiyun __get_cpuid(0x15, &eax, &ebx, &ecx, &edx);
318*4882a593Smuzhiyun *n = ebx;
319*4882a593Smuzhiyun *d = eax;
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
intel_pt_info_fill(struct auxtrace_record * itr,struct perf_session * session,struct perf_record_auxtrace_info * auxtrace_info,size_t priv_size)322*4882a593Smuzhiyun static int intel_pt_info_fill(struct auxtrace_record *itr,
323*4882a593Smuzhiyun struct perf_session *session,
324*4882a593Smuzhiyun struct perf_record_auxtrace_info *auxtrace_info,
325*4882a593Smuzhiyun size_t priv_size)
326*4882a593Smuzhiyun {
327*4882a593Smuzhiyun struct intel_pt_recording *ptr =
328*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
329*4882a593Smuzhiyun struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
330*4882a593Smuzhiyun struct perf_event_mmap_page *pc;
331*4882a593Smuzhiyun struct perf_tsc_conversion tc = { .time_mult = 0, };
332*4882a593Smuzhiyun bool cap_user_time_zero = false, per_cpu_mmaps;
333*4882a593Smuzhiyun u64 tsc_bit, mtc_bit, mtc_freq_bits, cyc_bit, noretcomp_bit;
334*4882a593Smuzhiyun u32 tsc_ctc_ratio_n, tsc_ctc_ratio_d;
335*4882a593Smuzhiyun unsigned long max_non_turbo_ratio;
336*4882a593Smuzhiyun size_t filter_str_len;
337*4882a593Smuzhiyun const char *filter;
338*4882a593Smuzhiyun __u64 *info;
339*4882a593Smuzhiyun int err;
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun if (priv_size != ptr->priv_size)
342*4882a593Smuzhiyun return -EINVAL;
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
345*4882a593Smuzhiyun "tsc", &tsc_bit);
346*4882a593Smuzhiyun intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
347*4882a593Smuzhiyun "noretcomp", &noretcomp_bit);
348*4882a593Smuzhiyun intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
349*4882a593Smuzhiyun "mtc", &mtc_bit);
350*4882a593Smuzhiyun mtc_freq_bits = perf_pmu__format_bits(&intel_pt_pmu->format,
351*4882a593Smuzhiyun "mtc_period");
352*4882a593Smuzhiyun intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
353*4882a593Smuzhiyun "cyc", &cyc_bit);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun intel_pt_tsc_ctc_ratio(&tsc_ctc_ratio_n, &tsc_ctc_ratio_d);
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "max_nonturbo_ratio",
358*4882a593Smuzhiyun "%lu", &max_non_turbo_ratio) != 1)
359*4882a593Smuzhiyun max_non_turbo_ratio = 0;
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun filter = intel_pt_find_filter(session->evlist, ptr->intel_pt_pmu);
362*4882a593Smuzhiyun filter_str_len = filter ? strlen(filter) : 0;
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun if (!session->evlist->core.nr_mmaps)
365*4882a593Smuzhiyun return -EINVAL;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun pc = session->evlist->mmap[0].core.base;
368*4882a593Smuzhiyun if (pc) {
369*4882a593Smuzhiyun err = perf_read_tsc_conversion(pc, &tc);
370*4882a593Smuzhiyun if (err) {
371*4882a593Smuzhiyun if (err != -EOPNOTSUPP)
372*4882a593Smuzhiyun return err;
373*4882a593Smuzhiyun } else {
374*4882a593Smuzhiyun cap_user_time_zero = tc.time_mult != 0;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun if (!cap_user_time_zero)
377*4882a593Smuzhiyun ui__warning("Intel Processor Trace: TSC not available\n");
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun per_cpu_mmaps = !perf_cpu_map__empty(session->evlist->core.cpus);
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun auxtrace_info->type = PERF_AUXTRACE_INTEL_PT;
383*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_PMU_TYPE] = intel_pt_pmu->type;
384*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_TIME_SHIFT] = tc.time_shift;
385*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_TIME_MULT] = tc.time_mult;
386*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_TIME_ZERO] = tc.time_zero;
387*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_CAP_USER_TIME_ZERO] = cap_user_time_zero;
388*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_TSC_BIT] = tsc_bit;
389*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_NORETCOMP_BIT] = noretcomp_bit;
390*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_HAVE_SCHED_SWITCH] = ptr->have_sched_switch;
391*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_SNAPSHOT_MODE] = ptr->snapshot_mode;
392*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_PER_CPU_MMAPS] = per_cpu_mmaps;
393*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_MTC_BIT] = mtc_bit;
394*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_MTC_FREQ_BITS] = mtc_freq_bits;
395*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_TSC_CTC_N] = tsc_ctc_ratio_n;
396*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_TSC_CTC_D] = tsc_ctc_ratio_d;
397*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_CYC_BIT] = cyc_bit;
398*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_MAX_NONTURBO_RATIO] = max_non_turbo_ratio;
399*4882a593Smuzhiyun auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] = filter_str_len;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun info = &auxtrace_info->priv[INTEL_PT_FILTER_STR_LEN] + 1;
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun if (filter_str_len) {
404*4882a593Smuzhiyun size_t len = intel_pt_filter_bytes(filter);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun strncpy((char *)info, filter, len);
407*4882a593Smuzhiyun info += len >> 3;
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun return 0;
411*4882a593Smuzhiyun }
412*4882a593Smuzhiyun
intel_pt_track_switches(struct evlist * evlist)413*4882a593Smuzhiyun static int intel_pt_track_switches(struct evlist *evlist)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun const char *sched_switch = "sched:sched_switch";
416*4882a593Smuzhiyun struct evsel *evsel;
417*4882a593Smuzhiyun int err;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun if (!perf_evlist__can_select_event(evlist, sched_switch))
420*4882a593Smuzhiyun return -EPERM;
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun err = parse_events(evlist, sched_switch, NULL);
423*4882a593Smuzhiyun if (err) {
424*4882a593Smuzhiyun pr_debug2("%s: failed to parse %s, error %d\n",
425*4882a593Smuzhiyun __func__, sched_switch, err);
426*4882a593Smuzhiyun return err;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun evsel = evlist__last(evlist);
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun evsel__set_sample_bit(evsel, CPU);
432*4882a593Smuzhiyun evsel__set_sample_bit(evsel, TIME);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun evsel->core.system_wide = true;
435*4882a593Smuzhiyun evsel->no_aux_samples = true;
436*4882a593Smuzhiyun evsel->immediate = true;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun return 0;
439*4882a593Smuzhiyun }
440*4882a593Smuzhiyun
intel_pt_valid_str(char * str,size_t len,u64 valid)441*4882a593Smuzhiyun static void intel_pt_valid_str(char *str, size_t len, u64 valid)
442*4882a593Smuzhiyun {
443*4882a593Smuzhiyun unsigned int val, last = 0, state = 1;
444*4882a593Smuzhiyun int p = 0;
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun str[0] = '\0';
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun for (val = 0; val <= 64; val++, valid >>= 1) {
449*4882a593Smuzhiyun if (valid & 1) {
450*4882a593Smuzhiyun last = val;
451*4882a593Smuzhiyun switch (state) {
452*4882a593Smuzhiyun case 0:
453*4882a593Smuzhiyun p += scnprintf(str + p, len - p, ",");
454*4882a593Smuzhiyun /* Fall through */
455*4882a593Smuzhiyun case 1:
456*4882a593Smuzhiyun p += scnprintf(str + p, len - p, "%u", val);
457*4882a593Smuzhiyun state = 2;
458*4882a593Smuzhiyun break;
459*4882a593Smuzhiyun case 2:
460*4882a593Smuzhiyun state = 3;
461*4882a593Smuzhiyun break;
462*4882a593Smuzhiyun case 3:
463*4882a593Smuzhiyun state = 4;
464*4882a593Smuzhiyun break;
465*4882a593Smuzhiyun default:
466*4882a593Smuzhiyun break;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun } else {
469*4882a593Smuzhiyun switch (state) {
470*4882a593Smuzhiyun case 3:
471*4882a593Smuzhiyun p += scnprintf(str + p, len - p, ",%u", last);
472*4882a593Smuzhiyun state = 0;
473*4882a593Smuzhiyun break;
474*4882a593Smuzhiyun case 4:
475*4882a593Smuzhiyun p += scnprintf(str + p, len - p, "-%u", last);
476*4882a593Smuzhiyun state = 0;
477*4882a593Smuzhiyun break;
478*4882a593Smuzhiyun default:
479*4882a593Smuzhiyun break;
480*4882a593Smuzhiyun }
481*4882a593Smuzhiyun if (state != 1)
482*4882a593Smuzhiyun state = 0;
483*4882a593Smuzhiyun }
484*4882a593Smuzhiyun }
485*4882a593Smuzhiyun }
486*4882a593Smuzhiyun
intel_pt_val_config_term(struct perf_pmu * intel_pt_pmu,const char * caps,const char * name,const char * supported,u64 config)487*4882a593Smuzhiyun static int intel_pt_val_config_term(struct perf_pmu *intel_pt_pmu,
488*4882a593Smuzhiyun const char *caps, const char *name,
489*4882a593Smuzhiyun const char *supported, u64 config)
490*4882a593Smuzhiyun {
491*4882a593Smuzhiyun char valid_str[256];
492*4882a593Smuzhiyun unsigned int shift;
493*4882a593Smuzhiyun unsigned long long valid;
494*4882a593Smuzhiyun u64 bits;
495*4882a593Smuzhiyun int ok;
496*4882a593Smuzhiyun
497*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, caps, "%llx", &valid) != 1)
498*4882a593Smuzhiyun valid = 0;
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun if (supported &&
501*4882a593Smuzhiyun perf_pmu__scan_file(intel_pt_pmu, supported, "%d", &ok) == 1 && !ok)
502*4882a593Smuzhiyun valid = 0;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun valid |= 1;
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun bits = perf_pmu__format_bits(&intel_pt_pmu->format, name);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun config &= bits;
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun for (shift = 0; bits && !(bits & 1); shift++)
511*4882a593Smuzhiyun bits >>= 1;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun config >>= shift;
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun if (config > 63)
516*4882a593Smuzhiyun goto out_err;
517*4882a593Smuzhiyun
518*4882a593Smuzhiyun if (valid & (1 << config))
519*4882a593Smuzhiyun return 0;
520*4882a593Smuzhiyun out_err:
521*4882a593Smuzhiyun intel_pt_valid_str(valid_str, sizeof(valid_str), valid);
522*4882a593Smuzhiyun pr_err("Invalid %s for %s. Valid values are: %s\n",
523*4882a593Smuzhiyun name, INTEL_PT_PMU_NAME, valid_str);
524*4882a593Smuzhiyun return -EINVAL;
525*4882a593Smuzhiyun }
526*4882a593Smuzhiyun
intel_pt_validate_config(struct perf_pmu * intel_pt_pmu,struct evsel * evsel)527*4882a593Smuzhiyun static int intel_pt_validate_config(struct perf_pmu *intel_pt_pmu,
528*4882a593Smuzhiyun struct evsel *evsel)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun int err;
531*4882a593Smuzhiyun char c;
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun if (!evsel)
534*4882a593Smuzhiyun return 0;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun /*
537*4882a593Smuzhiyun * If supported, force pass-through config term (pt=1) even if user
538*4882a593Smuzhiyun * sets pt=0, which avoids senseless kernel errors.
539*4882a593Smuzhiyun */
540*4882a593Smuzhiyun if (perf_pmu__scan_file(intel_pt_pmu, "format/pt", "%c", &c) == 1 &&
541*4882a593Smuzhiyun !(evsel->core.attr.config & 1)) {
542*4882a593Smuzhiyun pr_warning("pt=0 doesn't make sense, forcing pt=1\n");
543*4882a593Smuzhiyun evsel->core.attr.config |= 1;
544*4882a593Smuzhiyun }
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun err = intel_pt_val_config_term(intel_pt_pmu, "caps/cycle_thresholds",
547*4882a593Smuzhiyun "cyc_thresh", "caps/psb_cyc",
548*4882a593Smuzhiyun evsel->core.attr.config);
549*4882a593Smuzhiyun if (err)
550*4882a593Smuzhiyun return err;
551*4882a593Smuzhiyun
552*4882a593Smuzhiyun err = intel_pt_val_config_term(intel_pt_pmu, "caps/mtc_periods",
553*4882a593Smuzhiyun "mtc_period", "caps/mtc",
554*4882a593Smuzhiyun evsel->core.attr.config);
555*4882a593Smuzhiyun if (err)
556*4882a593Smuzhiyun return err;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun return intel_pt_val_config_term(intel_pt_pmu, "caps/psb_periods",
559*4882a593Smuzhiyun "psb_period", "caps/psb_cyc",
560*4882a593Smuzhiyun evsel->core.attr.config);
561*4882a593Smuzhiyun }
562*4882a593Smuzhiyun
intel_pt_config_sample_mode(struct perf_pmu * intel_pt_pmu,struct evsel * evsel)563*4882a593Smuzhiyun static void intel_pt_config_sample_mode(struct perf_pmu *intel_pt_pmu,
564*4882a593Smuzhiyun struct evsel *evsel)
565*4882a593Smuzhiyun {
566*4882a593Smuzhiyun u64 user_bits = 0, bits;
567*4882a593Smuzhiyun struct evsel_config_term *term = evsel__get_config_term(evsel, CFG_CHG);
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun if (term)
570*4882a593Smuzhiyun user_bits = term->val.cfg_chg;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun bits = perf_pmu__format_bits(&intel_pt_pmu->format, "psb_period");
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun /* Did user change psb_period */
575*4882a593Smuzhiyun if (bits & user_bits)
576*4882a593Smuzhiyun return;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun /* Set psb_period to 0 */
579*4882a593Smuzhiyun evsel->core.attr.config &= ~bits;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
intel_pt_min_max_sample_sz(struct evlist * evlist,size_t * min_sz,size_t * max_sz)582*4882a593Smuzhiyun static void intel_pt_min_max_sample_sz(struct evlist *evlist,
583*4882a593Smuzhiyun size_t *min_sz, size_t *max_sz)
584*4882a593Smuzhiyun {
585*4882a593Smuzhiyun struct evsel *evsel;
586*4882a593Smuzhiyun
587*4882a593Smuzhiyun evlist__for_each_entry(evlist, evsel) {
588*4882a593Smuzhiyun size_t sz = evsel->core.attr.aux_sample_size;
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun if (!sz)
591*4882a593Smuzhiyun continue;
592*4882a593Smuzhiyun if (min_sz && (sz < *min_sz || !*min_sz))
593*4882a593Smuzhiyun *min_sz = sz;
594*4882a593Smuzhiyun if (max_sz && sz > *max_sz)
595*4882a593Smuzhiyun *max_sz = sz;
596*4882a593Smuzhiyun }
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun /*
600*4882a593Smuzhiyun * Currently, there is not enough information to disambiguate different PEBS
601*4882a593Smuzhiyun * events, so only allow one.
602*4882a593Smuzhiyun */
intel_pt_too_many_aux_output(struct evlist * evlist)603*4882a593Smuzhiyun static bool intel_pt_too_many_aux_output(struct evlist *evlist)
604*4882a593Smuzhiyun {
605*4882a593Smuzhiyun struct evsel *evsel;
606*4882a593Smuzhiyun int aux_output_cnt = 0;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun evlist__for_each_entry(evlist, evsel)
609*4882a593Smuzhiyun aux_output_cnt += !!evsel->core.attr.aux_output;
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun if (aux_output_cnt > 1) {
612*4882a593Smuzhiyun pr_err(INTEL_PT_PMU_NAME " supports at most one event with aux-output\n");
613*4882a593Smuzhiyun return true;
614*4882a593Smuzhiyun }
615*4882a593Smuzhiyun
616*4882a593Smuzhiyun return false;
617*4882a593Smuzhiyun }
618*4882a593Smuzhiyun
intel_pt_recording_options(struct auxtrace_record * itr,struct evlist * evlist,struct record_opts * opts)619*4882a593Smuzhiyun static int intel_pt_recording_options(struct auxtrace_record *itr,
620*4882a593Smuzhiyun struct evlist *evlist,
621*4882a593Smuzhiyun struct record_opts *opts)
622*4882a593Smuzhiyun {
623*4882a593Smuzhiyun struct intel_pt_recording *ptr =
624*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
625*4882a593Smuzhiyun struct perf_pmu *intel_pt_pmu = ptr->intel_pt_pmu;
626*4882a593Smuzhiyun bool have_timing_info, need_immediate = false;
627*4882a593Smuzhiyun struct evsel *evsel, *intel_pt_evsel = NULL;
628*4882a593Smuzhiyun const struct perf_cpu_map *cpus = evlist->core.cpus;
629*4882a593Smuzhiyun bool privileged = perf_event_paranoid_check(-1);
630*4882a593Smuzhiyun u64 tsc_bit;
631*4882a593Smuzhiyun int err;
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun ptr->evlist = evlist;
634*4882a593Smuzhiyun ptr->snapshot_mode = opts->auxtrace_snapshot_mode;
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun evlist__for_each_entry(evlist, evsel) {
637*4882a593Smuzhiyun if (evsel->core.attr.type == intel_pt_pmu->type) {
638*4882a593Smuzhiyun if (intel_pt_evsel) {
639*4882a593Smuzhiyun pr_err("There may be only one " INTEL_PT_PMU_NAME " event\n");
640*4882a593Smuzhiyun return -EINVAL;
641*4882a593Smuzhiyun }
642*4882a593Smuzhiyun evsel->core.attr.freq = 0;
643*4882a593Smuzhiyun evsel->core.attr.sample_period = 1;
644*4882a593Smuzhiyun evsel->no_aux_samples = true;
645*4882a593Smuzhiyun intel_pt_evsel = evsel;
646*4882a593Smuzhiyun opts->full_auxtrace = true;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun if (opts->auxtrace_snapshot_mode && !opts->full_auxtrace) {
651*4882a593Smuzhiyun pr_err("Snapshot mode (-S option) requires " INTEL_PT_PMU_NAME " PMU event (-e " INTEL_PT_PMU_NAME ")\n");
652*4882a593Smuzhiyun return -EINVAL;
653*4882a593Smuzhiyun }
654*4882a593Smuzhiyun
655*4882a593Smuzhiyun if (opts->auxtrace_snapshot_mode && opts->auxtrace_sample_mode) {
656*4882a593Smuzhiyun pr_err("Snapshot mode (" INTEL_PT_PMU_NAME " PMU) and sample trace cannot be used together\n");
657*4882a593Smuzhiyun return -EINVAL;
658*4882a593Smuzhiyun }
659*4882a593Smuzhiyun
660*4882a593Smuzhiyun if (opts->use_clockid) {
661*4882a593Smuzhiyun pr_err("Cannot use clockid (-k option) with " INTEL_PT_PMU_NAME "\n");
662*4882a593Smuzhiyun return -EINVAL;
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun if (intel_pt_too_many_aux_output(evlist))
666*4882a593Smuzhiyun return -EINVAL;
667*4882a593Smuzhiyun
668*4882a593Smuzhiyun if (!opts->full_auxtrace)
669*4882a593Smuzhiyun return 0;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun if (opts->auxtrace_sample_mode)
672*4882a593Smuzhiyun intel_pt_config_sample_mode(intel_pt_pmu, intel_pt_evsel);
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun err = intel_pt_validate_config(intel_pt_pmu, intel_pt_evsel);
675*4882a593Smuzhiyun if (err)
676*4882a593Smuzhiyun return err;
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun /* Set default sizes for snapshot mode */
679*4882a593Smuzhiyun if (opts->auxtrace_snapshot_mode) {
680*4882a593Smuzhiyun size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun if (!opts->auxtrace_snapshot_size && !opts->auxtrace_mmap_pages) {
683*4882a593Smuzhiyun if (privileged) {
684*4882a593Smuzhiyun opts->auxtrace_mmap_pages = MiB(4) / page_size;
685*4882a593Smuzhiyun } else {
686*4882a593Smuzhiyun opts->auxtrace_mmap_pages = KiB(128) / page_size;
687*4882a593Smuzhiyun if (opts->mmap_pages == UINT_MAX)
688*4882a593Smuzhiyun opts->mmap_pages = KiB(256) / page_size;
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun } else if (!opts->auxtrace_mmap_pages && !privileged &&
691*4882a593Smuzhiyun opts->mmap_pages == UINT_MAX) {
692*4882a593Smuzhiyun opts->mmap_pages = KiB(256) / page_size;
693*4882a593Smuzhiyun }
694*4882a593Smuzhiyun if (!opts->auxtrace_snapshot_size)
695*4882a593Smuzhiyun opts->auxtrace_snapshot_size =
696*4882a593Smuzhiyun opts->auxtrace_mmap_pages * (size_t)page_size;
697*4882a593Smuzhiyun if (!opts->auxtrace_mmap_pages) {
698*4882a593Smuzhiyun size_t sz = opts->auxtrace_snapshot_size;
699*4882a593Smuzhiyun
700*4882a593Smuzhiyun sz = round_up(sz, page_size) / page_size;
701*4882a593Smuzhiyun opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun if (opts->auxtrace_snapshot_size >
704*4882a593Smuzhiyun opts->auxtrace_mmap_pages * (size_t)page_size) {
705*4882a593Smuzhiyun pr_err("Snapshot size %zu must not be greater than AUX area tracing mmap size %zu\n",
706*4882a593Smuzhiyun opts->auxtrace_snapshot_size,
707*4882a593Smuzhiyun opts->auxtrace_mmap_pages * (size_t)page_size);
708*4882a593Smuzhiyun return -EINVAL;
709*4882a593Smuzhiyun }
710*4882a593Smuzhiyun if (!opts->auxtrace_snapshot_size || !opts->auxtrace_mmap_pages) {
711*4882a593Smuzhiyun pr_err("Failed to calculate default snapshot size and/or AUX area tracing mmap pages\n");
712*4882a593Smuzhiyun return -EINVAL;
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun pr_debug2("Intel PT snapshot size: %zu\n",
715*4882a593Smuzhiyun opts->auxtrace_snapshot_size);
716*4882a593Smuzhiyun if (psb_period &&
717*4882a593Smuzhiyun opts->auxtrace_snapshot_size <= psb_period +
718*4882a593Smuzhiyun INTEL_PT_PSB_PERIOD_NEAR)
719*4882a593Smuzhiyun ui__warning("Intel PT snapshot size (%zu) may be too small for PSB period (%zu)\n",
720*4882a593Smuzhiyun opts->auxtrace_snapshot_size, psb_period);
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun /* Set default sizes for sample mode */
724*4882a593Smuzhiyun if (opts->auxtrace_sample_mode) {
725*4882a593Smuzhiyun size_t psb_period = intel_pt_psb_period(intel_pt_pmu, evlist);
726*4882a593Smuzhiyun size_t min_sz = 0, max_sz = 0;
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun intel_pt_min_max_sample_sz(evlist, &min_sz, &max_sz);
729*4882a593Smuzhiyun if (!opts->auxtrace_mmap_pages && !privileged &&
730*4882a593Smuzhiyun opts->mmap_pages == UINT_MAX)
731*4882a593Smuzhiyun opts->mmap_pages = KiB(256) / page_size;
732*4882a593Smuzhiyun if (!opts->auxtrace_mmap_pages) {
733*4882a593Smuzhiyun size_t sz = round_up(max_sz, page_size) / page_size;
734*4882a593Smuzhiyun
735*4882a593Smuzhiyun opts->auxtrace_mmap_pages = roundup_pow_of_two(sz);
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun if (max_sz > opts->auxtrace_mmap_pages * (size_t)page_size) {
738*4882a593Smuzhiyun pr_err("Sample size %zu must not be greater than AUX area tracing mmap size %zu\n",
739*4882a593Smuzhiyun max_sz,
740*4882a593Smuzhiyun opts->auxtrace_mmap_pages * (size_t)page_size);
741*4882a593Smuzhiyun return -EINVAL;
742*4882a593Smuzhiyun }
743*4882a593Smuzhiyun pr_debug2("Intel PT min. sample size: %zu max. sample size: %zu\n",
744*4882a593Smuzhiyun min_sz, max_sz);
745*4882a593Smuzhiyun if (psb_period &&
746*4882a593Smuzhiyun min_sz <= psb_period + INTEL_PT_PSB_PERIOD_NEAR)
747*4882a593Smuzhiyun ui__warning("Intel PT sample size (%zu) may be too small for PSB period (%zu)\n",
748*4882a593Smuzhiyun min_sz, psb_period);
749*4882a593Smuzhiyun }
750*4882a593Smuzhiyun
751*4882a593Smuzhiyun /* Set default sizes for full trace mode */
752*4882a593Smuzhiyun if (opts->full_auxtrace && !opts->auxtrace_mmap_pages) {
753*4882a593Smuzhiyun if (privileged) {
754*4882a593Smuzhiyun opts->auxtrace_mmap_pages = MiB(4) / page_size;
755*4882a593Smuzhiyun } else {
756*4882a593Smuzhiyun opts->auxtrace_mmap_pages = KiB(128) / page_size;
757*4882a593Smuzhiyun if (opts->mmap_pages == UINT_MAX)
758*4882a593Smuzhiyun opts->mmap_pages = KiB(256) / page_size;
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun }
761*4882a593Smuzhiyun
762*4882a593Smuzhiyun /* Validate auxtrace_mmap_pages */
763*4882a593Smuzhiyun if (opts->auxtrace_mmap_pages) {
764*4882a593Smuzhiyun size_t sz = opts->auxtrace_mmap_pages * (size_t)page_size;
765*4882a593Smuzhiyun size_t min_sz;
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun if (opts->auxtrace_snapshot_mode || opts->auxtrace_sample_mode)
768*4882a593Smuzhiyun min_sz = KiB(4);
769*4882a593Smuzhiyun else
770*4882a593Smuzhiyun min_sz = KiB(8);
771*4882a593Smuzhiyun
772*4882a593Smuzhiyun if (sz < min_sz || !is_power_of_2(sz)) {
773*4882a593Smuzhiyun pr_err("Invalid mmap size for Intel Processor Trace: must be at least %zuKiB and a power of 2\n",
774*4882a593Smuzhiyun min_sz / 1024);
775*4882a593Smuzhiyun return -EINVAL;
776*4882a593Smuzhiyun }
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun
779*4882a593Smuzhiyun intel_pt_parse_terms(intel_pt_pmu->name, &intel_pt_pmu->format,
780*4882a593Smuzhiyun "tsc", &tsc_bit);
781*4882a593Smuzhiyun
782*4882a593Smuzhiyun if (opts->full_auxtrace && (intel_pt_evsel->core.attr.config & tsc_bit))
783*4882a593Smuzhiyun have_timing_info = true;
784*4882a593Smuzhiyun else
785*4882a593Smuzhiyun have_timing_info = false;
786*4882a593Smuzhiyun
787*4882a593Smuzhiyun /*
788*4882a593Smuzhiyun * Per-cpu recording needs sched_switch events to distinguish different
789*4882a593Smuzhiyun * threads.
790*4882a593Smuzhiyun */
791*4882a593Smuzhiyun if (have_timing_info && !perf_cpu_map__empty(cpus) &&
792*4882a593Smuzhiyun !record_opts__no_switch_events(opts)) {
793*4882a593Smuzhiyun if (perf_can_record_switch_events()) {
794*4882a593Smuzhiyun bool cpu_wide = !target__none(&opts->target) &&
795*4882a593Smuzhiyun !target__has_task(&opts->target);
796*4882a593Smuzhiyun
797*4882a593Smuzhiyun if (!cpu_wide && perf_can_record_cpu_wide()) {
798*4882a593Smuzhiyun struct evsel *switch_evsel;
799*4882a593Smuzhiyun
800*4882a593Smuzhiyun err = parse_events(evlist, "dummy:u", NULL);
801*4882a593Smuzhiyun if (err)
802*4882a593Smuzhiyun return err;
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun switch_evsel = evlist__last(evlist);
805*4882a593Smuzhiyun
806*4882a593Smuzhiyun switch_evsel->core.attr.freq = 0;
807*4882a593Smuzhiyun switch_evsel->core.attr.sample_period = 1;
808*4882a593Smuzhiyun switch_evsel->core.attr.context_switch = 1;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun switch_evsel->core.system_wide = true;
811*4882a593Smuzhiyun switch_evsel->no_aux_samples = true;
812*4882a593Smuzhiyun switch_evsel->immediate = true;
813*4882a593Smuzhiyun
814*4882a593Smuzhiyun evsel__set_sample_bit(switch_evsel, TID);
815*4882a593Smuzhiyun evsel__set_sample_bit(switch_evsel, TIME);
816*4882a593Smuzhiyun evsel__set_sample_bit(switch_evsel, CPU);
817*4882a593Smuzhiyun evsel__reset_sample_bit(switch_evsel, BRANCH_STACK);
818*4882a593Smuzhiyun
819*4882a593Smuzhiyun opts->record_switch_events = false;
820*4882a593Smuzhiyun ptr->have_sched_switch = 3;
821*4882a593Smuzhiyun } else {
822*4882a593Smuzhiyun opts->record_switch_events = true;
823*4882a593Smuzhiyun need_immediate = true;
824*4882a593Smuzhiyun if (cpu_wide)
825*4882a593Smuzhiyun ptr->have_sched_switch = 3;
826*4882a593Smuzhiyun else
827*4882a593Smuzhiyun ptr->have_sched_switch = 2;
828*4882a593Smuzhiyun }
829*4882a593Smuzhiyun } else {
830*4882a593Smuzhiyun err = intel_pt_track_switches(evlist);
831*4882a593Smuzhiyun if (err == -EPERM)
832*4882a593Smuzhiyun pr_debug2("Unable to select sched:sched_switch\n");
833*4882a593Smuzhiyun else if (err)
834*4882a593Smuzhiyun return err;
835*4882a593Smuzhiyun else
836*4882a593Smuzhiyun ptr->have_sched_switch = 1;
837*4882a593Smuzhiyun }
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun
840*4882a593Smuzhiyun if (have_timing_info && !intel_pt_evsel->core.attr.exclude_kernel &&
841*4882a593Smuzhiyun perf_can_record_text_poke_events() && perf_can_record_cpu_wide())
842*4882a593Smuzhiyun opts->text_poke = true;
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun if (intel_pt_evsel) {
845*4882a593Smuzhiyun /*
846*4882a593Smuzhiyun * To obtain the auxtrace buffer file descriptor, the auxtrace
847*4882a593Smuzhiyun * event must come first.
848*4882a593Smuzhiyun */
849*4882a593Smuzhiyun perf_evlist__to_front(evlist, intel_pt_evsel);
850*4882a593Smuzhiyun /*
851*4882a593Smuzhiyun * In the case of per-cpu mmaps, we need the CPU on the
852*4882a593Smuzhiyun * AUX event.
853*4882a593Smuzhiyun */
854*4882a593Smuzhiyun if (!perf_cpu_map__empty(cpus))
855*4882a593Smuzhiyun evsel__set_sample_bit(intel_pt_evsel, CPU);
856*4882a593Smuzhiyun }
857*4882a593Smuzhiyun
858*4882a593Smuzhiyun /* Add dummy event to keep tracking */
859*4882a593Smuzhiyun if (opts->full_auxtrace) {
860*4882a593Smuzhiyun struct evsel *tracking_evsel;
861*4882a593Smuzhiyun
862*4882a593Smuzhiyun err = parse_events(evlist, "dummy:u", NULL);
863*4882a593Smuzhiyun if (err)
864*4882a593Smuzhiyun return err;
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun tracking_evsel = evlist__last(evlist);
867*4882a593Smuzhiyun
868*4882a593Smuzhiyun perf_evlist__set_tracking_event(evlist, tracking_evsel);
869*4882a593Smuzhiyun
870*4882a593Smuzhiyun tracking_evsel->core.attr.freq = 0;
871*4882a593Smuzhiyun tracking_evsel->core.attr.sample_period = 1;
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun tracking_evsel->no_aux_samples = true;
874*4882a593Smuzhiyun if (need_immediate)
875*4882a593Smuzhiyun tracking_evsel->immediate = true;
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun /* In per-cpu case, always need the time of mmap events etc */
878*4882a593Smuzhiyun if (!perf_cpu_map__empty(cpus)) {
879*4882a593Smuzhiyun evsel__set_sample_bit(tracking_evsel, TIME);
880*4882a593Smuzhiyun /* And the CPU for switch events */
881*4882a593Smuzhiyun evsel__set_sample_bit(tracking_evsel, CPU);
882*4882a593Smuzhiyun }
883*4882a593Smuzhiyun evsel__reset_sample_bit(tracking_evsel, BRANCH_STACK);
884*4882a593Smuzhiyun }
885*4882a593Smuzhiyun
886*4882a593Smuzhiyun /*
887*4882a593Smuzhiyun * Warn the user when we do not have enough information to decode i.e.
888*4882a593Smuzhiyun * per-cpu with no sched_switch (except workload-only).
889*4882a593Smuzhiyun */
890*4882a593Smuzhiyun if (!ptr->have_sched_switch && !perf_cpu_map__empty(cpus) &&
891*4882a593Smuzhiyun !target__none(&opts->target) &&
892*4882a593Smuzhiyun !intel_pt_evsel->core.attr.exclude_user)
893*4882a593Smuzhiyun ui__warning("Intel Processor Trace decoding will not be possible except for kernel tracing!\n");
894*4882a593Smuzhiyun
895*4882a593Smuzhiyun return 0;
896*4882a593Smuzhiyun }
897*4882a593Smuzhiyun
intel_pt_snapshot_start(struct auxtrace_record * itr)898*4882a593Smuzhiyun static int intel_pt_snapshot_start(struct auxtrace_record *itr)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun struct intel_pt_recording *ptr =
901*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
902*4882a593Smuzhiyun struct evsel *evsel;
903*4882a593Smuzhiyun
904*4882a593Smuzhiyun evlist__for_each_entry(ptr->evlist, evsel) {
905*4882a593Smuzhiyun if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
906*4882a593Smuzhiyun return evsel__disable(evsel);
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun return -EINVAL;
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun
intel_pt_snapshot_finish(struct auxtrace_record * itr)911*4882a593Smuzhiyun static int intel_pt_snapshot_finish(struct auxtrace_record *itr)
912*4882a593Smuzhiyun {
913*4882a593Smuzhiyun struct intel_pt_recording *ptr =
914*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
915*4882a593Smuzhiyun struct evsel *evsel;
916*4882a593Smuzhiyun
917*4882a593Smuzhiyun evlist__for_each_entry(ptr->evlist, evsel) {
918*4882a593Smuzhiyun if (evsel->core.attr.type == ptr->intel_pt_pmu->type)
919*4882a593Smuzhiyun return evsel__enable(evsel);
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun return -EINVAL;
922*4882a593Smuzhiyun }
923*4882a593Smuzhiyun
intel_pt_alloc_snapshot_refs(struct intel_pt_recording * ptr,int idx)924*4882a593Smuzhiyun static int intel_pt_alloc_snapshot_refs(struct intel_pt_recording *ptr, int idx)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun const size_t sz = sizeof(struct intel_pt_snapshot_ref);
927*4882a593Smuzhiyun int cnt = ptr->snapshot_ref_cnt, new_cnt = cnt * 2;
928*4882a593Smuzhiyun struct intel_pt_snapshot_ref *refs;
929*4882a593Smuzhiyun
930*4882a593Smuzhiyun if (!new_cnt)
931*4882a593Smuzhiyun new_cnt = 16;
932*4882a593Smuzhiyun
933*4882a593Smuzhiyun while (new_cnt <= idx)
934*4882a593Smuzhiyun new_cnt *= 2;
935*4882a593Smuzhiyun
936*4882a593Smuzhiyun refs = calloc(new_cnt, sz);
937*4882a593Smuzhiyun if (!refs)
938*4882a593Smuzhiyun return -ENOMEM;
939*4882a593Smuzhiyun
940*4882a593Smuzhiyun memcpy(refs, ptr->snapshot_refs, cnt * sz);
941*4882a593Smuzhiyun
942*4882a593Smuzhiyun ptr->snapshot_refs = refs;
943*4882a593Smuzhiyun ptr->snapshot_ref_cnt = new_cnt;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun return 0;
946*4882a593Smuzhiyun }
947*4882a593Smuzhiyun
intel_pt_free_snapshot_refs(struct intel_pt_recording * ptr)948*4882a593Smuzhiyun static void intel_pt_free_snapshot_refs(struct intel_pt_recording *ptr)
949*4882a593Smuzhiyun {
950*4882a593Smuzhiyun int i;
951*4882a593Smuzhiyun
952*4882a593Smuzhiyun for (i = 0; i < ptr->snapshot_ref_cnt; i++)
953*4882a593Smuzhiyun zfree(&ptr->snapshot_refs[i].ref_buf);
954*4882a593Smuzhiyun zfree(&ptr->snapshot_refs);
955*4882a593Smuzhiyun }
956*4882a593Smuzhiyun
intel_pt_recording_free(struct auxtrace_record * itr)957*4882a593Smuzhiyun static void intel_pt_recording_free(struct auxtrace_record *itr)
958*4882a593Smuzhiyun {
959*4882a593Smuzhiyun struct intel_pt_recording *ptr =
960*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
961*4882a593Smuzhiyun
962*4882a593Smuzhiyun intel_pt_free_snapshot_refs(ptr);
963*4882a593Smuzhiyun free(ptr);
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun
intel_pt_alloc_snapshot_ref(struct intel_pt_recording * ptr,int idx,size_t snapshot_buf_size)966*4882a593Smuzhiyun static int intel_pt_alloc_snapshot_ref(struct intel_pt_recording *ptr, int idx,
967*4882a593Smuzhiyun size_t snapshot_buf_size)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun size_t ref_buf_size = ptr->snapshot_ref_buf_size;
970*4882a593Smuzhiyun void *ref_buf;
971*4882a593Smuzhiyun
972*4882a593Smuzhiyun ref_buf = zalloc(ref_buf_size);
973*4882a593Smuzhiyun if (!ref_buf)
974*4882a593Smuzhiyun return -ENOMEM;
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun ptr->snapshot_refs[idx].ref_buf = ref_buf;
977*4882a593Smuzhiyun ptr->snapshot_refs[idx].ref_offset = snapshot_buf_size - ref_buf_size;
978*4882a593Smuzhiyun
979*4882a593Smuzhiyun return 0;
980*4882a593Smuzhiyun }
981*4882a593Smuzhiyun
intel_pt_snapshot_ref_buf_size(struct intel_pt_recording * ptr,size_t snapshot_buf_size)982*4882a593Smuzhiyun static size_t intel_pt_snapshot_ref_buf_size(struct intel_pt_recording *ptr,
983*4882a593Smuzhiyun size_t snapshot_buf_size)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun const size_t max_size = 256 * 1024;
986*4882a593Smuzhiyun size_t buf_size = 0, psb_period;
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun if (ptr->snapshot_size <= 64 * 1024)
989*4882a593Smuzhiyun return 0;
990*4882a593Smuzhiyun
991*4882a593Smuzhiyun psb_period = intel_pt_psb_period(ptr->intel_pt_pmu, ptr->evlist);
992*4882a593Smuzhiyun if (psb_period)
993*4882a593Smuzhiyun buf_size = psb_period * 2;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun if (!buf_size || buf_size > max_size)
996*4882a593Smuzhiyun buf_size = max_size;
997*4882a593Smuzhiyun
998*4882a593Smuzhiyun if (buf_size >= snapshot_buf_size)
999*4882a593Smuzhiyun return 0;
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun if (buf_size >= ptr->snapshot_size / 2)
1002*4882a593Smuzhiyun return 0;
1003*4882a593Smuzhiyun
1004*4882a593Smuzhiyun return buf_size;
1005*4882a593Smuzhiyun }
1006*4882a593Smuzhiyun
intel_pt_snapshot_init(struct intel_pt_recording * ptr,size_t snapshot_buf_size)1007*4882a593Smuzhiyun static int intel_pt_snapshot_init(struct intel_pt_recording *ptr,
1008*4882a593Smuzhiyun size_t snapshot_buf_size)
1009*4882a593Smuzhiyun {
1010*4882a593Smuzhiyun if (ptr->snapshot_init_done)
1011*4882a593Smuzhiyun return 0;
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun ptr->snapshot_init_done = true;
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun ptr->snapshot_ref_buf_size = intel_pt_snapshot_ref_buf_size(ptr,
1016*4882a593Smuzhiyun snapshot_buf_size);
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun return 0;
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun
1021*4882a593Smuzhiyun /**
1022*4882a593Smuzhiyun * intel_pt_compare_buffers - compare bytes in a buffer to a circular buffer.
1023*4882a593Smuzhiyun * @buf1: first buffer
1024*4882a593Smuzhiyun * @compare_size: number of bytes to compare
1025*4882a593Smuzhiyun * @buf2: second buffer (a circular buffer)
1026*4882a593Smuzhiyun * @offs2: offset in second buffer
1027*4882a593Smuzhiyun * @buf2_size: size of second buffer
1028*4882a593Smuzhiyun *
1029*4882a593Smuzhiyun * The comparison allows for the possibility that the bytes to compare in the
1030*4882a593Smuzhiyun * circular buffer are not contiguous. It is assumed that @compare_size <=
1031*4882a593Smuzhiyun * @buf2_size. This function returns %false if the bytes are identical, %true
1032*4882a593Smuzhiyun * otherwise.
1033*4882a593Smuzhiyun */
intel_pt_compare_buffers(void * buf1,size_t compare_size,void * buf2,size_t offs2,size_t buf2_size)1034*4882a593Smuzhiyun static bool intel_pt_compare_buffers(void *buf1, size_t compare_size,
1035*4882a593Smuzhiyun void *buf2, size_t offs2, size_t buf2_size)
1036*4882a593Smuzhiyun {
1037*4882a593Smuzhiyun size_t end2 = offs2 + compare_size, part_size;
1038*4882a593Smuzhiyun
1039*4882a593Smuzhiyun if (end2 <= buf2_size)
1040*4882a593Smuzhiyun return memcmp(buf1, buf2 + offs2, compare_size);
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun part_size = end2 - buf2_size;
1043*4882a593Smuzhiyun if (memcmp(buf1, buf2 + offs2, part_size))
1044*4882a593Smuzhiyun return true;
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun compare_size -= part_size;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun return memcmp(buf1 + part_size, buf2, compare_size);
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun
intel_pt_compare_ref(void * ref_buf,size_t ref_offset,size_t ref_size,size_t buf_size,void * data,size_t head)1051*4882a593Smuzhiyun static bool intel_pt_compare_ref(void *ref_buf, size_t ref_offset,
1052*4882a593Smuzhiyun size_t ref_size, size_t buf_size,
1053*4882a593Smuzhiyun void *data, size_t head)
1054*4882a593Smuzhiyun {
1055*4882a593Smuzhiyun size_t ref_end = ref_offset + ref_size;
1056*4882a593Smuzhiyun
1057*4882a593Smuzhiyun if (ref_end > buf_size) {
1058*4882a593Smuzhiyun if (head > ref_offset || head < ref_end - buf_size)
1059*4882a593Smuzhiyun return true;
1060*4882a593Smuzhiyun } else if (head > ref_offset && head < ref_end) {
1061*4882a593Smuzhiyun return true;
1062*4882a593Smuzhiyun }
1063*4882a593Smuzhiyun
1064*4882a593Smuzhiyun return intel_pt_compare_buffers(ref_buf, ref_size, data, ref_offset,
1065*4882a593Smuzhiyun buf_size);
1066*4882a593Smuzhiyun }
1067*4882a593Smuzhiyun
intel_pt_copy_ref(void * ref_buf,size_t ref_size,size_t buf_size,void * data,size_t head)1068*4882a593Smuzhiyun static void intel_pt_copy_ref(void *ref_buf, size_t ref_size, size_t buf_size,
1069*4882a593Smuzhiyun void *data, size_t head)
1070*4882a593Smuzhiyun {
1071*4882a593Smuzhiyun if (head >= ref_size) {
1072*4882a593Smuzhiyun memcpy(ref_buf, data + head - ref_size, ref_size);
1073*4882a593Smuzhiyun } else {
1074*4882a593Smuzhiyun memcpy(ref_buf, data, head);
1075*4882a593Smuzhiyun ref_size -= head;
1076*4882a593Smuzhiyun memcpy(ref_buf + head, data + buf_size - ref_size, ref_size);
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun }
1079*4882a593Smuzhiyun
intel_pt_wrapped(struct intel_pt_recording * ptr,int idx,struct auxtrace_mmap * mm,unsigned char * data,u64 head)1080*4882a593Smuzhiyun static bool intel_pt_wrapped(struct intel_pt_recording *ptr, int idx,
1081*4882a593Smuzhiyun struct auxtrace_mmap *mm, unsigned char *data,
1082*4882a593Smuzhiyun u64 head)
1083*4882a593Smuzhiyun {
1084*4882a593Smuzhiyun struct intel_pt_snapshot_ref *ref = &ptr->snapshot_refs[idx];
1085*4882a593Smuzhiyun bool wrapped;
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun wrapped = intel_pt_compare_ref(ref->ref_buf, ref->ref_offset,
1088*4882a593Smuzhiyun ptr->snapshot_ref_buf_size, mm->len,
1089*4882a593Smuzhiyun data, head);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun intel_pt_copy_ref(ref->ref_buf, ptr->snapshot_ref_buf_size, mm->len,
1092*4882a593Smuzhiyun data, head);
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun return wrapped;
1095*4882a593Smuzhiyun }
1096*4882a593Smuzhiyun
intel_pt_first_wrap(u64 * data,size_t buf_size)1097*4882a593Smuzhiyun static bool intel_pt_first_wrap(u64 *data, size_t buf_size)
1098*4882a593Smuzhiyun {
1099*4882a593Smuzhiyun int i, a, b;
1100*4882a593Smuzhiyun
1101*4882a593Smuzhiyun b = buf_size >> 3;
1102*4882a593Smuzhiyun a = b - 512;
1103*4882a593Smuzhiyun if (a < 0)
1104*4882a593Smuzhiyun a = 0;
1105*4882a593Smuzhiyun
1106*4882a593Smuzhiyun for (i = a; i < b; i++) {
1107*4882a593Smuzhiyun if (data[i])
1108*4882a593Smuzhiyun return true;
1109*4882a593Smuzhiyun }
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun return false;
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun
intel_pt_find_snapshot(struct auxtrace_record * itr,int idx,struct auxtrace_mmap * mm,unsigned char * data,u64 * head,u64 * old)1114*4882a593Smuzhiyun static int intel_pt_find_snapshot(struct auxtrace_record *itr, int idx,
1115*4882a593Smuzhiyun struct auxtrace_mmap *mm, unsigned char *data,
1116*4882a593Smuzhiyun u64 *head, u64 *old)
1117*4882a593Smuzhiyun {
1118*4882a593Smuzhiyun struct intel_pt_recording *ptr =
1119*4882a593Smuzhiyun container_of(itr, struct intel_pt_recording, itr);
1120*4882a593Smuzhiyun bool wrapped;
1121*4882a593Smuzhiyun int err;
1122*4882a593Smuzhiyun
1123*4882a593Smuzhiyun pr_debug3("%s: mmap index %d old head %zu new head %zu\n",
1124*4882a593Smuzhiyun __func__, idx, (size_t)*old, (size_t)*head);
1125*4882a593Smuzhiyun
1126*4882a593Smuzhiyun err = intel_pt_snapshot_init(ptr, mm->len);
1127*4882a593Smuzhiyun if (err)
1128*4882a593Smuzhiyun goto out_err;
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun if (idx >= ptr->snapshot_ref_cnt) {
1131*4882a593Smuzhiyun err = intel_pt_alloc_snapshot_refs(ptr, idx);
1132*4882a593Smuzhiyun if (err)
1133*4882a593Smuzhiyun goto out_err;
1134*4882a593Smuzhiyun }
1135*4882a593Smuzhiyun
1136*4882a593Smuzhiyun if (ptr->snapshot_ref_buf_size) {
1137*4882a593Smuzhiyun if (!ptr->snapshot_refs[idx].ref_buf) {
1138*4882a593Smuzhiyun err = intel_pt_alloc_snapshot_ref(ptr, idx, mm->len);
1139*4882a593Smuzhiyun if (err)
1140*4882a593Smuzhiyun goto out_err;
1141*4882a593Smuzhiyun }
1142*4882a593Smuzhiyun wrapped = intel_pt_wrapped(ptr, idx, mm, data, *head);
1143*4882a593Smuzhiyun } else {
1144*4882a593Smuzhiyun wrapped = ptr->snapshot_refs[idx].wrapped;
1145*4882a593Smuzhiyun if (!wrapped && intel_pt_first_wrap((u64 *)data, mm->len)) {
1146*4882a593Smuzhiyun ptr->snapshot_refs[idx].wrapped = true;
1147*4882a593Smuzhiyun wrapped = true;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun }
1150*4882a593Smuzhiyun
1151*4882a593Smuzhiyun /*
1152*4882a593Smuzhiyun * In full trace mode 'head' continually increases. However in snapshot
1153*4882a593Smuzhiyun * mode 'head' is an offset within the buffer. Here 'old' and 'head'
1154*4882a593Smuzhiyun * are adjusted to match the full trace case which expects that 'old' is
1155*4882a593Smuzhiyun * always less than 'head'.
1156*4882a593Smuzhiyun */
1157*4882a593Smuzhiyun if (wrapped) {
1158*4882a593Smuzhiyun *old = *head;
1159*4882a593Smuzhiyun *head += mm->len;
1160*4882a593Smuzhiyun } else {
1161*4882a593Smuzhiyun if (mm->mask)
1162*4882a593Smuzhiyun *old &= mm->mask;
1163*4882a593Smuzhiyun else
1164*4882a593Smuzhiyun *old %= mm->len;
1165*4882a593Smuzhiyun if (*old > *head)
1166*4882a593Smuzhiyun *head += mm->len;
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun pr_debug3("%s: wrap-around %sdetected, adjusted old head %zu adjusted new head %zu\n",
1170*4882a593Smuzhiyun __func__, wrapped ? "" : "not ", (size_t)*old, (size_t)*head);
1171*4882a593Smuzhiyun
1172*4882a593Smuzhiyun return 0;
1173*4882a593Smuzhiyun
1174*4882a593Smuzhiyun out_err:
1175*4882a593Smuzhiyun pr_err("%s: failed, error %d\n", __func__, err);
1176*4882a593Smuzhiyun return err;
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun
intel_pt_reference(struct auxtrace_record * itr __maybe_unused)1179*4882a593Smuzhiyun static u64 intel_pt_reference(struct auxtrace_record *itr __maybe_unused)
1180*4882a593Smuzhiyun {
1181*4882a593Smuzhiyun return rdtsc();
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
intel_pt_recording_init(int * err)1184*4882a593Smuzhiyun struct auxtrace_record *intel_pt_recording_init(int *err)
1185*4882a593Smuzhiyun {
1186*4882a593Smuzhiyun struct perf_pmu *intel_pt_pmu = perf_pmu__find(INTEL_PT_PMU_NAME);
1187*4882a593Smuzhiyun struct intel_pt_recording *ptr;
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun if (!intel_pt_pmu)
1190*4882a593Smuzhiyun return NULL;
1191*4882a593Smuzhiyun
1192*4882a593Smuzhiyun if (setenv("JITDUMP_USE_ARCH_TIMESTAMP", "1", 1)) {
1193*4882a593Smuzhiyun *err = -errno;
1194*4882a593Smuzhiyun return NULL;
1195*4882a593Smuzhiyun }
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun ptr = zalloc(sizeof(struct intel_pt_recording));
1198*4882a593Smuzhiyun if (!ptr) {
1199*4882a593Smuzhiyun *err = -ENOMEM;
1200*4882a593Smuzhiyun return NULL;
1201*4882a593Smuzhiyun }
1202*4882a593Smuzhiyun
1203*4882a593Smuzhiyun ptr->intel_pt_pmu = intel_pt_pmu;
1204*4882a593Smuzhiyun ptr->itr.pmu = intel_pt_pmu;
1205*4882a593Smuzhiyun ptr->itr.recording_options = intel_pt_recording_options;
1206*4882a593Smuzhiyun ptr->itr.info_priv_size = intel_pt_info_priv_size;
1207*4882a593Smuzhiyun ptr->itr.info_fill = intel_pt_info_fill;
1208*4882a593Smuzhiyun ptr->itr.free = intel_pt_recording_free;
1209*4882a593Smuzhiyun ptr->itr.snapshot_start = intel_pt_snapshot_start;
1210*4882a593Smuzhiyun ptr->itr.snapshot_finish = intel_pt_snapshot_finish;
1211*4882a593Smuzhiyun ptr->itr.find_snapshot = intel_pt_find_snapshot;
1212*4882a593Smuzhiyun ptr->itr.parse_snapshot_options = intel_pt_parse_snapshot_options;
1213*4882a593Smuzhiyun ptr->itr.reference = intel_pt_reference;
1214*4882a593Smuzhiyun ptr->itr.read_finish = auxtrace_record__read_finish;
1215*4882a593Smuzhiyun /*
1216*4882a593Smuzhiyun * Decoding starts at a PSB packet. Minimum PSB period is 2K so 4K
1217*4882a593Smuzhiyun * should give at least 1 PSB per sample.
1218*4882a593Smuzhiyun */
1219*4882a593Smuzhiyun ptr->itr.default_aux_sample_size = 4096;
1220*4882a593Smuzhiyun return &ptr->itr;
1221*4882a593Smuzhiyun }
1222