1*4882a593Smuzhiyun #ifndef ARCH_PERF_REGS_H 2*4882a593Smuzhiyun #define ARCH_PERF_REGS_H 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #include <stdlib.h> 5*4882a593Smuzhiyun #include <linux/types.h> 6*4882a593Smuzhiyun #include <asm/perf_regs.h> 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun void perf_regs_load(u64 *regs); 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #define PERF_REGS_MASK ((1ULL << PERF_REG_S390_MAX) - 1) 11*4882a593Smuzhiyun #define PERF_REGS_MAX PERF_REG_S390_MAX 12*4882a593Smuzhiyun #define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #define PERF_REG_IP PERF_REG_S390_PC 15*4882a593Smuzhiyun #define PERF_REG_SP PERF_REG_S390_R15 16*4882a593Smuzhiyun __perf_reg_name(int id)17*4882a593Smuzhiyunstatic inline const char *__perf_reg_name(int id) 18*4882a593Smuzhiyun { 19*4882a593Smuzhiyun switch (id) { 20*4882a593Smuzhiyun case PERF_REG_S390_R0: 21*4882a593Smuzhiyun return "R0"; 22*4882a593Smuzhiyun case PERF_REG_S390_R1: 23*4882a593Smuzhiyun return "R1"; 24*4882a593Smuzhiyun case PERF_REG_S390_R2: 25*4882a593Smuzhiyun return "R2"; 26*4882a593Smuzhiyun case PERF_REG_S390_R3: 27*4882a593Smuzhiyun return "R3"; 28*4882a593Smuzhiyun case PERF_REG_S390_R4: 29*4882a593Smuzhiyun return "R4"; 30*4882a593Smuzhiyun case PERF_REG_S390_R5: 31*4882a593Smuzhiyun return "R5"; 32*4882a593Smuzhiyun case PERF_REG_S390_R6: 33*4882a593Smuzhiyun return "R6"; 34*4882a593Smuzhiyun case PERF_REG_S390_R7: 35*4882a593Smuzhiyun return "R7"; 36*4882a593Smuzhiyun case PERF_REG_S390_R8: 37*4882a593Smuzhiyun return "R8"; 38*4882a593Smuzhiyun case PERF_REG_S390_R9: 39*4882a593Smuzhiyun return "R9"; 40*4882a593Smuzhiyun case PERF_REG_S390_R10: 41*4882a593Smuzhiyun return "R10"; 42*4882a593Smuzhiyun case PERF_REG_S390_R11: 43*4882a593Smuzhiyun return "R11"; 44*4882a593Smuzhiyun case PERF_REG_S390_R12: 45*4882a593Smuzhiyun return "R12"; 46*4882a593Smuzhiyun case PERF_REG_S390_R13: 47*4882a593Smuzhiyun return "R13"; 48*4882a593Smuzhiyun case PERF_REG_S390_R14: 49*4882a593Smuzhiyun return "R14"; 50*4882a593Smuzhiyun case PERF_REG_S390_R15: 51*4882a593Smuzhiyun return "R15"; 52*4882a593Smuzhiyun case PERF_REG_S390_FP0: 53*4882a593Smuzhiyun return "FP0"; 54*4882a593Smuzhiyun case PERF_REG_S390_FP1: 55*4882a593Smuzhiyun return "FP1"; 56*4882a593Smuzhiyun case PERF_REG_S390_FP2: 57*4882a593Smuzhiyun return "FP2"; 58*4882a593Smuzhiyun case PERF_REG_S390_FP3: 59*4882a593Smuzhiyun return "FP3"; 60*4882a593Smuzhiyun case PERF_REG_S390_FP4: 61*4882a593Smuzhiyun return "FP4"; 62*4882a593Smuzhiyun case PERF_REG_S390_FP5: 63*4882a593Smuzhiyun return "FP5"; 64*4882a593Smuzhiyun case PERF_REG_S390_FP6: 65*4882a593Smuzhiyun return "FP6"; 66*4882a593Smuzhiyun case PERF_REG_S390_FP7: 67*4882a593Smuzhiyun return "FP7"; 68*4882a593Smuzhiyun case PERF_REG_S390_FP8: 69*4882a593Smuzhiyun return "FP8"; 70*4882a593Smuzhiyun case PERF_REG_S390_FP9: 71*4882a593Smuzhiyun return "FP9"; 72*4882a593Smuzhiyun case PERF_REG_S390_FP10: 73*4882a593Smuzhiyun return "FP10"; 74*4882a593Smuzhiyun case PERF_REG_S390_FP11: 75*4882a593Smuzhiyun return "FP11"; 76*4882a593Smuzhiyun case PERF_REG_S390_FP12: 77*4882a593Smuzhiyun return "FP12"; 78*4882a593Smuzhiyun case PERF_REG_S390_FP13: 79*4882a593Smuzhiyun return "FP13"; 80*4882a593Smuzhiyun case PERF_REG_S390_FP14: 81*4882a593Smuzhiyun return "FP14"; 82*4882a593Smuzhiyun case PERF_REG_S390_FP15: 83*4882a593Smuzhiyun return "FP15"; 84*4882a593Smuzhiyun case PERF_REG_S390_MASK: 85*4882a593Smuzhiyun return "MASK"; 86*4882a593Smuzhiyun case PERF_REG_S390_PC: 87*4882a593Smuzhiyun return "PC"; 88*4882a593Smuzhiyun default: 89*4882a593Smuzhiyun return NULL; 90*4882a593Smuzhiyun } 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun return NULL; 93*4882a593Smuzhiyun } 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun #endif /* ARCH_PERF_REGS_H */ 96