1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun /* Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd. */ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #include <elfutils/libdwfl.h> 5*4882a593Smuzhiyun #include "../../util/unwind-libdw.h" 6*4882a593Smuzhiyun #include "../../util/perf_regs.h" 7*4882a593Smuzhiyun #include "../../util/event.h" 8*4882a593Smuzhiyun libdw__arch_set_initial_registers(Dwfl_Thread * thread,void * arg)9*4882a593Smuzhiyunbool libdw__arch_set_initial_registers(Dwfl_Thread *thread, void *arg) 10*4882a593Smuzhiyun { 11*4882a593Smuzhiyun struct unwind_info *ui = arg; 12*4882a593Smuzhiyun struct regs_dump *user_regs = &ui->sample->user_regs; 13*4882a593Smuzhiyun Dwarf_Word dwarf_regs[32]; 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define REG(r) ({ \ 16*4882a593Smuzhiyun Dwarf_Word val = 0; \ 17*4882a593Smuzhiyun perf_reg_value(&val, user_regs, PERF_REG_RISCV_##r); \ 18*4882a593Smuzhiyun val; \ 19*4882a593Smuzhiyun }) 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun dwarf_regs[0] = 0; 22*4882a593Smuzhiyun dwarf_regs[1] = REG(RA); 23*4882a593Smuzhiyun dwarf_regs[2] = REG(SP); 24*4882a593Smuzhiyun dwarf_regs[3] = REG(GP); 25*4882a593Smuzhiyun dwarf_regs[4] = REG(TP); 26*4882a593Smuzhiyun dwarf_regs[5] = REG(T0); 27*4882a593Smuzhiyun dwarf_regs[6] = REG(T1); 28*4882a593Smuzhiyun dwarf_regs[7] = REG(T2); 29*4882a593Smuzhiyun dwarf_regs[8] = REG(S0); 30*4882a593Smuzhiyun dwarf_regs[9] = REG(S1); 31*4882a593Smuzhiyun dwarf_regs[10] = REG(A0); 32*4882a593Smuzhiyun dwarf_regs[11] = REG(A1); 33*4882a593Smuzhiyun dwarf_regs[12] = REG(A2); 34*4882a593Smuzhiyun dwarf_regs[13] = REG(A3); 35*4882a593Smuzhiyun dwarf_regs[14] = REG(A4); 36*4882a593Smuzhiyun dwarf_regs[15] = REG(A5); 37*4882a593Smuzhiyun dwarf_regs[16] = REG(A6); 38*4882a593Smuzhiyun dwarf_regs[17] = REG(A7); 39*4882a593Smuzhiyun dwarf_regs[18] = REG(S2); 40*4882a593Smuzhiyun dwarf_regs[19] = REG(S3); 41*4882a593Smuzhiyun dwarf_regs[20] = REG(S4); 42*4882a593Smuzhiyun dwarf_regs[21] = REG(S5); 43*4882a593Smuzhiyun dwarf_regs[22] = REG(S6); 44*4882a593Smuzhiyun dwarf_regs[23] = REG(S7); 45*4882a593Smuzhiyun dwarf_regs[24] = REG(S8); 46*4882a593Smuzhiyun dwarf_regs[25] = REG(S9); 47*4882a593Smuzhiyun dwarf_regs[26] = REG(S10); 48*4882a593Smuzhiyun dwarf_regs[27] = REG(S11); 49*4882a593Smuzhiyun dwarf_regs[28] = REG(T3); 50*4882a593Smuzhiyun dwarf_regs[29] = REG(T4); 51*4882a593Smuzhiyun dwarf_regs[30] = REG(T5); 52*4882a593Smuzhiyun dwarf_regs[31] = REG(T6); 53*4882a593Smuzhiyun dwfl_thread_state_register_pc(thread, REG(PC)); 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun return dwfl_thread_state_registers(thread, 0, PERF_REG_RISCV_MAX, 56*4882a593Smuzhiyun dwarf_regs); 57*4882a593Smuzhiyun } 58