1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd.
4*4882a593Smuzhiyun * Mapping of DWARF debug register numbers into register names.
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <stddef.h>
8*4882a593Smuzhiyun #include <errno.h> /* for EINVAL */
9*4882a593Smuzhiyun #include <string.h> /* for strcmp */
10*4882a593Smuzhiyun #include <dwarf-regs.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun struct pt_regs_dwarfnum {
13*4882a593Smuzhiyun const char *name;
14*4882a593Smuzhiyun unsigned int dwarfnum;
15*4882a593Smuzhiyun };
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define REG_DWARFNUM_NAME(r, num) {.name = r, .dwarfnum = num}
18*4882a593Smuzhiyun #define REG_DWARFNUM_END {.name = NULL, .dwarfnum = 0}
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct pt_regs_dwarfnum riscv_dwarf_regs_table[] = {
21*4882a593Smuzhiyun REG_DWARFNUM_NAME("%zero", 0),
22*4882a593Smuzhiyun REG_DWARFNUM_NAME("%ra", 1),
23*4882a593Smuzhiyun REG_DWARFNUM_NAME("%sp", 2),
24*4882a593Smuzhiyun REG_DWARFNUM_NAME("%gp", 3),
25*4882a593Smuzhiyun REG_DWARFNUM_NAME("%tp", 4),
26*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t0", 5),
27*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t1", 6),
28*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t2", 7),
29*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s0", 8),
30*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s1", 9),
31*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a0", 10),
32*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a1", 11),
33*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a2", 12),
34*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a3", 13),
35*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a4", 14),
36*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a5", 15),
37*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a6", 16),
38*4882a593Smuzhiyun REG_DWARFNUM_NAME("%a7", 17),
39*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s2", 18),
40*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s3", 19),
41*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s4", 20),
42*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s5", 21),
43*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s6", 22),
44*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s7", 23),
45*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s8", 24),
46*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s9", 25),
47*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s10", 26),
48*4882a593Smuzhiyun REG_DWARFNUM_NAME("%s11", 27),
49*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t3", 28),
50*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t4", 29),
51*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t5", 30),
52*4882a593Smuzhiyun REG_DWARFNUM_NAME("%t6", 31),
53*4882a593Smuzhiyun REG_DWARFNUM_END,
54*4882a593Smuzhiyun };
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define RISCV_MAX_REGS ((sizeof(riscv_dwarf_regs_table) / \
57*4882a593Smuzhiyun sizeof(riscv_dwarf_regs_table[0])) - 1)
58*4882a593Smuzhiyun
get_arch_regstr(unsigned int n)59*4882a593Smuzhiyun const char *get_arch_regstr(unsigned int n)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun return (n < RISCV_MAX_REGS) ? riscv_dwarf_regs_table[n].name : NULL;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun
regs_query_register_offset(const char * name)64*4882a593Smuzhiyun int regs_query_register_offset(const char *name)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun const struct pt_regs_dwarfnum *roff;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun for (roff = riscv_dwarf_regs_table; roff->name; roff++)
69*4882a593Smuzhiyun if (!strcmp(roff->name, name))
70*4882a593Smuzhiyun return roff->dwarfnum;
71*4882a593Smuzhiyun return -EINVAL;
72*4882a593Smuzhiyun }
73