1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun#include <linux/linkage.h> 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun/* Offset is based on macros from arch/powerpc/include/uapi/asm/ptrace.h. */ 5*4882a593Smuzhiyun#define R0 0 6*4882a593Smuzhiyun#define R1 1 * 8 7*4882a593Smuzhiyun#define R2 2 * 8 8*4882a593Smuzhiyun#define R3 3 * 8 9*4882a593Smuzhiyun#define R4 4 * 8 10*4882a593Smuzhiyun#define R5 5 * 8 11*4882a593Smuzhiyun#define R6 6 * 8 12*4882a593Smuzhiyun#define R7 7 * 8 13*4882a593Smuzhiyun#define R8 8 * 8 14*4882a593Smuzhiyun#define R9 9 * 8 15*4882a593Smuzhiyun#define R10 10 * 8 16*4882a593Smuzhiyun#define R11 11 * 8 17*4882a593Smuzhiyun#define R12 12 * 8 18*4882a593Smuzhiyun#define R13 13 * 8 19*4882a593Smuzhiyun#define R14 14 * 8 20*4882a593Smuzhiyun#define R15 15 * 8 21*4882a593Smuzhiyun#define R16 16 * 8 22*4882a593Smuzhiyun#define R17 17 * 8 23*4882a593Smuzhiyun#define R18 18 * 8 24*4882a593Smuzhiyun#define R19 19 * 8 25*4882a593Smuzhiyun#define R20 20 * 8 26*4882a593Smuzhiyun#define R21 21 * 8 27*4882a593Smuzhiyun#define R22 22 * 8 28*4882a593Smuzhiyun#define R23 23 * 8 29*4882a593Smuzhiyun#define R24 24 * 8 30*4882a593Smuzhiyun#define R25 25 * 8 31*4882a593Smuzhiyun#define R26 26 * 8 32*4882a593Smuzhiyun#define R27 27 * 8 33*4882a593Smuzhiyun#define R28 28 * 8 34*4882a593Smuzhiyun#define R29 29 * 8 35*4882a593Smuzhiyun#define R30 30 * 8 36*4882a593Smuzhiyun#define R31 31 * 8 37*4882a593Smuzhiyun#define NIP 32 * 8 38*4882a593Smuzhiyun#define CTR 35 * 8 39*4882a593Smuzhiyun#define LINK 36 * 8 40*4882a593Smuzhiyun#define XER 37 * 8 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun.globl perf_regs_load 43*4882a593Smuzhiyunperf_regs_load: 44*4882a593Smuzhiyun std 0, R0(3) 45*4882a593Smuzhiyun std 1, R1(3) 46*4882a593Smuzhiyun std 2, R2(3) 47*4882a593Smuzhiyun std 3, R3(3) 48*4882a593Smuzhiyun std 4, R4(3) 49*4882a593Smuzhiyun std 5, R5(3) 50*4882a593Smuzhiyun std 6, R6(3) 51*4882a593Smuzhiyun std 7, R7(3) 52*4882a593Smuzhiyun std 8, R8(3) 53*4882a593Smuzhiyun std 9, R9(3) 54*4882a593Smuzhiyun std 10, R10(3) 55*4882a593Smuzhiyun std 11, R11(3) 56*4882a593Smuzhiyun std 12, R12(3) 57*4882a593Smuzhiyun std 13, R13(3) 58*4882a593Smuzhiyun std 14, R14(3) 59*4882a593Smuzhiyun std 15, R15(3) 60*4882a593Smuzhiyun std 16, R16(3) 61*4882a593Smuzhiyun std 17, R17(3) 62*4882a593Smuzhiyun std 18, R18(3) 63*4882a593Smuzhiyun std 19, R19(3) 64*4882a593Smuzhiyun std 20, R20(3) 65*4882a593Smuzhiyun std 21, R21(3) 66*4882a593Smuzhiyun std 22, R22(3) 67*4882a593Smuzhiyun std 23, R23(3) 68*4882a593Smuzhiyun std 24, R24(3) 69*4882a593Smuzhiyun std 25, R25(3) 70*4882a593Smuzhiyun std 26, R26(3) 71*4882a593Smuzhiyun std 27, R27(3) 72*4882a593Smuzhiyun std 28, R28(3) 73*4882a593Smuzhiyun std 29, R29(3) 74*4882a593Smuzhiyun std 30, R30(3) 75*4882a593Smuzhiyun std 31, R31(3) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* store NIP */ 78*4882a593Smuzhiyun mflr 4 79*4882a593Smuzhiyun std 4, NIP(3) 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun /* Store LR */ 82*4882a593Smuzhiyun std 4, LINK(3) 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun /* Store XER */ 85*4882a593Smuzhiyun mfxer 4 86*4882a593Smuzhiyun std 4, XER(3) 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun /* Store CTR */ 89*4882a593Smuzhiyun mfctr 4 90*4882a593Smuzhiyun std 4, CTR(3) 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* Restore original value of r4 */ 93*4882a593Smuzhiyun ld 4, R4(3) 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun blr 96