xref: /OK3568_Linux_fs/kernel/tools/arch/s390/include/uapi/asm/ptrace.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *  S390 version
4*4882a593Smuzhiyun  *    Copyright IBM Corp. 1999, 2000
5*4882a593Smuzhiyun  *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _UAPI_S390_PTRACE_H
9*4882a593Smuzhiyun #define _UAPI_S390_PTRACE_H
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun /*
12*4882a593Smuzhiyun  * Offsets in the user_regs_struct. They are used for the ptrace
13*4882a593Smuzhiyun  * system call and in entry.S
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun #ifndef __s390x__
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #define PT_PSWMASK  0x00
18*4882a593Smuzhiyun #define PT_PSWADDR  0x04
19*4882a593Smuzhiyun #define PT_GPR0     0x08
20*4882a593Smuzhiyun #define PT_GPR1     0x0C
21*4882a593Smuzhiyun #define PT_GPR2     0x10
22*4882a593Smuzhiyun #define PT_GPR3     0x14
23*4882a593Smuzhiyun #define PT_GPR4     0x18
24*4882a593Smuzhiyun #define PT_GPR5     0x1C
25*4882a593Smuzhiyun #define PT_GPR6     0x20
26*4882a593Smuzhiyun #define PT_GPR7     0x24
27*4882a593Smuzhiyun #define PT_GPR8     0x28
28*4882a593Smuzhiyun #define PT_GPR9     0x2C
29*4882a593Smuzhiyun #define PT_GPR10    0x30
30*4882a593Smuzhiyun #define PT_GPR11    0x34
31*4882a593Smuzhiyun #define PT_GPR12    0x38
32*4882a593Smuzhiyun #define PT_GPR13    0x3C
33*4882a593Smuzhiyun #define PT_GPR14    0x40
34*4882a593Smuzhiyun #define PT_GPR15    0x44
35*4882a593Smuzhiyun #define PT_ACR0     0x48
36*4882a593Smuzhiyun #define PT_ACR1     0x4C
37*4882a593Smuzhiyun #define PT_ACR2     0x50
38*4882a593Smuzhiyun #define PT_ACR3     0x54
39*4882a593Smuzhiyun #define PT_ACR4	    0x58
40*4882a593Smuzhiyun #define PT_ACR5	    0x5C
41*4882a593Smuzhiyun #define PT_ACR6	    0x60
42*4882a593Smuzhiyun #define PT_ACR7	    0x64
43*4882a593Smuzhiyun #define PT_ACR8	    0x68
44*4882a593Smuzhiyun #define PT_ACR9	    0x6C
45*4882a593Smuzhiyun #define PT_ACR10    0x70
46*4882a593Smuzhiyun #define PT_ACR11    0x74
47*4882a593Smuzhiyun #define PT_ACR12    0x78
48*4882a593Smuzhiyun #define PT_ACR13    0x7C
49*4882a593Smuzhiyun #define PT_ACR14    0x80
50*4882a593Smuzhiyun #define PT_ACR15    0x84
51*4882a593Smuzhiyun #define PT_ORIGGPR2 0x88
52*4882a593Smuzhiyun #define PT_FPC	    0x90
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun  * A nasty fact of life that the ptrace api
55*4882a593Smuzhiyun  * only supports passing of longs.
56*4882a593Smuzhiyun  */
57*4882a593Smuzhiyun #define PT_FPR0_HI  0x98
58*4882a593Smuzhiyun #define PT_FPR0_LO  0x9C
59*4882a593Smuzhiyun #define PT_FPR1_HI  0xA0
60*4882a593Smuzhiyun #define PT_FPR1_LO  0xA4
61*4882a593Smuzhiyun #define PT_FPR2_HI  0xA8
62*4882a593Smuzhiyun #define PT_FPR2_LO  0xAC
63*4882a593Smuzhiyun #define PT_FPR3_HI  0xB0
64*4882a593Smuzhiyun #define PT_FPR3_LO  0xB4
65*4882a593Smuzhiyun #define PT_FPR4_HI  0xB8
66*4882a593Smuzhiyun #define PT_FPR4_LO  0xBC
67*4882a593Smuzhiyun #define PT_FPR5_HI  0xC0
68*4882a593Smuzhiyun #define PT_FPR5_LO  0xC4
69*4882a593Smuzhiyun #define PT_FPR6_HI  0xC8
70*4882a593Smuzhiyun #define PT_FPR6_LO  0xCC
71*4882a593Smuzhiyun #define PT_FPR7_HI  0xD0
72*4882a593Smuzhiyun #define PT_FPR7_LO  0xD4
73*4882a593Smuzhiyun #define PT_FPR8_HI  0xD8
74*4882a593Smuzhiyun #define PT_FPR8_LO  0XDC
75*4882a593Smuzhiyun #define PT_FPR9_HI  0xE0
76*4882a593Smuzhiyun #define PT_FPR9_LO  0xE4
77*4882a593Smuzhiyun #define PT_FPR10_HI 0xE8
78*4882a593Smuzhiyun #define PT_FPR10_LO 0xEC
79*4882a593Smuzhiyun #define PT_FPR11_HI 0xF0
80*4882a593Smuzhiyun #define PT_FPR11_LO 0xF4
81*4882a593Smuzhiyun #define PT_FPR12_HI 0xF8
82*4882a593Smuzhiyun #define PT_FPR12_LO 0xFC
83*4882a593Smuzhiyun #define PT_FPR13_HI 0x100
84*4882a593Smuzhiyun #define PT_FPR13_LO 0x104
85*4882a593Smuzhiyun #define PT_FPR14_HI 0x108
86*4882a593Smuzhiyun #define PT_FPR14_LO 0x10C
87*4882a593Smuzhiyun #define PT_FPR15_HI 0x110
88*4882a593Smuzhiyun #define PT_FPR15_LO 0x114
89*4882a593Smuzhiyun #define PT_CR_9	    0x118
90*4882a593Smuzhiyun #define PT_CR_10    0x11C
91*4882a593Smuzhiyun #define PT_CR_11    0x120
92*4882a593Smuzhiyun #define PT_IEEE_IP  0x13C
93*4882a593Smuzhiyun #define PT_LASTOFF  PT_IEEE_IP
94*4882a593Smuzhiyun #define PT_ENDREGS  0x140-1
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun #define GPR_SIZE	4
97*4882a593Smuzhiyun #define CR_SIZE		4
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define STACK_FRAME_OVERHEAD	96	/* size of minimum stack frame */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #else /* __s390x__ */
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun #define PT_PSWMASK  0x00
104*4882a593Smuzhiyun #define PT_PSWADDR  0x08
105*4882a593Smuzhiyun #define PT_GPR0     0x10
106*4882a593Smuzhiyun #define PT_GPR1     0x18
107*4882a593Smuzhiyun #define PT_GPR2     0x20
108*4882a593Smuzhiyun #define PT_GPR3     0x28
109*4882a593Smuzhiyun #define PT_GPR4     0x30
110*4882a593Smuzhiyun #define PT_GPR5     0x38
111*4882a593Smuzhiyun #define PT_GPR6     0x40
112*4882a593Smuzhiyun #define PT_GPR7     0x48
113*4882a593Smuzhiyun #define PT_GPR8     0x50
114*4882a593Smuzhiyun #define PT_GPR9     0x58
115*4882a593Smuzhiyun #define PT_GPR10    0x60
116*4882a593Smuzhiyun #define PT_GPR11    0x68
117*4882a593Smuzhiyun #define PT_GPR12    0x70
118*4882a593Smuzhiyun #define PT_GPR13    0x78
119*4882a593Smuzhiyun #define PT_GPR14    0x80
120*4882a593Smuzhiyun #define PT_GPR15    0x88
121*4882a593Smuzhiyun #define PT_ACR0     0x90
122*4882a593Smuzhiyun #define PT_ACR1     0x94
123*4882a593Smuzhiyun #define PT_ACR2     0x98
124*4882a593Smuzhiyun #define PT_ACR3     0x9C
125*4882a593Smuzhiyun #define PT_ACR4	    0xA0
126*4882a593Smuzhiyun #define PT_ACR5	    0xA4
127*4882a593Smuzhiyun #define PT_ACR6	    0xA8
128*4882a593Smuzhiyun #define PT_ACR7	    0xAC
129*4882a593Smuzhiyun #define PT_ACR8	    0xB0
130*4882a593Smuzhiyun #define PT_ACR9	    0xB4
131*4882a593Smuzhiyun #define PT_ACR10    0xB8
132*4882a593Smuzhiyun #define PT_ACR11    0xBC
133*4882a593Smuzhiyun #define PT_ACR12    0xC0
134*4882a593Smuzhiyun #define PT_ACR13    0xC4
135*4882a593Smuzhiyun #define PT_ACR14    0xC8
136*4882a593Smuzhiyun #define PT_ACR15    0xCC
137*4882a593Smuzhiyun #define PT_ORIGGPR2 0xD0
138*4882a593Smuzhiyun #define PT_FPC	    0xD8
139*4882a593Smuzhiyun #define PT_FPR0     0xE0
140*4882a593Smuzhiyun #define PT_FPR1     0xE8
141*4882a593Smuzhiyun #define PT_FPR2     0xF0
142*4882a593Smuzhiyun #define PT_FPR3     0xF8
143*4882a593Smuzhiyun #define PT_FPR4     0x100
144*4882a593Smuzhiyun #define PT_FPR5     0x108
145*4882a593Smuzhiyun #define PT_FPR6     0x110
146*4882a593Smuzhiyun #define PT_FPR7     0x118
147*4882a593Smuzhiyun #define PT_FPR8     0x120
148*4882a593Smuzhiyun #define PT_FPR9     0x128
149*4882a593Smuzhiyun #define PT_FPR10    0x130
150*4882a593Smuzhiyun #define PT_FPR11    0x138
151*4882a593Smuzhiyun #define PT_FPR12    0x140
152*4882a593Smuzhiyun #define PT_FPR13    0x148
153*4882a593Smuzhiyun #define PT_FPR14    0x150
154*4882a593Smuzhiyun #define PT_FPR15    0x158
155*4882a593Smuzhiyun #define PT_CR_9     0x160
156*4882a593Smuzhiyun #define PT_CR_10    0x168
157*4882a593Smuzhiyun #define PT_CR_11    0x170
158*4882a593Smuzhiyun #define PT_IEEE_IP  0x1A8
159*4882a593Smuzhiyun #define PT_LASTOFF  PT_IEEE_IP
160*4882a593Smuzhiyun #define PT_ENDREGS  0x1B0-1
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun #define GPR_SIZE	8
163*4882a593Smuzhiyun #define CR_SIZE		8
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun #define STACK_FRAME_OVERHEAD	160	 /* size of minimum stack frame */
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun #endif /* __s390x__ */
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun #define NUM_GPRS	16
170*4882a593Smuzhiyun #define NUM_FPRS	16
171*4882a593Smuzhiyun #define NUM_CRS		16
172*4882a593Smuzhiyun #define NUM_ACRS	16
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun #define NUM_CR_WORDS	3
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun #define FPR_SIZE	8
177*4882a593Smuzhiyun #define FPC_SIZE	4
178*4882a593Smuzhiyun #define FPC_PAD_SIZE	4 /* gcc insists on aligning the fpregs */
179*4882a593Smuzhiyun #define ACR_SIZE	4
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun #define PTRACE_OLDSETOPTIONS	     21
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun #ifndef __ASSEMBLY__
185*4882a593Smuzhiyun #include <linux/stddef.h>
186*4882a593Smuzhiyun #include <linux/types.h>
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun typedef union {
189*4882a593Smuzhiyun 	float	f;
190*4882a593Smuzhiyun 	double	d;
191*4882a593Smuzhiyun 	__u64	ui;
192*4882a593Smuzhiyun 	struct
193*4882a593Smuzhiyun 	{
194*4882a593Smuzhiyun 		__u32 hi;
195*4882a593Smuzhiyun 		__u32 lo;
196*4882a593Smuzhiyun 	} fp;
197*4882a593Smuzhiyun } freg_t;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun typedef struct {
200*4882a593Smuzhiyun 	__u32	fpc;
201*4882a593Smuzhiyun 	__u32	pad;
202*4882a593Smuzhiyun 	freg_t	fprs[NUM_FPRS];
203*4882a593Smuzhiyun } s390_fp_regs;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun #define FPC_EXCEPTION_MASK	0xF8000000
206*4882a593Smuzhiyun #define FPC_FLAGS_MASK		0x00F80000
207*4882a593Smuzhiyun #define FPC_DXC_MASK		0x0000FF00
208*4882a593Smuzhiyun #define FPC_RM_MASK		0x00000003
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun /* this typedef defines how a Program Status Word looks like */
211*4882a593Smuzhiyun typedef struct {
212*4882a593Smuzhiyun 	unsigned long mask;
213*4882a593Smuzhiyun 	unsigned long addr;
214*4882a593Smuzhiyun } __attribute__ ((aligned(8))) psw_t;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun #ifndef __s390x__
217*4882a593Smuzhiyun 
218*4882a593Smuzhiyun #define PSW_MASK_PER		0x40000000UL
219*4882a593Smuzhiyun #define PSW_MASK_DAT		0x04000000UL
220*4882a593Smuzhiyun #define PSW_MASK_IO		0x02000000UL
221*4882a593Smuzhiyun #define PSW_MASK_EXT		0x01000000UL
222*4882a593Smuzhiyun #define PSW_MASK_KEY		0x00F00000UL
223*4882a593Smuzhiyun #define PSW_MASK_BASE		0x00080000UL	/* always one */
224*4882a593Smuzhiyun #define PSW_MASK_MCHECK		0x00040000UL
225*4882a593Smuzhiyun #define PSW_MASK_WAIT		0x00020000UL
226*4882a593Smuzhiyun #define PSW_MASK_PSTATE		0x00010000UL
227*4882a593Smuzhiyun #define PSW_MASK_ASC		0x0000C000UL
228*4882a593Smuzhiyun #define PSW_MASK_CC		0x00003000UL
229*4882a593Smuzhiyun #define PSW_MASK_PM		0x00000F00UL
230*4882a593Smuzhiyun #define PSW_MASK_RI		0x00000000UL
231*4882a593Smuzhiyun #define PSW_MASK_EA		0x00000000UL
232*4882a593Smuzhiyun #define PSW_MASK_BA		0x00000000UL
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #define PSW_MASK_USER		0x0000FF00UL
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun #define PSW_ADDR_AMODE		0x80000000UL
237*4882a593Smuzhiyun #define PSW_ADDR_INSN		0x7FFFFFFFUL
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun #define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 20)
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun #define PSW_ASC_PRIMARY		0x00000000UL
242*4882a593Smuzhiyun #define PSW_ASC_ACCREG		0x00004000UL
243*4882a593Smuzhiyun #define PSW_ASC_SECONDARY	0x00008000UL
244*4882a593Smuzhiyun #define PSW_ASC_HOME		0x0000C000UL
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun #else /* __s390x__ */
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun #define PSW_MASK_PER		0x4000000000000000UL
249*4882a593Smuzhiyun #define PSW_MASK_DAT		0x0400000000000000UL
250*4882a593Smuzhiyun #define PSW_MASK_IO		0x0200000000000000UL
251*4882a593Smuzhiyun #define PSW_MASK_EXT		0x0100000000000000UL
252*4882a593Smuzhiyun #define PSW_MASK_BASE		0x0000000000000000UL
253*4882a593Smuzhiyun #define PSW_MASK_KEY		0x00F0000000000000UL
254*4882a593Smuzhiyun #define PSW_MASK_MCHECK		0x0004000000000000UL
255*4882a593Smuzhiyun #define PSW_MASK_WAIT		0x0002000000000000UL
256*4882a593Smuzhiyun #define PSW_MASK_PSTATE		0x0001000000000000UL
257*4882a593Smuzhiyun #define PSW_MASK_ASC		0x0000C00000000000UL
258*4882a593Smuzhiyun #define PSW_MASK_CC		0x0000300000000000UL
259*4882a593Smuzhiyun #define PSW_MASK_PM		0x00000F0000000000UL
260*4882a593Smuzhiyun #define PSW_MASK_RI		0x0000008000000000UL
261*4882a593Smuzhiyun #define PSW_MASK_EA		0x0000000100000000UL
262*4882a593Smuzhiyun #define PSW_MASK_BA		0x0000000080000000UL
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun #define PSW_MASK_USER		0x0000FF0180000000UL
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun #define PSW_ADDR_AMODE		0x0000000000000000UL
267*4882a593Smuzhiyun #define PSW_ADDR_INSN		0xFFFFFFFFFFFFFFFFUL
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun #define PSW_DEFAULT_KEY		(((unsigned long) PAGE_DEFAULT_ACC) << 52)
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun #define PSW_ASC_PRIMARY		0x0000000000000000UL
272*4882a593Smuzhiyun #define PSW_ASC_ACCREG		0x0000400000000000UL
273*4882a593Smuzhiyun #define PSW_ASC_SECONDARY	0x0000800000000000UL
274*4882a593Smuzhiyun #define PSW_ASC_HOME		0x0000C00000000000UL
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun #endif /* __s390x__ */
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun /*
280*4882a593Smuzhiyun  * The s390_regs structure is used to define the elf_gregset_t.
281*4882a593Smuzhiyun  */
282*4882a593Smuzhiyun typedef struct {
283*4882a593Smuzhiyun 	psw_t psw;
284*4882a593Smuzhiyun 	unsigned long gprs[NUM_GPRS];
285*4882a593Smuzhiyun 	unsigned int  acrs[NUM_ACRS];
286*4882a593Smuzhiyun 	unsigned long orig_gpr2;
287*4882a593Smuzhiyun } s390_regs;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun /*
290*4882a593Smuzhiyun  * The user_pt_regs structure exports the beginning of
291*4882a593Smuzhiyun  * the in-kernel pt_regs structure to user space.
292*4882a593Smuzhiyun  */
293*4882a593Smuzhiyun typedef struct {
294*4882a593Smuzhiyun 	unsigned long args[1];
295*4882a593Smuzhiyun 	psw_t psw;
296*4882a593Smuzhiyun 	unsigned long gprs[NUM_GPRS];
297*4882a593Smuzhiyun } user_pt_regs;
298*4882a593Smuzhiyun 
299*4882a593Smuzhiyun /*
300*4882a593Smuzhiyun  * Now for the user space program event recording (trace) definitions.
301*4882a593Smuzhiyun  * The following structures are used only for the ptrace interface, don't
302*4882a593Smuzhiyun  * touch or even look at it if you don't want to modify the user-space
303*4882a593Smuzhiyun  * ptrace interface. In particular stay away from it for in-kernel PER.
304*4882a593Smuzhiyun  */
305*4882a593Smuzhiyun typedef struct {
306*4882a593Smuzhiyun 	unsigned long cr[NUM_CR_WORDS];
307*4882a593Smuzhiyun } per_cr_words;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun #define PER_EM_MASK 0xE8000000UL
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun typedef struct {
312*4882a593Smuzhiyun #ifdef __s390x__
313*4882a593Smuzhiyun 	unsigned		       : 32;
314*4882a593Smuzhiyun #endif /* __s390x__ */
315*4882a593Smuzhiyun 	unsigned em_branching	       : 1;
316*4882a593Smuzhiyun 	unsigned em_instruction_fetch  : 1;
317*4882a593Smuzhiyun 	/*
318*4882a593Smuzhiyun 	 * Switching on storage alteration automatically fixes
319*4882a593Smuzhiyun 	 * the storage alteration event bit in the users std.
320*4882a593Smuzhiyun 	 */
321*4882a593Smuzhiyun 	unsigned em_storage_alteration : 1;
322*4882a593Smuzhiyun 	unsigned em_gpr_alt_unused     : 1;
323*4882a593Smuzhiyun 	unsigned em_store_real_address : 1;
324*4882a593Smuzhiyun 	unsigned		       : 3;
325*4882a593Smuzhiyun 	unsigned branch_addr_ctl       : 1;
326*4882a593Smuzhiyun 	unsigned		       : 1;
327*4882a593Smuzhiyun 	unsigned storage_alt_space_ctl : 1;
328*4882a593Smuzhiyun 	unsigned		       : 21;
329*4882a593Smuzhiyun 	unsigned long starting_addr;
330*4882a593Smuzhiyun 	unsigned long ending_addr;
331*4882a593Smuzhiyun } per_cr_bits;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun typedef struct {
334*4882a593Smuzhiyun 	unsigned short perc_atmid;
335*4882a593Smuzhiyun 	unsigned long address;
336*4882a593Smuzhiyun 	unsigned char access_id;
337*4882a593Smuzhiyun } per_lowcore_words;
338*4882a593Smuzhiyun 
339*4882a593Smuzhiyun typedef struct {
340*4882a593Smuzhiyun 	unsigned perc_branching		 : 1;
341*4882a593Smuzhiyun 	unsigned perc_instruction_fetch  : 1;
342*4882a593Smuzhiyun 	unsigned perc_storage_alteration : 1;
343*4882a593Smuzhiyun 	unsigned perc_gpr_alt_unused	 : 1;
344*4882a593Smuzhiyun 	unsigned perc_store_real_address : 1;
345*4882a593Smuzhiyun 	unsigned			 : 3;
346*4882a593Smuzhiyun 	unsigned atmid_psw_bit_31	 : 1;
347*4882a593Smuzhiyun 	unsigned atmid_validity_bit	 : 1;
348*4882a593Smuzhiyun 	unsigned atmid_psw_bit_32	 : 1;
349*4882a593Smuzhiyun 	unsigned atmid_psw_bit_5	 : 1;
350*4882a593Smuzhiyun 	unsigned atmid_psw_bit_16	 : 1;
351*4882a593Smuzhiyun 	unsigned atmid_psw_bit_17	 : 1;
352*4882a593Smuzhiyun 	unsigned si			 : 2;
353*4882a593Smuzhiyun 	unsigned long address;
354*4882a593Smuzhiyun 	unsigned			 : 4;
355*4882a593Smuzhiyun 	unsigned access_id		 : 4;
356*4882a593Smuzhiyun } per_lowcore_bits;
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun typedef struct {
359*4882a593Smuzhiyun 	union {
360*4882a593Smuzhiyun 		per_cr_words   words;
361*4882a593Smuzhiyun 		per_cr_bits    bits;
362*4882a593Smuzhiyun 	} control_regs;
363*4882a593Smuzhiyun 	/*
364*4882a593Smuzhiyun 	 * The single_step and instruction_fetch bits are obsolete,
365*4882a593Smuzhiyun 	 * the kernel always sets them to zero. To enable single
366*4882a593Smuzhiyun 	 * stepping use ptrace(PTRACE_SINGLESTEP) instead.
367*4882a593Smuzhiyun 	 */
368*4882a593Smuzhiyun 	unsigned  single_step	    : 1;
369*4882a593Smuzhiyun 	unsigned  instruction_fetch : 1;
370*4882a593Smuzhiyun 	unsigned		    : 30;
371*4882a593Smuzhiyun 	/*
372*4882a593Smuzhiyun 	 * These addresses are copied into cr10 & cr11 if single
373*4882a593Smuzhiyun 	 * stepping is switched off
374*4882a593Smuzhiyun 	 */
375*4882a593Smuzhiyun 	unsigned long starting_addr;
376*4882a593Smuzhiyun 	unsigned long ending_addr;
377*4882a593Smuzhiyun 	union {
378*4882a593Smuzhiyun 		per_lowcore_words words;
379*4882a593Smuzhiyun 		per_lowcore_bits  bits;
380*4882a593Smuzhiyun 	} lowcore;
381*4882a593Smuzhiyun } per_struct;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun typedef struct {
384*4882a593Smuzhiyun 	unsigned int  len;
385*4882a593Smuzhiyun 	unsigned long kernel_addr;
386*4882a593Smuzhiyun 	unsigned long process_addr;
387*4882a593Smuzhiyun } ptrace_area;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun /*
390*4882a593Smuzhiyun  * S/390 specific non posix ptrace requests. I chose unusual values so
391*4882a593Smuzhiyun  * they are unlikely to clash with future ptrace definitions.
392*4882a593Smuzhiyun  */
393*4882a593Smuzhiyun #define PTRACE_PEEKUSR_AREA	      0x5000
394*4882a593Smuzhiyun #define PTRACE_POKEUSR_AREA	      0x5001
395*4882a593Smuzhiyun #define PTRACE_PEEKTEXT_AREA	      0x5002
396*4882a593Smuzhiyun #define PTRACE_PEEKDATA_AREA	      0x5003
397*4882a593Smuzhiyun #define PTRACE_POKETEXT_AREA	      0x5004
398*4882a593Smuzhiyun #define PTRACE_POKEDATA_AREA	      0x5005
399*4882a593Smuzhiyun #define PTRACE_GET_LAST_BREAK	      0x5006
400*4882a593Smuzhiyun #define PTRACE_PEEK_SYSTEM_CALL       0x5007
401*4882a593Smuzhiyun #define PTRACE_POKE_SYSTEM_CALL	      0x5008
402*4882a593Smuzhiyun #define PTRACE_ENABLE_TE	      0x5009
403*4882a593Smuzhiyun #define PTRACE_DISABLE_TE	      0x5010
404*4882a593Smuzhiyun #define PTRACE_TE_ABORT_RAND	      0x5011
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun /*
407*4882a593Smuzhiyun  * The numbers chosen here are somewhat arbitrary but absolutely MUST
408*4882a593Smuzhiyun  * not overlap with any of the number assigned in <linux/ptrace.h>.
409*4882a593Smuzhiyun  */
410*4882a593Smuzhiyun #define PTRACE_SINGLEBLOCK	12	/* resume execution until next branch */
411*4882a593Smuzhiyun 
412*4882a593Smuzhiyun /*
413*4882a593Smuzhiyun  * PT_PROT definition is loosely based on hppa bsd definition in
414*4882a593Smuzhiyun  * gdb/hppab-nat.c
415*4882a593Smuzhiyun  */
416*4882a593Smuzhiyun #define PTRACE_PROT			  21
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun typedef enum {
419*4882a593Smuzhiyun 	ptprot_set_access_watchpoint,
420*4882a593Smuzhiyun 	ptprot_set_write_watchpoint,
421*4882a593Smuzhiyun 	ptprot_disable_watchpoint
422*4882a593Smuzhiyun } ptprot_flags;
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun typedef struct {
425*4882a593Smuzhiyun 	unsigned long lowaddr;
426*4882a593Smuzhiyun 	unsigned long hiaddr;
427*4882a593Smuzhiyun 	ptprot_flags prot;
428*4882a593Smuzhiyun } ptprot_area;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun /* Sequence of bytes for breakpoint illegal instruction.  */
431*4882a593Smuzhiyun #define S390_BREAKPOINT     {0x0,0x1}
432*4882a593Smuzhiyun #define S390_BREAKPOINT_U16 ((__u16)0x0001)
433*4882a593Smuzhiyun #define S390_SYSCALL_OPCODE ((__u16)0x0a00)
434*4882a593Smuzhiyun #define S390_SYSCALL_SIZE   2
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun /*
437*4882a593Smuzhiyun  * The user_regs_struct defines the way the user registers are
438*4882a593Smuzhiyun  * store on the stack for signal handling.
439*4882a593Smuzhiyun  */
440*4882a593Smuzhiyun struct user_regs_struct {
441*4882a593Smuzhiyun 	psw_t psw;
442*4882a593Smuzhiyun 	unsigned long gprs[NUM_GPRS];
443*4882a593Smuzhiyun 	unsigned int  acrs[NUM_ACRS];
444*4882a593Smuzhiyun 	unsigned long orig_gpr2;
445*4882a593Smuzhiyun 	s390_fp_regs fp_regs;
446*4882a593Smuzhiyun 	/*
447*4882a593Smuzhiyun 	 * These per registers are in here so that gdb can modify them
448*4882a593Smuzhiyun 	 * itself as there is no "official" ptrace interface for hardware
449*4882a593Smuzhiyun 	 * watchpoints. This is the way intel does it.
450*4882a593Smuzhiyun 	 */
451*4882a593Smuzhiyun 	per_struct per_info;
452*4882a593Smuzhiyun 	unsigned long ieee_instruction_pointer;	/* obsolete, always 0 */
453*4882a593Smuzhiyun };
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun #endif /* __ASSEMBLY__ */
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun #endif /* _UAPI_S390_PTRACE_H */
458