1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2006 - 2007 Atmel Corporation 6*4882a593Smuzhiyun */ 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #ifndef _SND_AT73C213_H 9*4882a593Smuzhiyun #define _SND_AT73C213_H 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun /* DAC control register */ 12*4882a593Smuzhiyun #define DAC_CTRL 0x00 13*4882a593Smuzhiyun #define DAC_CTRL_ONPADRV 7 14*4882a593Smuzhiyun #define DAC_CTRL_ONAUXIN 6 15*4882a593Smuzhiyun #define DAC_CTRL_ONDACR 5 16*4882a593Smuzhiyun #define DAC_CTRL_ONDACL 4 17*4882a593Smuzhiyun #define DAC_CTRL_ONLNOR 3 18*4882a593Smuzhiyun #define DAC_CTRL_ONLNOL 2 19*4882a593Smuzhiyun #define DAC_CTRL_ONLNIR 1 20*4882a593Smuzhiyun #define DAC_CTRL_ONLNIL 0 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun /* DAC left line in gain register */ 23*4882a593Smuzhiyun #define DAC_LLIG 0x01 24*4882a593Smuzhiyun #define DAC_LLIG_LLIG 0 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* DAC right line in gain register */ 27*4882a593Smuzhiyun #define DAC_RLIG 0x02 28*4882a593Smuzhiyun #define DAC_RLIG_RLIG 0 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun /* DAC Left Master Playback Gain Register */ 31*4882a593Smuzhiyun #define DAC_LMPG 0x03 32*4882a593Smuzhiyun #define DAC_LMPG_LMPG 0 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* DAC Right Master Playback Gain Register */ 35*4882a593Smuzhiyun #define DAC_RMPG 0x04 36*4882a593Smuzhiyun #define DAC_RMPG_RMPG 0 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* DAC Left Line Out Gain Register */ 39*4882a593Smuzhiyun #define DAC_LLOG 0x05 40*4882a593Smuzhiyun #define DAC_LLOG_LLOG 0 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* DAC Right Line Out Gain Register */ 43*4882a593Smuzhiyun #define DAC_RLOG 0x06 44*4882a593Smuzhiyun #define DAC_RLOG_RLOG 0 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun /* DAC Output Level Control Register */ 47*4882a593Smuzhiyun #define DAC_OLC 0x07 48*4882a593Smuzhiyun #define DAC_OLC_RSHORT 7 49*4882a593Smuzhiyun #define DAC_OLC_ROLC 4 50*4882a593Smuzhiyun #define DAC_OLC_LSHORT 3 51*4882a593Smuzhiyun #define DAC_OLC_LOLC 0 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun /* DAC Mixer Control Register */ 54*4882a593Smuzhiyun #define DAC_MC 0x08 55*4882a593Smuzhiyun #define DAC_MC_INVR 5 56*4882a593Smuzhiyun #define DAC_MC_INVL 4 57*4882a593Smuzhiyun #define DAC_MC_RMSMIN2 3 58*4882a593Smuzhiyun #define DAC_MC_RMSMIN1 2 59*4882a593Smuzhiyun #define DAC_MC_LMSMIN2 1 60*4882a593Smuzhiyun #define DAC_MC_LMSMIN1 0 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* DAC Clock and Sampling Frequency Control Register */ 63*4882a593Smuzhiyun #define DAC_CSFC 0x09 64*4882a593Smuzhiyun #define DAC_CSFC_OVRSEL 4 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun /* DAC Miscellaneous Register */ 67*4882a593Smuzhiyun #define DAC_MISC 0x0A 68*4882a593Smuzhiyun #define DAC_MISC_VCMCAPSEL 7 69*4882a593Smuzhiyun #define DAC_MISC_DINTSEL 4 70*4882a593Smuzhiyun #define DAC_MISC_DITHEN 3 71*4882a593Smuzhiyun #define DAC_MISC_DEEMPEN 2 72*4882a593Smuzhiyun #define DAC_MISC_NBITS 0 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun /* DAC Precharge Control Register */ 75*4882a593Smuzhiyun #define DAC_PRECH 0x0C 76*4882a593Smuzhiyun #define DAC_PRECH_PRCHGPDRV 7 77*4882a593Smuzhiyun #define DAC_PRECH_PRCHGAUX1 6 78*4882a593Smuzhiyun #define DAC_PRECH_PRCHGLNOR 5 79*4882a593Smuzhiyun #define DAC_PRECH_PRCHGLNOL 4 80*4882a593Smuzhiyun #define DAC_PRECH_PRCHGLNIR 3 81*4882a593Smuzhiyun #define DAC_PRECH_PRCHGLNIL 2 82*4882a593Smuzhiyun #define DAC_PRECH_PRCHG 1 83*4882a593Smuzhiyun #define DAC_PRECH_ONMSTR 0 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun /* DAC Auxiliary Input Gain Control Register */ 86*4882a593Smuzhiyun #define DAC_AUXG 0x0D 87*4882a593Smuzhiyun #define DAC_AUXG_AUXG 0 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun /* DAC Reset Register */ 90*4882a593Smuzhiyun #define DAC_RST 0x10 91*4882a593Smuzhiyun #define DAC_RST_RESMASK 2 92*4882a593Smuzhiyun #define DAC_RST_RESFILZ 1 93*4882a593Smuzhiyun #define DAC_RST_RSTZ 0 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun /* Power Amplifier Control Register */ 96*4882a593Smuzhiyun #define PA_CTRL 0x11 97*4882a593Smuzhiyun #define PA_CTRL_APAON 6 98*4882a593Smuzhiyun #define PA_CTRL_APAPRECH 5 99*4882a593Smuzhiyun #define PA_CTRL_APALP 4 100*4882a593Smuzhiyun #define PA_CTRL_APAGAIN 0 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #endif /* _SND_AT73C213_H */ 103