xref: /OK3568_Linux_fs/kernel/sound/spi/at73c213.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (C) 2006-2007 Atmel Norway
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun /*#define DEBUG*/
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/clk.h>
11*4882a593Smuzhiyun #include <linux/err.h>
12*4882a593Smuzhiyun #include <linux/delay.h>
13*4882a593Smuzhiyun #include <linux/device.h>
14*4882a593Smuzhiyun #include <linux/dma-mapping.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/module.h>
18*4882a593Smuzhiyun #include <linux/mutex.h>
19*4882a593Smuzhiyun #include <linux/platform_device.h>
20*4882a593Smuzhiyun #include <linux/io.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include <sound/initval.h>
23*4882a593Smuzhiyun #include <sound/control.h>
24*4882a593Smuzhiyun #include <sound/core.h>
25*4882a593Smuzhiyun #include <sound/pcm.h>
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun #include <linux/atmel-ssc.h>
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include <linux/spi/spi.h>
30*4882a593Smuzhiyun #include <linux/spi/at73c213.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "at73c213.h"
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define BITRATE_MIN	 8000 /* Hardware limit? */
35*4882a593Smuzhiyun #define BITRATE_TARGET	CONFIG_SND_AT73C213_TARGET_BITRATE
36*4882a593Smuzhiyun #define BITRATE_MAX	50000 /* Hardware limit. */
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun /* Initial (hardware reset) AT73C213 register values. */
39*4882a593Smuzhiyun static const u8 snd_at73c213_original_image[18] =
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun 	0x00,	/* 00 - CTRL    */
42*4882a593Smuzhiyun 	0x05,	/* 01 - LLIG    */
43*4882a593Smuzhiyun 	0x05,	/* 02 - RLIG    */
44*4882a593Smuzhiyun 	0x08,	/* 03 - LPMG    */
45*4882a593Smuzhiyun 	0x08,	/* 04 - RPMG    */
46*4882a593Smuzhiyun 	0x00,	/* 05 - LLOG    */
47*4882a593Smuzhiyun 	0x00,	/* 06 - RLOG    */
48*4882a593Smuzhiyun 	0x22,	/* 07 - OLC     */
49*4882a593Smuzhiyun 	0x09,	/* 08 - MC      */
50*4882a593Smuzhiyun 	0x00,	/* 09 - CSFC    */
51*4882a593Smuzhiyun 	0x00,	/* 0A - MISC    */
52*4882a593Smuzhiyun 	0x00,	/* 0B -         */
53*4882a593Smuzhiyun 	0x00,	/* 0C - PRECH   */
54*4882a593Smuzhiyun 	0x05,	/* 0D - AUXG    */
55*4882a593Smuzhiyun 	0x00,	/* 0E -         */
56*4882a593Smuzhiyun 	0x00,	/* 0F -         */
57*4882a593Smuzhiyun 	0x00,	/* 10 - RST     */
58*4882a593Smuzhiyun 	0x00,	/* 11 - PA_CTRL */
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun struct snd_at73c213 {
62*4882a593Smuzhiyun 	struct snd_card			*card;
63*4882a593Smuzhiyun 	struct snd_pcm			*pcm;
64*4882a593Smuzhiyun 	struct snd_pcm_substream	*substream;
65*4882a593Smuzhiyun 	struct at73c213_board_info	*board;
66*4882a593Smuzhiyun 	int				irq;
67*4882a593Smuzhiyun 	int				period;
68*4882a593Smuzhiyun 	unsigned long			bitrate;
69*4882a593Smuzhiyun 	struct ssc_device		*ssc;
70*4882a593Smuzhiyun 	struct spi_device		*spi;
71*4882a593Smuzhiyun 	u8				spi_wbuffer[2];
72*4882a593Smuzhiyun 	u8				spi_rbuffer[2];
73*4882a593Smuzhiyun 	/* Image of the SPI registers in AT73C213. */
74*4882a593Smuzhiyun 	u8				reg_image[18];
75*4882a593Smuzhiyun 	/* Protect SSC registers against concurrent access. */
76*4882a593Smuzhiyun 	spinlock_t			lock;
77*4882a593Smuzhiyun 	/* Protect mixer registers against concurrent access. */
78*4882a593Smuzhiyun 	struct mutex			mixer_lock;
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun #define get_chip(card) ((struct snd_at73c213 *)card->private_data)
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun static int
snd_at73c213_write_reg(struct snd_at73c213 * chip,u8 reg,u8 val)84*4882a593Smuzhiyun snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	struct spi_message msg;
87*4882a593Smuzhiyun 	struct spi_transfer msg_xfer = {
88*4882a593Smuzhiyun 		.len		= 2,
89*4882a593Smuzhiyun 		.cs_change	= 0,
90*4882a593Smuzhiyun 	};
91*4882a593Smuzhiyun 	int retval;
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	spi_message_init(&msg);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	chip->spi_wbuffer[0] = reg;
96*4882a593Smuzhiyun 	chip->spi_wbuffer[1] = val;
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	msg_xfer.tx_buf = chip->spi_wbuffer;
99*4882a593Smuzhiyun 	msg_xfer.rx_buf = chip->spi_rbuffer;
100*4882a593Smuzhiyun 	spi_message_add_tail(&msg_xfer, &msg);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	retval = spi_sync(chip->spi, &msg);
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun 	if (!retval)
105*4882a593Smuzhiyun 		chip->reg_image[reg] = val;
106*4882a593Smuzhiyun 
107*4882a593Smuzhiyun 	return retval;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun static struct snd_pcm_hardware snd_at73c213_playback_hw = {
111*4882a593Smuzhiyun 	.info		= SNDRV_PCM_INFO_INTERLEAVED |
112*4882a593Smuzhiyun 			  SNDRV_PCM_INFO_BLOCK_TRANSFER,
113*4882a593Smuzhiyun 	.formats	= SNDRV_PCM_FMTBIT_S16_BE,
114*4882a593Smuzhiyun 	.rates		= SNDRV_PCM_RATE_CONTINUOUS,
115*4882a593Smuzhiyun 	.rate_min	= 8000,  /* Replaced by chip->bitrate later. */
116*4882a593Smuzhiyun 	.rate_max	= 50000, /* Replaced by chip->bitrate later. */
117*4882a593Smuzhiyun 	.channels_min	= 1,
118*4882a593Smuzhiyun 	.channels_max	= 2,
119*4882a593Smuzhiyun 	.buffer_bytes_max = 64 * 1024 - 1,
120*4882a593Smuzhiyun 	.period_bytes_min = 512,
121*4882a593Smuzhiyun 	.period_bytes_max = 64 * 1024 - 1,
122*4882a593Smuzhiyun 	.periods_min	= 4,
123*4882a593Smuzhiyun 	.periods_max	= 1024,
124*4882a593Smuzhiyun };
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun /*
127*4882a593Smuzhiyun  * Calculate and set bitrate and divisions.
128*4882a593Smuzhiyun  */
snd_at73c213_set_bitrate(struct snd_at73c213 * chip)129*4882a593Smuzhiyun static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip)
130*4882a593Smuzhiyun {
131*4882a593Smuzhiyun 	unsigned long ssc_rate = clk_get_rate(chip->ssc->clk);
132*4882a593Smuzhiyun 	unsigned long dac_rate_new, ssc_div;
133*4882a593Smuzhiyun 	int status;
134*4882a593Smuzhiyun 	unsigned long ssc_div_max, ssc_div_min;
135*4882a593Smuzhiyun 	int max_tries;
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	/*
138*4882a593Smuzhiyun 	 * We connect two clocks here, picking divisors so the I2S clocks
139*4882a593Smuzhiyun 	 * out data at the same rate the DAC clocks it in ... and as close
140*4882a593Smuzhiyun 	 * as practical to the desired target rate.
141*4882a593Smuzhiyun 	 *
142*4882a593Smuzhiyun 	 * The DAC master clock (MCLK) is programmable, and is either 256
143*4882a593Smuzhiyun 	 * or (not here) 384 times the I2S output clock (BCLK).
144*4882a593Smuzhiyun 	 */
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	/* SSC clock / (bitrate * stereo * 16-bit). */
147*4882a593Smuzhiyun 	ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16);
148*4882a593Smuzhiyun 	ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16);
149*4882a593Smuzhiyun 	ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16);
150*4882a593Smuzhiyun 	max_tries = (ssc_div_max - ssc_div_min) / 2;
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 	if (max_tries < 1)
153*4882a593Smuzhiyun 		max_tries = 1;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	/* ssc_div must be even. */
156*4882a593Smuzhiyun 	ssc_div = (ssc_div + 1) & ~1UL;
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun 	if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) {
159*4882a593Smuzhiyun 		ssc_div -= 2;
160*4882a593Smuzhiyun 		if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX)
161*4882a593Smuzhiyun 			return -ENXIO;
162*4882a593Smuzhiyun 	}
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	/* Search for a possible bitrate. */
165*4882a593Smuzhiyun 	do {
166*4882a593Smuzhiyun 		/* SSC clock / (ssc divider * 16-bit * stereo). */
167*4882a593Smuzhiyun 		if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN)
168*4882a593Smuzhiyun 			return -ENXIO;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 		/* 256 / (2 * 16) = 8 */
171*4882a593Smuzhiyun 		dac_rate_new = 8 * (ssc_rate / ssc_div);
172*4882a593Smuzhiyun 
173*4882a593Smuzhiyun 		status = clk_round_rate(chip->board->dac_clk, dac_rate_new);
174*4882a593Smuzhiyun 		if (status <= 0)
175*4882a593Smuzhiyun 			return status;
176*4882a593Smuzhiyun 
177*4882a593Smuzhiyun 		/* Ignore difference smaller than 256 Hz. */
178*4882a593Smuzhiyun 		if ((status/256) == (dac_rate_new/256))
179*4882a593Smuzhiyun 			goto set_rate;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 		ssc_div += 2;
182*4882a593Smuzhiyun 	} while (--max_tries);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	/* Not able to find a valid bitrate. */
185*4882a593Smuzhiyun 	return -ENXIO;
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun set_rate:
188*4882a593Smuzhiyun 	status = clk_set_rate(chip->board->dac_clk, status);
189*4882a593Smuzhiyun 	if (status < 0)
190*4882a593Smuzhiyun 		return status;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	/* Set divider in SSC device. */
193*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, CMR, ssc_div/2);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	/* SSC clock / (ssc divider * 16-bit * stereo). */
196*4882a593Smuzhiyun 	chip->bitrate = ssc_rate / (ssc_div * 16 * 2);
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	dev_info(&chip->spi->dev,
199*4882a593Smuzhiyun 			"at73c213: supported bitrate is %lu (%lu divider)\n",
200*4882a593Smuzhiyun 			chip->bitrate, ssc_div);
201*4882a593Smuzhiyun 
202*4882a593Smuzhiyun 	return 0;
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
snd_at73c213_pcm_open(struct snd_pcm_substream * substream)205*4882a593Smuzhiyun static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
208*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
209*4882a593Smuzhiyun 	int err;
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	/* ensure buffer_size is a multiple of period_size */
212*4882a593Smuzhiyun 	err = snd_pcm_hw_constraint_integer(runtime,
213*4882a593Smuzhiyun 					SNDRV_PCM_HW_PARAM_PERIODS);
214*4882a593Smuzhiyun 	if (err < 0)
215*4882a593Smuzhiyun 		return err;
216*4882a593Smuzhiyun 	snd_at73c213_playback_hw.rate_min = chip->bitrate;
217*4882a593Smuzhiyun 	snd_at73c213_playback_hw.rate_max = chip->bitrate;
218*4882a593Smuzhiyun 	runtime->hw = snd_at73c213_playback_hw;
219*4882a593Smuzhiyun 	chip->substream = substream;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	err = clk_enable(chip->ssc->clk);
222*4882a593Smuzhiyun 	if (err)
223*4882a593Smuzhiyun 		return err;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	return 0;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun 
snd_at73c213_pcm_close(struct snd_pcm_substream * substream)228*4882a593Smuzhiyun static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
231*4882a593Smuzhiyun 	chip->substream = NULL;
232*4882a593Smuzhiyun 	clk_disable(chip->ssc->clk);
233*4882a593Smuzhiyun 	return 0;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun 
snd_at73c213_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)236*4882a593Smuzhiyun static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream,
237*4882a593Smuzhiyun 				 struct snd_pcm_hw_params *hw_params)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
240*4882a593Smuzhiyun 	int channels = params_channels(hw_params);
241*4882a593Smuzhiyun 	int val;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	val = ssc_readl(chip->ssc->regs, TFMR);
244*4882a593Smuzhiyun 	val = SSC_BFINS(TFMR_DATNB, channels - 1, val);
245*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, TFMR, val);
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	return 0;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
snd_at73c213_pcm_prepare(struct snd_pcm_substream * substream)250*4882a593Smuzhiyun static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream)
251*4882a593Smuzhiyun {
252*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
253*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
254*4882a593Smuzhiyun 	int block_size;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	block_size = frames_to_bytes(runtime, runtime->period_size);
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	chip->period = 0;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, PDC_TPR,
261*4882a593Smuzhiyun 			(long)runtime->dma_addr);
262*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, PDC_TCR,
263*4882a593Smuzhiyun 			runtime->period_size * runtime->channels);
264*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, PDC_TNPR,
265*4882a593Smuzhiyun 			(long)runtime->dma_addr + block_size);
266*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, PDC_TNCR,
267*4882a593Smuzhiyun 			runtime->period_size * runtime->channels);
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun 
snd_at73c213_pcm_trigger(struct snd_pcm_substream * substream,int cmd)272*4882a593Smuzhiyun static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream,
273*4882a593Smuzhiyun 				   int cmd)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
276*4882a593Smuzhiyun 	int retval = 0;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	spin_lock(&chip->lock);
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	switch (cmd) {
281*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
282*4882a593Smuzhiyun 		ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX));
283*4882a593Smuzhiyun 		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN));
284*4882a593Smuzhiyun 		break;
285*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
286*4882a593Smuzhiyun 		ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS));
287*4882a593Smuzhiyun 		ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX));
288*4882a593Smuzhiyun 		break;
289*4882a593Smuzhiyun 	default:
290*4882a593Smuzhiyun 		dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd);
291*4882a593Smuzhiyun 		retval = -EINVAL;
292*4882a593Smuzhiyun 		break;
293*4882a593Smuzhiyun 	}
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	spin_unlock(&chip->lock);
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	return retval;
298*4882a593Smuzhiyun }
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun static snd_pcm_uframes_t
snd_at73c213_pcm_pointer(struct snd_pcm_substream * substream)301*4882a593Smuzhiyun snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_pcm_substream_chip(substream);
304*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
305*4882a593Smuzhiyun 	snd_pcm_uframes_t pos;
306*4882a593Smuzhiyun 	unsigned long bytes;
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	bytes = ssc_readl(chip->ssc->regs, PDC_TPR)
309*4882a593Smuzhiyun 		- (unsigned long)runtime->dma_addr;
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	pos = bytes_to_frames(runtime, bytes);
312*4882a593Smuzhiyun 	if (pos >= runtime->buffer_size)
313*4882a593Smuzhiyun 		pos -= runtime->buffer_size;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	return pos;
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun static const struct snd_pcm_ops at73c213_playback_ops = {
319*4882a593Smuzhiyun 	.open		= snd_at73c213_pcm_open,
320*4882a593Smuzhiyun 	.close		= snd_at73c213_pcm_close,
321*4882a593Smuzhiyun 	.hw_params	= snd_at73c213_pcm_hw_params,
322*4882a593Smuzhiyun 	.prepare	= snd_at73c213_pcm_prepare,
323*4882a593Smuzhiyun 	.trigger	= snd_at73c213_pcm_trigger,
324*4882a593Smuzhiyun 	.pointer	= snd_at73c213_pcm_pointer,
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun 
snd_at73c213_pcm_new(struct snd_at73c213 * chip,int device)327*4882a593Smuzhiyun static int snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun 	struct snd_pcm *pcm;
330*4882a593Smuzhiyun 	int retval;
331*4882a593Smuzhiyun 
332*4882a593Smuzhiyun 	retval = snd_pcm_new(chip->card, chip->card->shortname,
333*4882a593Smuzhiyun 			device, 1, 0, &pcm);
334*4882a593Smuzhiyun 	if (retval < 0)
335*4882a593Smuzhiyun 		goto out;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	pcm->private_data = chip;
338*4882a593Smuzhiyun 	pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER;
339*4882a593Smuzhiyun 	strcpy(pcm->name, "at73c213");
340*4882a593Smuzhiyun 	chip->pcm = pcm;
341*4882a593Smuzhiyun 
342*4882a593Smuzhiyun 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops);
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(chip->pcm,
345*4882a593Smuzhiyun 			SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev,
346*4882a593Smuzhiyun 			64 * 1024, 64 * 1024);
347*4882a593Smuzhiyun out:
348*4882a593Smuzhiyun 	return retval;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun 
snd_at73c213_interrupt(int irq,void * dev_id)351*4882a593Smuzhiyun static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun 	struct snd_at73c213 *chip = dev_id;
354*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = chip->substream->runtime;
355*4882a593Smuzhiyun 	u32 status;
356*4882a593Smuzhiyun 	int offset;
357*4882a593Smuzhiyun 	int block_size;
358*4882a593Smuzhiyun 	int next_period;
359*4882a593Smuzhiyun 	int retval = IRQ_NONE;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	spin_lock(&chip->lock);
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun 	block_size = frames_to_bytes(runtime, runtime->period_size);
364*4882a593Smuzhiyun 	status = ssc_readl(chip->ssc->regs, IMR);
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	if (status & SSC_BIT(IMR_ENDTX)) {
367*4882a593Smuzhiyun 		chip->period++;
368*4882a593Smuzhiyun 		if (chip->period == runtime->periods)
369*4882a593Smuzhiyun 			chip->period = 0;
370*4882a593Smuzhiyun 		next_period = chip->period + 1;
371*4882a593Smuzhiyun 		if (next_period == runtime->periods)
372*4882a593Smuzhiyun 			next_period = 0;
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 		offset = block_size * next_period;
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 		ssc_writel(chip->ssc->regs, PDC_TNPR,
377*4882a593Smuzhiyun 				(long)runtime->dma_addr + offset);
378*4882a593Smuzhiyun 		ssc_writel(chip->ssc->regs, PDC_TNCR,
379*4882a593Smuzhiyun 				runtime->period_size * runtime->channels);
380*4882a593Smuzhiyun 		retval = IRQ_HANDLED;
381*4882a593Smuzhiyun 	}
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	ssc_readl(chip->ssc->regs, IMR);
384*4882a593Smuzhiyun 	spin_unlock(&chip->lock);
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun 	if (status & SSC_BIT(IMR_ENDTX))
387*4882a593Smuzhiyun 		snd_pcm_period_elapsed(chip->substream);
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 	return retval;
390*4882a593Smuzhiyun }
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun /*
393*4882a593Smuzhiyun  * Mixer functions.
394*4882a593Smuzhiyun  */
snd_at73c213_mono_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)395*4882a593Smuzhiyun static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol,
396*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
397*4882a593Smuzhiyun {
398*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
399*4882a593Smuzhiyun 	int reg = kcontrol->private_value & 0xff;
400*4882a593Smuzhiyun 	int shift = (kcontrol->private_value >> 8) & 0xff;
401*4882a593Smuzhiyun 	int mask = (kcontrol->private_value >> 16) & 0xff;
402*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 24) & 0xff;
403*4882a593Smuzhiyun 
404*4882a593Smuzhiyun 	mutex_lock(&chip->mixer_lock);
405*4882a593Smuzhiyun 
406*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] =
407*4882a593Smuzhiyun 		(chip->reg_image[reg] >> shift) & mask;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	if (invert)
410*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] =
411*4882a593Smuzhiyun 			mask - ucontrol->value.integer.value[0];
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	mutex_unlock(&chip->mixer_lock);
414*4882a593Smuzhiyun 
415*4882a593Smuzhiyun 	return 0;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun 
snd_at73c213_mono_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)418*4882a593Smuzhiyun static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol,
419*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
420*4882a593Smuzhiyun {
421*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
422*4882a593Smuzhiyun 	int reg = kcontrol->private_value & 0xff;
423*4882a593Smuzhiyun 	int shift = (kcontrol->private_value >> 8) & 0xff;
424*4882a593Smuzhiyun 	int mask = (kcontrol->private_value >> 16) & 0xff;
425*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 24) & 0xff;
426*4882a593Smuzhiyun 	int change, retval;
427*4882a593Smuzhiyun 	unsigned short val;
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 	val = (ucontrol->value.integer.value[0] & mask);
430*4882a593Smuzhiyun 	if (invert)
431*4882a593Smuzhiyun 		val = mask - val;
432*4882a593Smuzhiyun 	val <<= shift;
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 	mutex_lock(&chip->mixer_lock);
435*4882a593Smuzhiyun 
436*4882a593Smuzhiyun 	val = (chip->reg_image[reg] & ~(mask << shift)) | val;
437*4882a593Smuzhiyun 	change = val != chip->reg_image[reg];
438*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, reg, val);
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	mutex_unlock(&chip->mixer_lock);
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	if (retval)
443*4882a593Smuzhiyun 		return retval;
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	return change;
446*4882a593Smuzhiyun }
447*4882a593Smuzhiyun 
snd_at73c213_stereo_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)448*4882a593Smuzhiyun static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol,
449*4882a593Smuzhiyun 				  struct snd_ctl_elem_info *uinfo)
450*4882a593Smuzhiyun {
451*4882a593Smuzhiyun 	int mask = (kcontrol->private_value >> 24) & 0xff;
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	if (mask == 1)
454*4882a593Smuzhiyun 		uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
455*4882a593Smuzhiyun 	else
456*4882a593Smuzhiyun 		uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
457*4882a593Smuzhiyun 
458*4882a593Smuzhiyun 	uinfo->count = 2;
459*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
460*4882a593Smuzhiyun 	uinfo->value.integer.max = mask;
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	return 0;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun 
snd_at73c213_stereo_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)465*4882a593Smuzhiyun static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol,
466*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
467*4882a593Smuzhiyun {
468*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
469*4882a593Smuzhiyun 	int left_reg = kcontrol->private_value & 0xff;
470*4882a593Smuzhiyun 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
471*4882a593Smuzhiyun 	int shift_left = (kcontrol->private_value >> 16) & 0x07;
472*4882a593Smuzhiyun 	int shift_right = (kcontrol->private_value >> 19) & 0x07;
473*4882a593Smuzhiyun 	int mask = (kcontrol->private_value >> 24) & 0xff;
474*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 22) & 1;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	mutex_lock(&chip->mixer_lock);
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] =
479*4882a593Smuzhiyun 		(chip->reg_image[left_reg] >> shift_left) & mask;
480*4882a593Smuzhiyun 	ucontrol->value.integer.value[1] =
481*4882a593Smuzhiyun 		(chip->reg_image[right_reg] >> shift_right) & mask;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	if (invert) {
484*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] =
485*4882a593Smuzhiyun 			mask - ucontrol->value.integer.value[0];
486*4882a593Smuzhiyun 		ucontrol->value.integer.value[1] =
487*4882a593Smuzhiyun 			mask - ucontrol->value.integer.value[1];
488*4882a593Smuzhiyun 	}
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	mutex_unlock(&chip->mixer_lock);
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 	return 0;
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun 
snd_at73c213_stereo_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)495*4882a593Smuzhiyun static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol,
496*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
499*4882a593Smuzhiyun 	int left_reg = kcontrol->private_value & 0xff;
500*4882a593Smuzhiyun 	int right_reg = (kcontrol->private_value >> 8) & 0xff;
501*4882a593Smuzhiyun 	int shift_left = (kcontrol->private_value >> 16) & 0x07;
502*4882a593Smuzhiyun 	int shift_right = (kcontrol->private_value >> 19) & 0x07;
503*4882a593Smuzhiyun 	int mask = (kcontrol->private_value >> 24) & 0xff;
504*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 22) & 1;
505*4882a593Smuzhiyun 	int change, retval;
506*4882a593Smuzhiyun 	unsigned short val1, val2;
507*4882a593Smuzhiyun 
508*4882a593Smuzhiyun 	val1 = ucontrol->value.integer.value[0] & mask;
509*4882a593Smuzhiyun 	val2 = ucontrol->value.integer.value[1] & mask;
510*4882a593Smuzhiyun 	if (invert) {
511*4882a593Smuzhiyun 		val1 = mask - val1;
512*4882a593Smuzhiyun 		val2 = mask - val2;
513*4882a593Smuzhiyun 	}
514*4882a593Smuzhiyun 	val1 <<= shift_left;
515*4882a593Smuzhiyun 	val2 <<= shift_right;
516*4882a593Smuzhiyun 
517*4882a593Smuzhiyun 	mutex_lock(&chip->mixer_lock);
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun 	val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1;
520*4882a593Smuzhiyun 	val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2;
521*4882a593Smuzhiyun 	change = val1 != chip->reg_image[left_reg]
522*4882a593Smuzhiyun 		|| val2 != chip->reg_image[right_reg];
523*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, left_reg, val1);
524*4882a593Smuzhiyun 	if (retval) {
525*4882a593Smuzhiyun 		mutex_unlock(&chip->mixer_lock);
526*4882a593Smuzhiyun 		goto out;
527*4882a593Smuzhiyun 	}
528*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, right_reg, val2);
529*4882a593Smuzhiyun 	if (retval) {
530*4882a593Smuzhiyun 		mutex_unlock(&chip->mixer_lock);
531*4882a593Smuzhiyun 		goto out;
532*4882a593Smuzhiyun 	}
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun 	mutex_unlock(&chip->mixer_lock);
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	return change;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun out:
539*4882a593Smuzhiyun 	return retval;
540*4882a593Smuzhiyun }
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun #define snd_at73c213_mono_switch_info	snd_ctl_boolean_mono_info
543*4882a593Smuzhiyun 
snd_at73c213_mono_switch_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)544*4882a593Smuzhiyun static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol,
545*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
546*4882a593Smuzhiyun {
547*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
548*4882a593Smuzhiyun 	int reg = kcontrol->private_value & 0xff;
549*4882a593Smuzhiyun 	int shift = (kcontrol->private_value >> 8) & 0xff;
550*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 24) & 0xff;
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun 	mutex_lock(&chip->mixer_lock);
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] =
555*4882a593Smuzhiyun 		(chip->reg_image[reg] >> shift) & 0x01;
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	if (invert)
558*4882a593Smuzhiyun 		ucontrol->value.integer.value[0] =
559*4882a593Smuzhiyun 			0x01 - ucontrol->value.integer.value[0];
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun 	mutex_unlock(&chip->mixer_lock);
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	return 0;
564*4882a593Smuzhiyun }
565*4882a593Smuzhiyun 
snd_at73c213_mono_switch_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)566*4882a593Smuzhiyun static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol,
567*4882a593Smuzhiyun 				 struct snd_ctl_elem_value *ucontrol)
568*4882a593Smuzhiyun {
569*4882a593Smuzhiyun 	struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol);
570*4882a593Smuzhiyun 	int reg = kcontrol->private_value & 0xff;
571*4882a593Smuzhiyun 	int shift = (kcontrol->private_value >> 8) & 0xff;
572*4882a593Smuzhiyun 	int mask = (kcontrol->private_value >> 16) & 0xff;
573*4882a593Smuzhiyun 	int invert = (kcontrol->private_value >> 24) & 0xff;
574*4882a593Smuzhiyun 	int change, retval;
575*4882a593Smuzhiyun 	unsigned short val;
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 	if (ucontrol->value.integer.value[0])
578*4882a593Smuzhiyun 		val = mask;
579*4882a593Smuzhiyun 	else
580*4882a593Smuzhiyun 		val = 0;
581*4882a593Smuzhiyun 
582*4882a593Smuzhiyun 	if (invert)
583*4882a593Smuzhiyun 		val = mask - val;
584*4882a593Smuzhiyun 	val <<= shift;
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	mutex_lock(&chip->mixer_lock);
587*4882a593Smuzhiyun 
588*4882a593Smuzhiyun 	val |= (chip->reg_image[reg] & ~(mask << shift));
589*4882a593Smuzhiyun 	change = val != chip->reg_image[reg];
590*4882a593Smuzhiyun 
591*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, reg, val);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun 	mutex_unlock(&chip->mixer_lock);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	if (retval)
596*4882a593Smuzhiyun 		return retval;
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	return change;
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun 
snd_at73c213_pa_volume_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)601*4882a593Smuzhiyun static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol,
602*4882a593Smuzhiyun 				  struct snd_ctl_elem_info *uinfo)
603*4882a593Smuzhiyun {
604*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
605*4882a593Smuzhiyun 	uinfo->count = 1;
606*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
607*4882a593Smuzhiyun 	uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1;
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun 	return 0;
610*4882a593Smuzhiyun }
611*4882a593Smuzhiyun 
snd_at73c213_line_capture_volume_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)612*4882a593Smuzhiyun static int snd_at73c213_line_capture_volume_info(
613*4882a593Smuzhiyun 		struct snd_kcontrol *kcontrol,
614*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
615*4882a593Smuzhiyun {
616*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
617*4882a593Smuzhiyun 	uinfo->count = 2;
618*4882a593Smuzhiyun 	/* When inverted will give values 0x10001 => 0. */
619*4882a593Smuzhiyun 	uinfo->value.integer.min = 14;
620*4882a593Smuzhiyun 	uinfo->value.integer.max = 31;
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	return 0;
623*4882a593Smuzhiyun }
624*4882a593Smuzhiyun 
snd_at73c213_aux_capture_volume_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)625*4882a593Smuzhiyun static int snd_at73c213_aux_capture_volume_info(
626*4882a593Smuzhiyun 		struct snd_kcontrol *kcontrol,
627*4882a593Smuzhiyun 		struct snd_ctl_elem_info *uinfo)
628*4882a593Smuzhiyun {
629*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
630*4882a593Smuzhiyun 	uinfo->count = 1;
631*4882a593Smuzhiyun 	/* When inverted will give values 0x10001 => 0. */
632*4882a593Smuzhiyun 	uinfo->value.integer.min = 14;
633*4882a593Smuzhiyun 	uinfo->value.integer.max = 31;
634*4882a593Smuzhiyun 
635*4882a593Smuzhiyun 	return 0;
636*4882a593Smuzhiyun }
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun #define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert)	\
639*4882a593Smuzhiyun {									\
640*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
641*4882a593Smuzhiyun 	.name = xname,							\
642*4882a593Smuzhiyun 	.index = xindex,						\
643*4882a593Smuzhiyun 	.info = snd_at73c213_mono_switch_info,				\
644*4882a593Smuzhiyun 	.get = snd_at73c213_mono_switch_get,				\
645*4882a593Smuzhiyun 	.put = snd_at73c213_mono_switch_put,				\
646*4882a593Smuzhiyun 	.private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun #define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
650*4882a593Smuzhiyun {									\
651*4882a593Smuzhiyun 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,				\
652*4882a593Smuzhiyun 	.name = xname,							\
653*4882a593Smuzhiyun 	.index = xindex,						\
654*4882a593Smuzhiyun 	.info = snd_at73c213_stereo_info,				\
655*4882a593Smuzhiyun 	.get = snd_at73c213_stereo_get,					\
656*4882a593Smuzhiyun 	.put = snd_at73c213_stereo_put,					\
657*4882a593Smuzhiyun 	.private_value = (left_reg | (right_reg << 8)			\
658*4882a593Smuzhiyun 			| (shift_left << 16) | (shift_right << 19)	\
659*4882a593Smuzhiyun 			| (mask << 24) | (invert << 22))		\
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_at73c213_controls[] = {
663*4882a593Smuzhiyun AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1),
664*4882a593Smuzhiyun AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1),
665*4882a593Smuzhiyun AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1),
666*4882a593Smuzhiyun AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1),
667*4882a593Smuzhiyun AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV,
668*4882a593Smuzhiyun 		     0x01, 0),
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun 	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
671*4882a593Smuzhiyun 	.name	= "PA Playback Volume",
672*4882a593Smuzhiyun 	.index	= 0,
673*4882a593Smuzhiyun 	.info	= snd_at73c213_pa_volume_info,
674*4882a593Smuzhiyun 	.get	= snd_at73c213_mono_get,
675*4882a593Smuzhiyun 	.put	= snd_at73c213_mono_put,
676*4882a593Smuzhiyun 	.private_value	= PA_CTRL | (PA_CTRL_APAGAIN << 8) | \
677*4882a593Smuzhiyun 		(0x0f << 16) | (1 << 24),
678*4882a593Smuzhiyun },
679*4882a593Smuzhiyun AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP,
680*4882a593Smuzhiyun 		     0x01, 1),
681*4882a593Smuzhiyun AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0),
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun 	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
684*4882a593Smuzhiyun 	.name	= "Aux Capture Volume",
685*4882a593Smuzhiyun 	.index	= 0,
686*4882a593Smuzhiyun 	.info	= snd_at73c213_aux_capture_volume_info,
687*4882a593Smuzhiyun 	.get	= snd_at73c213_mono_get,
688*4882a593Smuzhiyun 	.put	= snd_at73c213_mono_put,
689*4882a593Smuzhiyun 	.private_value	= DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24),
690*4882a593Smuzhiyun },
691*4882a593Smuzhiyun AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN,
692*4882a593Smuzhiyun 		     0x01, 0),
693*4882a593Smuzhiyun {
694*4882a593Smuzhiyun 	.iface	= SNDRV_CTL_ELEM_IFACE_MIXER,
695*4882a593Smuzhiyun 	.name	= "Line Capture Volume",
696*4882a593Smuzhiyun 	.index	= 0,
697*4882a593Smuzhiyun 	.info	= snd_at73c213_line_capture_volume_info,
698*4882a593Smuzhiyun 	.get	= snd_at73c213_stereo_get,
699*4882a593Smuzhiyun 	.put	= snd_at73c213_stereo_put,
700*4882a593Smuzhiyun 	.private_value	= DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19)
701*4882a593Smuzhiyun 		| (0x1f << 24) | (1 << 22),
702*4882a593Smuzhiyun },
703*4882a593Smuzhiyun AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0),
704*4882a593Smuzhiyun };
705*4882a593Smuzhiyun 
snd_at73c213_mixer(struct snd_at73c213 * chip)706*4882a593Smuzhiyun static int snd_at73c213_mixer(struct snd_at73c213 *chip)
707*4882a593Smuzhiyun {
708*4882a593Smuzhiyun 	struct snd_card *card;
709*4882a593Smuzhiyun 	int errval, idx;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	if (chip == NULL || chip->pcm == NULL)
712*4882a593Smuzhiyun 		return -EINVAL;
713*4882a593Smuzhiyun 
714*4882a593Smuzhiyun 	card = chip->card;
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun 	strcpy(card->mixername, chip->pcm->name);
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) {
719*4882a593Smuzhiyun 		errval = snd_ctl_add(card,
720*4882a593Smuzhiyun 				snd_ctl_new1(&snd_at73c213_controls[idx],
721*4882a593Smuzhiyun 					chip));
722*4882a593Smuzhiyun 		if (errval < 0)
723*4882a593Smuzhiyun 			goto cleanup;
724*4882a593Smuzhiyun 	}
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	return 0;
727*4882a593Smuzhiyun 
728*4882a593Smuzhiyun cleanup:
729*4882a593Smuzhiyun 	for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) {
730*4882a593Smuzhiyun 		struct snd_kcontrol *kctl;
731*4882a593Smuzhiyun 		kctl = snd_ctl_find_numid(card, idx);
732*4882a593Smuzhiyun 		if (kctl)
733*4882a593Smuzhiyun 			snd_ctl_remove(card, kctl);
734*4882a593Smuzhiyun 	}
735*4882a593Smuzhiyun 	return errval;
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun /*
739*4882a593Smuzhiyun  * Device functions
740*4882a593Smuzhiyun  */
snd_at73c213_ssc_init(struct snd_at73c213 * chip)741*4882a593Smuzhiyun static int snd_at73c213_ssc_init(struct snd_at73c213 *chip)
742*4882a593Smuzhiyun {
743*4882a593Smuzhiyun 	/*
744*4882a593Smuzhiyun 	 * Continuous clock output.
745*4882a593Smuzhiyun 	 * Starts on falling TF.
746*4882a593Smuzhiyun 	 * Delay 1 cycle (1 bit).
747*4882a593Smuzhiyun 	 * Periode is 16 bit (16 - 1).
748*4882a593Smuzhiyun 	 */
749*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, TCMR,
750*4882a593Smuzhiyun 			SSC_BF(TCMR_CKO, 1)
751*4882a593Smuzhiyun 			| SSC_BF(TCMR_START, 4)
752*4882a593Smuzhiyun 			| SSC_BF(TCMR_STTDLY, 1)
753*4882a593Smuzhiyun 			| SSC_BF(TCMR_PERIOD, 16 - 1));
754*4882a593Smuzhiyun 	/*
755*4882a593Smuzhiyun 	 * Data length is 16 bit (16 - 1).
756*4882a593Smuzhiyun 	 * Transmit MSB first.
757*4882a593Smuzhiyun 	 * Transmit 2 words each transfer.
758*4882a593Smuzhiyun 	 * Frame sync length is 16 bit (16 - 1).
759*4882a593Smuzhiyun 	 * Frame starts on negative pulse.
760*4882a593Smuzhiyun 	 */
761*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, TFMR,
762*4882a593Smuzhiyun 			SSC_BF(TFMR_DATLEN, 16 - 1)
763*4882a593Smuzhiyun 			| SSC_BIT(TFMR_MSBF)
764*4882a593Smuzhiyun 			| SSC_BF(TFMR_DATNB, 1)
765*4882a593Smuzhiyun 			| SSC_BF(TFMR_FSLEN, 16 - 1)
766*4882a593Smuzhiyun 			| SSC_BF(TFMR_FSOS, 1));
767*4882a593Smuzhiyun 
768*4882a593Smuzhiyun 	return 0;
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun 
snd_at73c213_chip_init(struct snd_at73c213 * chip)771*4882a593Smuzhiyun static int snd_at73c213_chip_init(struct snd_at73c213 *chip)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun 	int retval;
774*4882a593Smuzhiyun 	unsigned char dac_ctrl = 0;
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	retval = snd_at73c213_set_bitrate(chip);
777*4882a593Smuzhiyun 	if (retval)
778*4882a593Smuzhiyun 		goto out;
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun 	/* Enable DAC master clock. */
781*4882a593Smuzhiyun 	retval = clk_enable(chip->board->dac_clk);
782*4882a593Smuzhiyun 	if (retval)
783*4882a593Smuzhiyun 		goto out;
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	/* Initialize at73c213 on SPI bus. */
786*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04);
787*4882a593Smuzhiyun 	if (retval)
788*4882a593Smuzhiyun 		goto out_clk;
789*4882a593Smuzhiyun 	msleep(1);
790*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03);
791*4882a593Smuzhiyun 	if (retval)
792*4882a593Smuzhiyun 		goto out_clk;
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun 	/* Precharge everything. */
795*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff);
796*4882a593Smuzhiyun 	if (retval)
797*4882a593Smuzhiyun 		goto out_clk;
798*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH));
799*4882a593Smuzhiyun 	if (retval)
800*4882a593Smuzhiyun 		goto out_clk;
801*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_CTRL,
802*4882a593Smuzhiyun 			(1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR));
803*4882a593Smuzhiyun 	if (retval)
804*4882a593Smuzhiyun 		goto out_clk;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	msleep(50);
807*4882a593Smuzhiyun 
808*4882a593Smuzhiyun 	/* Stop precharging PA. */
809*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, PA_CTRL,
810*4882a593Smuzhiyun 			(1<<PA_CTRL_APALP) | 0x0f);
811*4882a593Smuzhiyun 	if (retval)
812*4882a593Smuzhiyun 		goto out_clk;
813*4882a593Smuzhiyun 
814*4882a593Smuzhiyun 	msleep(450);
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	/* Stop precharging DAC, turn on master power. */
817*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR));
818*4882a593Smuzhiyun 	if (retval)
819*4882a593Smuzhiyun 		goto out_clk;
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 	msleep(1);
822*4882a593Smuzhiyun 
823*4882a593Smuzhiyun 	/* Turn on DAC. */
824*4882a593Smuzhiyun 	dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR)
825*4882a593Smuzhiyun 		| (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR);
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl);
828*4882a593Smuzhiyun 	if (retval)
829*4882a593Smuzhiyun 		goto out_clk;
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun 	/* Mute sound. */
832*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
833*4882a593Smuzhiyun 	if (retval)
834*4882a593Smuzhiyun 		goto out_clk;
835*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
836*4882a593Smuzhiyun 	if (retval)
837*4882a593Smuzhiyun 		goto out_clk;
838*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
839*4882a593Smuzhiyun 	if (retval)
840*4882a593Smuzhiyun 		goto out_clk;
841*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
842*4882a593Smuzhiyun 	if (retval)
843*4882a593Smuzhiyun 		goto out_clk;
844*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
845*4882a593Smuzhiyun 	if (retval)
846*4882a593Smuzhiyun 		goto out_clk;
847*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
848*4882a593Smuzhiyun 	if (retval)
849*4882a593Smuzhiyun 		goto out_clk;
850*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
851*4882a593Smuzhiyun 	if (retval)
852*4882a593Smuzhiyun 		goto out_clk;
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 	/* Enable I2S device, i.e. clock output. */
855*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	goto out;
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun out_clk:
860*4882a593Smuzhiyun 	clk_disable(chip->board->dac_clk);
861*4882a593Smuzhiyun out:
862*4882a593Smuzhiyun 	return retval;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun 
snd_at73c213_dev_free(struct snd_device * device)865*4882a593Smuzhiyun static int snd_at73c213_dev_free(struct snd_device *device)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun 	struct snd_at73c213 *chip = device->device_data;
868*4882a593Smuzhiyun 
869*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
870*4882a593Smuzhiyun 	if (chip->irq >= 0) {
871*4882a593Smuzhiyun 		free_irq(chip->irq, chip);
872*4882a593Smuzhiyun 		chip->irq = -1;
873*4882a593Smuzhiyun 	}
874*4882a593Smuzhiyun 
875*4882a593Smuzhiyun 	return 0;
876*4882a593Smuzhiyun }
877*4882a593Smuzhiyun 
snd_at73c213_dev_init(struct snd_card * card,struct spi_device * spi)878*4882a593Smuzhiyun static int snd_at73c213_dev_init(struct snd_card *card,
879*4882a593Smuzhiyun 				 struct spi_device *spi)
880*4882a593Smuzhiyun {
881*4882a593Smuzhiyun 	static const struct snd_device_ops ops = {
882*4882a593Smuzhiyun 		.dev_free	= snd_at73c213_dev_free,
883*4882a593Smuzhiyun 	};
884*4882a593Smuzhiyun 	struct snd_at73c213 *chip = get_chip(card);
885*4882a593Smuzhiyun 	int irq, retval;
886*4882a593Smuzhiyun 
887*4882a593Smuzhiyun 	irq = chip->ssc->irq;
888*4882a593Smuzhiyun 	if (irq < 0)
889*4882a593Smuzhiyun 		return irq;
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	spin_lock_init(&chip->lock);
892*4882a593Smuzhiyun 	mutex_init(&chip->mixer_lock);
893*4882a593Smuzhiyun 	chip->card = card;
894*4882a593Smuzhiyun 	chip->irq = -1;
895*4882a593Smuzhiyun 
896*4882a593Smuzhiyun 	retval = clk_enable(chip->ssc->clk);
897*4882a593Smuzhiyun 	if (retval)
898*4882a593Smuzhiyun 		return retval;
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip);
901*4882a593Smuzhiyun 	if (retval) {
902*4882a593Smuzhiyun 		dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq);
903*4882a593Smuzhiyun 		goto out;
904*4882a593Smuzhiyun 	}
905*4882a593Smuzhiyun 	chip->irq = irq;
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	memcpy(&chip->reg_image, &snd_at73c213_original_image,
908*4882a593Smuzhiyun 			sizeof(snd_at73c213_original_image));
909*4882a593Smuzhiyun 
910*4882a593Smuzhiyun 	retval = snd_at73c213_ssc_init(chip);
911*4882a593Smuzhiyun 	if (retval)
912*4882a593Smuzhiyun 		goto out_irq;
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	retval = snd_at73c213_chip_init(chip);
915*4882a593Smuzhiyun 	if (retval)
916*4882a593Smuzhiyun 		goto out_irq;
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	retval = snd_at73c213_pcm_new(chip, 0);
919*4882a593Smuzhiyun 	if (retval)
920*4882a593Smuzhiyun 		goto out_irq;
921*4882a593Smuzhiyun 
922*4882a593Smuzhiyun 	retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
923*4882a593Smuzhiyun 	if (retval)
924*4882a593Smuzhiyun 		goto out_irq;
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun 	retval = snd_at73c213_mixer(chip);
927*4882a593Smuzhiyun 	if (retval)
928*4882a593Smuzhiyun 		goto out_snd_dev;
929*4882a593Smuzhiyun 
930*4882a593Smuzhiyun 	goto out;
931*4882a593Smuzhiyun 
932*4882a593Smuzhiyun out_snd_dev:
933*4882a593Smuzhiyun 	snd_device_free(card, chip);
934*4882a593Smuzhiyun out_irq:
935*4882a593Smuzhiyun 	free_irq(chip->irq, chip);
936*4882a593Smuzhiyun 	chip->irq = -1;
937*4882a593Smuzhiyun out:
938*4882a593Smuzhiyun 	clk_disable(chip->ssc->clk);
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	return retval;
941*4882a593Smuzhiyun }
942*4882a593Smuzhiyun 
snd_at73c213_probe(struct spi_device * spi)943*4882a593Smuzhiyun static int snd_at73c213_probe(struct spi_device *spi)
944*4882a593Smuzhiyun {
945*4882a593Smuzhiyun 	struct snd_card			*card;
946*4882a593Smuzhiyun 	struct snd_at73c213		*chip;
947*4882a593Smuzhiyun 	struct at73c213_board_info	*board;
948*4882a593Smuzhiyun 	int				retval;
949*4882a593Smuzhiyun 	char				id[16];
950*4882a593Smuzhiyun 
951*4882a593Smuzhiyun 	board = spi->dev.platform_data;
952*4882a593Smuzhiyun 	if (!board) {
953*4882a593Smuzhiyun 		dev_dbg(&spi->dev, "no platform_data\n");
954*4882a593Smuzhiyun 		return -ENXIO;
955*4882a593Smuzhiyun 	}
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	if (!board->dac_clk) {
958*4882a593Smuzhiyun 		dev_dbg(&spi->dev, "no DAC clk\n");
959*4882a593Smuzhiyun 		return -ENXIO;
960*4882a593Smuzhiyun 	}
961*4882a593Smuzhiyun 
962*4882a593Smuzhiyun 	if (IS_ERR(board->dac_clk)) {
963*4882a593Smuzhiyun 		dev_dbg(&spi->dev, "no DAC clk\n");
964*4882a593Smuzhiyun 		return PTR_ERR(board->dac_clk);
965*4882a593Smuzhiyun 	}
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	/* Allocate "card" using some unused identifiers. */
968*4882a593Smuzhiyun 	snprintf(id, sizeof id, "at73c213_%d", board->ssc_id);
969*4882a593Smuzhiyun 	retval = snd_card_new(&spi->dev, -1, id, THIS_MODULE,
970*4882a593Smuzhiyun 			      sizeof(struct snd_at73c213), &card);
971*4882a593Smuzhiyun 	if (retval < 0)
972*4882a593Smuzhiyun 		goto out;
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 	chip = card->private_data;
975*4882a593Smuzhiyun 	chip->spi = spi;
976*4882a593Smuzhiyun 	chip->board = board;
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	chip->ssc = ssc_request(board->ssc_id);
979*4882a593Smuzhiyun 	if (IS_ERR(chip->ssc)) {
980*4882a593Smuzhiyun 		dev_dbg(&spi->dev, "could not get ssc%d device\n",
981*4882a593Smuzhiyun 				board->ssc_id);
982*4882a593Smuzhiyun 		retval = PTR_ERR(chip->ssc);
983*4882a593Smuzhiyun 		goto out_card;
984*4882a593Smuzhiyun 	}
985*4882a593Smuzhiyun 
986*4882a593Smuzhiyun 	retval = snd_at73c213_dev_init(card, spi);
987*4882a593Smuzhiyun 	if (retval)
988*4882a593Smuzhiyun 		goto out_ssc;
989*4882a593Smuzhiyun 
990*4882a593Smuzhiyun 	strcpy(card->driver, "at73c213");
991*4882a593Smuzhiyun 	strcpy(card->shortname, board->shortname);
992*4882a593Smuzhiyun 	sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq);
993*4882a593Smuzhiyun 
994*4882a593Smuzhiyun 	retval = snd_card_register(card);
995*4882a593Smuzhiyun 	if (retval)
996*4882a593Smuzhiyun 		goto out_ssc;
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	dev_set_drvdata(&spi->dev, card);
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	goto out;
1001*4882a593Smuzhiyun 
1002*4882a593Smuzhiyun out_ssc:
1003*4882a593Smuzhiyun 	ssc_free(chip->ssc);
1004*4882a593Smuzhiyun out_card:
1005*4882a593Smuzhiyun 	snd_card_free(card);
1006*4882a593Smuzhiyun out:
1007*4882a593Smuzhiyun 	return retval;
1008*4882a593Smuzhiyun }
1009*4882a593Smuzhiyun 
snd_at73c213_remove(struct spi_device * spi)1010*4882a593Smuzhiyun static int snd_at73c213_remove(struct spi_device *spi)
1011*4882a593Smuzhiyun {
1012*4882a593Smuzhiyun 	struct snd_card *card = dev_get_drvdata(&spi->dev);
1013*4882a593Smuzhiyun 	struct snd_at73c213 *chip = card->private_data;
1014*4882a593Smuzhiyun 	int retval;
1015*4882a593Smuzhiyun 
1016*4882a593Smuzhiyun 	/* Stop playback. */
1017*4882a593Smuzhiyun 	retval = clk_enable(chip->ssc->clk);
1018*4882a593Smuzhiyun 	if (retval)
1019*4882a593Smuzhiyun 		goto out;
1020*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
1021*4882a593Smuzhiyun 	clk_disable(chip->ssc->clk);
1022*4882a593Smuzhiyun 
1023*4882a593Smuzhiyun 	/* Mute sound. */
1024*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f);
1025*4882a593Smuzhiyun 	if (retval)
1026*4882a593Smuzhiyun 		goto out;
1027*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f);
1028*4882a593Smuzhiyun 	if (retval)
1029*4882a593Smuzhiyun 		goto out;
1030*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f);
1031*4882a593Smuzhiyun 	if (retval)
1032*4882a593Smuzhiyun 		goto out;
1033*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f);
1034*4882a593Smuzhiyun 	if (retval)
1035*4882a593Smuzhiyun 		goto out;
1036*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11);
1037*4882a593Smuzhiyun 	if (retval)
1038*4882a593Smuzhiyun 		goto out;
1039*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11);
1040*4882a593Smuzhiyun 	if (retval)
1041*4882a593Smuzhiyun 		goto out;
1042*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11);
1043*4882a593Smuzhiyun 	if (retval)
1044*4882a593Smuzhiyun 		goto out;
1045*4882a593Smuzhiyun 
1046*4882a593Smuzhiyun 	/* Turn off PA. */
1047*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, PA_CTRL,
1048*4882a593Smuzhiyun 					chip->reg_image[PA_CTRL] | 0x0f);
1049*4882a593Smuzhiyun 	if (retval)
1050*4882a593Smuzhiyun 		goto out;
1051*4882a593Smuzhiyun 	msleep(10);
1052*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, PA_CTRL,
1053*4882a593Smuzhiyun 					(1 << PA_CTRL_APALP) | 0x0f);
1054*4882a593Smuzhiyun 	if (retval)
1055*4882a593Smuzhiyun 		goto out;
1056*4882a593Smuzhiyun 
1057*4882a593Smuzhiyun 	/* Turn off external DAC. */
1058*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c);
1059*4882a593Smuzhiyun 	if (retval)
1060*4882a593Smuzhiyun 		goto out;
1061*4882a593Smuzhiyun 	msleep(2);
1062*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00);
1063*4882a593Smuzhiyun 	if (retval)
1064*4882a593Smuzhiyun 		goto out;
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	/* Turn off master power. */
1067*4882a593Smuzhiyun 	retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00);
1068*4882a593Smuzhiyun 	if (retval)
1069*4882a593Smuzhiyun 		goto out;
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun out:
1072*4882a593Smuzhiyun 	/* Stop DAC master clock. */
1073*4882a593Smuzhiyun 	clk_disable(chip->board->dac_clk);
1074*4882a593Smuzhiyun 
1075*4882a593Smuzhiyun 	ssc_free(chip->ssc);
1076*4882a593Smuzhiyun 	snd_card_free(card);
1077*4882a593Smuzhiyun 
1078*4882a593Smuzhiyun 	return 0;
1079*4882a593Smuzhiyun }
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
1082*4882a593Smuzhiyun 
snd_at73c213_suspend(struct device * dev)1083*4882a593Smuzhiyun static int snd_at73c213_suspend(struct device *dev)
1084*4882a593Smuzhiyun {
1085*4882a593Smuzhiyun 	struct snd_card *card = dev_get_drvdata(dev);
1086*4882a593Smuzhiyun 	struct snd_at73c213 *chip = card->private_data;
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS));
1089*4882a593Smuzhiyun 	clk_disable(chip->ssc->clk);
1090*4882a593Smuzhiyun 	clk_disable(chip->board->dac_clk);
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun 	return 0;
1093*4882a593Smuzhiyun }
1094*4882a593Smuzhiyun 
snd_at73c213_resume(struct device * dev)1095*4882a593Smuzhiyun static int snd_at73c213_resume(struct device *dev)
1096*4882a593Smuzhiyun {
1097*4882a593Smuzhiyun 	struct snd_card *card = dev_get_drvdata(dev);
1098*4882a593Smuzhiyun 	struct snd_at73c213 *chip = card->private_data;
1099*4882a593Smuzhiyun 	int retval;
1100*4882a593Smuzhiyun 
1101*4882a593Smuzhiyun 	retval = clk_enable(chip->board->dac_clk);
1102*4882a593Smuzhiyun 	if (retval)
1103*4882a593Smuzhiyun 		return retval;
1104*4882a593Smuzhiyun 	retval = clk_enable(chip->ssc->clk);
1105*4882a593Smuzhiyun 	if (retval) {
1106*4882a593Smuzhiyun 		clk_disable(chip->board->dac_clk);
1107*4882a593Smuzhiyun 		return retval;
1108*4882a593Smuzhiyun 	}
1109*4882a593Smuzhiyun 	ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN));
1110*4882a593Smuzhiyun 
1111*4882a593Smuzhiyun 	return 0;
1112*4882a593Smuzhiyun }
1113*4882a593Smuzhiyun 
1114*4882a593Smuzhiyun static SIMPLE_DEV_PM_OPS(at73c213_pm_ops, snd_at73c213_suspend,
1115*4882a593Smuzhiyun 		snd_at73c213_resume);
1116*4882a593Smuzhiyun #define AT73C213_PM_OPS (&at73c213_pm_ops)
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun #else
1119*4882a593Smuzhiyun #define AT73C213_PM_OPS NULL
1120*4882a593Smuzhiyun #endif
1121*4882a593Smuzhiyun 
1122*4882a593Smuzhiyun static struct spi_driver at73c213_driver = {
1123*4882a593Smuzhiyun 	.driver		= {
1124*4882a593Smuzhiyun 		.name	= "at73c213",
1125*4882a593Smuzhiyun 		.pm	= AT73C213_PM_OPS,
1126*4882a593Smuzhiyun 	},
1127*4882a593Smuzhiyun 	.probe		= snd_at73c213_probe,
1128*4882a593Smuzhiyun 	.remove		= snd_at73c213_remove,
1129*4882a593Smuzhiyun };
1130*4882a593Smuzhiyun 
1131*4882a593Smuzhiyun module_spi_driver(at73c213_driver);
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");
1134*4882a593Smuzhiyun MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC");
1135*4882a593Smuzhiyun MODULE_LICENSE("GPL");
1136