1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Driver for CS4231 sound chips found on Sparcs.
4*4882a593Smuzhiyun * Copyright (C) 2002, 2008 David S. Miller <davem@davemloft.net>
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Based entirely upon drivers/sbus/audio/cs4231.c which is:
7*4882a593Smuzhiyun * Copyright (C) 1996, 1997, 1998 Derrick J Brashear (shadow@andrew.cmu.edu)
8*4882a593Smuzhiyun * and also sound/isa/cs423x/cs4231_lib.c which is:
9*4882a593Smuzhiyun * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/module.h>
13*4882a593Smuzhiyun #include <linux/kernel.h>
14*4882a593Smuzhiyun #include <linux/delay.h>
15*4882a593Smuzhiyun #include <linux/init.h>
16*4882a593Smuzhiyun #include <linux/interrupt.h>
17*4882a593Smuzhiyun #include <linux/moduleparam.h>
18*4882a593Smuzhiyun #include <linux/irq.h>
19*4882a593Smuzhiyun #include <linux/io.h>
20*4882a593Smuzhiyun #include <linux/of.h>
21*4882a593Smuzhiyun #include <linux/of_device.h>
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #include <sound/core.h>
24*4882a593Smuzhiyun #include <sound/pcm.h>
25*4882a593Smuzhiyun #include <sound/info.h>
26*4882a593Smuzhiyun #include <sound/control.h>
27*4882a593Smuzhiyun #include <sound/timer.h>
28*4882a593Smuzhiyun #include <sound/initval.h>
29*4882a593Smuzhiyun #include <sound/pcm_params.h>
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #ifdef CONFIG_SBUS
32*4882a593Smuzhiyun #define SBUS_SUPPORT
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #if defined(CONFIG_PCI) && defined(CONFIG_SPARC64)
36*4882a593Smuzhiyun #define EBUS_SUPPORT
37*4882a593Smuzhiyun #include <linux/pci.h>
38*4882a593Smuzhiyun #include <asm/ebus_dma.h>
39*4882a593Smuzhiyun #endif
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
42*4882a593Smuzhiyun static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
43*4882a593Smuzhiyun /* Enable this card */
44*4882a593Smuzhiyun static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun module_param_array(index, int, NULL, 0444);
47*4882a593Smuzhiyun MODULE_PARM_DESC(index, "Index value for Sun CS4231 soundcard.");
48*4882a593Smuzhiyun module_param_array(id, charp, NULL, 0444);
49*4882a593Smuzhiyun MODULE_PARM_DESC(id, "ID string for Sun CS4231 soundcard.");
50*4882a593Smuzhiyun module_param_array(enable, bool, NULL, 0444);
51*4882a593Smuzhiyun MODULE_PARM_DESC(enable, "Enable Sun CS4231 soundcard.");
52*4882a593Smuzhiyun MODULE_AUTHOR("Jaroslav Kysela, Derrick J. Brashear and David S. Miller");
53*4882a593Smuzhiyun MODULE_DESCRIPTION("Sun CS4231");
54*4882a593Smuzhiyun MODULE_LICENSE("GPL");
55*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("{{Sun,CS4231}}");
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #ifdef SBUS_SUPPORT
58*4882a593Smuzhiyun struct sbus_dma_info {
59*4882a593Smuzhiyun spinlock_t lock; /* DMA access lock */
60*4882a593Smuzhiyun int dir;
61*4882a593Smuzhiyun void __iomem *regs;
62*4882a593Smuzhiyun };
63*4882a593Smuzhiyun #endif
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun struct snd_cs4231;
66*4882a593Smuzhiyun struct cs4231_dma_control {
67*4882a593Smuzhiyun void (*prepare)(struct cs4231_dma_control *dma_cont,
68*4882a593Smuzhiyun int dir);
69*4882a593Smuzhiyun void (*enable)(struct cs4231_dma_control *dma_cont, int on);
70*4882a593Smuzhiyun int (*request)(struct cs4231_dma_control *dma_cont,
71*4882a593Smuzhiyun dma_addr_t bus_addr, size_t len);
72*4882a593Smuzhiyun unsigned int (*address)(struct cs4231_dma_control *dma_cont);
73*4882a593Smuzhiyun #ifdef EBUS_SUPPORT
74*4882a593Smuzhiyun struct ebus_dma_info ebus_info;
75*4882a593Smuzhiyun #endif
76*4882a593Smuzhiyun #ifdef SBUS_SUPPORT
77*4882a593Smuzhiyun struct sbus_dma_info sbus_info;
78*4882a593Smuzhiyun #endif
79*4882a593Smuzhiyun };
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun struct snd_cs4231 {
82*4882a593Smuzhiyun spinlock_t lock; /* registers access lock */
83*4882a593Smuzhiyun void __iomem *port;
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun struct cs4231_dma_control p_dma;
86*4882a593Smuzhiyun struct cs4231_dma_control c_dma;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun u32 flags;
89*4882a593Smuzhiyun #define CS4231_FLAG_EBUS 0x00000001
90*4882a593Smuzhiyun #define CS4231_FLAG_PLAYBACK 0x00000002
91*4882a593Smuzhiyun #define CS4231_FLAG_CAPTURE 0x00000004
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun struct snd_card *card;
94*4882a593Smuzhiyun struct snd_pcm *pcm;
95*4882a593Smuzhiyun struct snd_pcm_substream *playback_substream;
96*4882a593Smuzhiyun unsigned int p_periods_sent;
97*4882a593Smuzhiyun struct snd_pcm_substream *capture_substream;
98*4882a593Smuzhiyun unsigned int c_periods_sent;
99*4882a593Smuzhiyun struct snd_timer *timer;
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun unsigned short mode;
102*4882a593Smuzhiyun #define CS4231_MODE_NONE 0x0000
103*4882a593Smuzhiyun #define CS4231_MODE_PLAY 0x0001
104*4882a593Smuzhiyun #define CS4231_MODE_RECORD 0x0002
105*4882a593Smuzhiyun #define CS4231_MODE_TIMER 0x0004
106*4882a593Smuzhiyun #define CS4231_MODE_OPEN (CS4231_MODE_PLAY | CS4231_MODE_RECORD | \
107*4882a593Smuzhiyun CS4231_MODE_TIMER)
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun unsigned char image[32]; /* registers image */
110*4882a593Smuzhiyun int mce_bit;
111*4882a593Smuzhiyun int calibrate_mute;
112*4882a593Smuzhiyun struct mutex mce_mutex; /* mutex for mce register */
113*4882a593Smuzhiyun struct mutex open_mutex; /* mutex for ALSA open/close */
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun struct platform_device *op;
116*4882a593Smuzhiyun unsigned int irq[2];
117*4882a593Smuzhiyun unsigned int regs_size;
118*4882a593Smuzhiyun struct snd_cs4231 *next;
119*4882a593Smuzhiyun };
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* Eventually we can use sound/isa/cs423x/cs4231_lib.c directly, but for
122*4882a593Smuzhiyun * now.... -DaveM
123*4882a593Smuzhiyun */
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun /* IO ports */
126*4882a593Smuzhiyun #include <sound/cs4231-regs.h>
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* XXX offsets are different than PC ISA chips... */
129*4882a593Smuzhiyun #define CS4231U(chip, x) ((chip)->port + ((c_d_c_CS4231##x) << 2))
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun /* SBUS DMA register defines. */
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun #define APCCSR 0x10UL /* APC DMA CSR */
134*4882a593Smuzhiyun #define APCCVA 0x20UL /* APC Capture DMA Address */
135*4882a593Smuzhiyun #define APCCC 0x24UL /* APC Capture Count */
136*4882a593Smuzhiyun #define APCCNVA 0x28UL /* APC Capture DMA Next Address */
137*4882a593Smuzhiyun #define APCCNC 0x2cUL /* APC Capture Next Count */
138*4882a593Smuzhiyun #define APCPVA 0x30UL /* APC Play DMA Address */
139*4882a593Smuzhiyun #define APCPC 0x34UL /* APC Play Count */
140*4882a593Smuzhiyun #define APCPNVA 0x38UL /* APC Play DMA Next Address */
141*4882a593Smuzhiyun #define APCPNC 0x3cUL /* APC Play Next Count */
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun /* Defines for SBUS DMA-routines */
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun #define APCVA 0x0UL /* APC DMA Address */
146*4882a593Smuzhiyun #define APCC 0x4UL /* APC Count */
147*4882a593Smuzhiyun #define APCNVA 0x8UL /* APC DMA Next Address */
148*4882a593Smuzhiyun #define APCNC 0xcUL /* APC Next Count */
149*4882a593Smuzhiyun #define APC_PLAY 0x30UL /* Play registers start at 0x30 */
150*4882a593Smuzhiyun #define APC_RECORD 0x20UL /* Record registers start at 0x20 */
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* APCCSR bits */
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun #define APC_INT_PENDING 0x800000 /* Interrupt Pending */
155*4882a593Smuzhiyun #define APC_PLAY_INT 0x400000 /* Playback interrupt */
156*4882a593Smuzhiyun #define APC_CAPT_INT 0x200000 /* Capture interrupt */
157*4882a593Smuzhiyun #define APC_GENL_INT 0x100000 /* General interrupt */
158*4882a593Smuzhiyun #define APC_XINT_ENA 0x80000 /* General ext int. enable */
159*4882a593Smuzhiyun #define APC_XINT_PLAY 0x40000 /* Playback ext intr */
160*4882a593Smuzhiyun #define APC_XINT_CAPT 0x20000 /* Capture ext intr */
161*4882a593Smuzhiyun #define APC_XINT_GENL 0x10000 /* Error ext intr */
162*4882a593Smuzhiyun #define APC_XINT_EMPT 0x8000 /* Pipe empty interrupt (0 write to pva) */
163*4882a593Smuzhiyun #define APC_XINT_PEMP 0x4000 /* Play pipe empty (pva and pnva not set) */
164*4882a593Smuzhiyun #define APC_XINT_PNVA 0x2000 /* Playback NVA dirty */
165*4882a593Smuzhiyun #define APC_XINT_PENA 0x1000 /* play pipe empty Int enable */
166*4882a593Smuzhiyun #define APC_XINT_COVF 0x800 /* Cap data dropped on floor */
167*4882a593Smuzhiyun #define APC_XINT_CNVA 0x400 /* Capture NVA dirty */
168*4882a593Smuzhiyun #define APC_XINT_CEMP 0x200 /* Capture pipe empty (cva and cnva not set) */
169*4882a593Smuzhiyun #define APC_XINT_CENA 0x100 /* Cap. pipe empty int enable */
170*4882a593Smuzhiyun #define APC_PPAUSE 0x80 /* Pause the play DMA */
171*4882a593Smuzhiyun #define APC_CPAUSE 0x40 /* Pause the capture DMA */
172*4882a593Smuzhiyun #define APC_CDC_RESET 0x20 /* CODEC RESET */
173*4882a593Smuzhiyun #define APC_PDMA_READY 0x08 /* Play DMA Go */
174*4882a593Smuzhiyun #define APC_CDMA_READY 0x04 /* Capture DMA Go */
175*4882a593Smuzhiyun #define APC_CHIP_RESET 0x01 /* Reset the chip */
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun /* EBUS DMA register offsets */
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun #define EBDMA_CSR 0x00UL /* Control/Status */
180*4882a593Smuzhiyun #define EBDMA_ADDR 0x04UL /* DMA Address */
181*4882a593Smuzhiyun #define EBDMA_COUNT 0x08UL /* DMA Count */
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /*
184*4882a593Smuzhiyun * Some variables
185*4882a593Smuzhiyun */
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun static const unsigned char freq_bits[14] = {
188*4882a593Smuzhiyun /* 5510 */ 0x00 | CS4231_XTAL2,
189*4882a593Smuzhiyun /* 6620 */ 0x0E | CS4231_XTAL2,
190*4882a593Smuzhiyun /* 8000 */ 0x00 | CS4231_XTAL1,
191*4882a593Smuzhiyun /* 9600 */ 0x0E | CS4231_XTAL1,
192*4882a593Smuzhiyun /* 11025 */ 0x02 | CS4231_XTAL2,
193*4882a593Smuzhiyun /* 16000 */ 0x02 | CS4231_XTAL1,
194*4882a593Smuzhiyun /* 18900 */ 0x04 | CS4231_XTAL2,
195*4882a593Smuzhiyun /* 22050 */ 0x06 | CS4231_XTAL2,
196*4882a593Smuzhiyun /* 27042 */ 0x04 | CS4231_XTAL1,
197*4882a593Smuzhiyun /* 32000 */ 0x06 | CS4231_XTAL1,
198*4882a593Smuzhiyun /* 33075 */ 0x0C | CS4231_XTAL2,
199*4882a593Smuzhiyun /* 37800 */ 0x08 | CS4231_XTAL2,
200*4882a593Smuzhiyun /* 44100 */ 0x0A | CS4231_XTAL2,
201*4882a593Smuzhiyun /* 48000 */ 0x0C | CS4231_XTAL1
202*4882a593Smuzhiyun };
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun static const unsigned int rates[14] = {
205*4882a593Smuzhiyun 5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
206*4882a593Smuzhiyun 27042, 32000, 33075, 37800, 44100, 48000
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun static const struct snd_pcm_hw_constraint_list hw_constraints_rates = {
210*4882a593Smuzhiyun .count = ARRAY_SIZE(rates),
211*4882a593Smuzhiyun .list = rates,
212*4882a593Smuzhiyun };
213*4882a593Smuzhiyun
snd_cs4231_xrate(struct snd_pcm_runtime * runtime)214*4882a593Smuzhiyun static int snd_cs4231_xrate(struct snd_pcm_runtime *runtime)
215*4882a593Smuzhiyun {
216*4882a593Smuzhiyun return snd_pcm_hw_constraint_list(runtime, 0,
217*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_RATE,
218*4882a593Smuzhiyun &hw_constraints_rates);
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
221*4882a593Smuzhiyun static const unsigned char snd_cs4231_original_image[32] =
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 0x00, /* 00/00 - lic */
224*4882a593Smuzhiyun 0x00, /* 01/01 - ric */
225*4882a593Smuzhiyun 0x9f, /* 02/02 - la1ic */
226*4882a593Smuzhiyun 0x9f, /* 03/03 - ra1ic */
227*4882a593Smuzhiyun 0x9f, /* 04/04 - la2ic */
228*4882a593Smuzhiyun 0x9f, /* 05/05 - ra2ic */
229*4882a593Smuzhiyun 0xbf, /* 06/06 - loc */
230*4882a593Smuzhiyun 0xbf, /* 07/07 - roc */
231*4882a593Smuzhiyun 0x20, /* 08/08 - pdfr */
232*4882a593Smuzhiyun CS4231_AUTOCALIB, /* 09/09 - ic */
233*4882a593Smuzhiyun 0x00, /* 0a/10 - pc */
234*4882a593Smuzhiyun 0x00, /* 0b/11 - ti */
235*4882a593Smuzhiyun CS4231_MODE2, /* 0c/12 - mi */
236*4882a593Smuzhiyun 0x00, /* 0d/13 - lbc */
237*4882a593Smuzhiyun 0x00, /* 0e/14 - pbru */
238*4882a593Smuzhiyun 0x00, /* 0f/15 - pbrl */
239*4882a593Smuzhiyun 0x80, /* 10/16 - afei */
240*4882a593Smuzhiyun 0x01, /* 11/17 - afeii */
241*4882a593Smuzhiyun 0x9f, /* 12/18 - llic */
242*4882a593Smuzhiyun 0x9f, /* 13/19 - rlic */
243*4882a593Smuzhiyun 0x00, /* 14/20 - tlb */
244*4882a593Smuzhiyun 0x00, /* 15/21 - thb */
245*4882a593Smuzhiyun 0x00, /* 16/22 - la3mic/reserved */
246*4882a593Smuzhiyun 0x00, /* 17/23 - ra3mic/reserved */
247*4882a593Smuzhiyun 0x00, /* 18/24 - afs */
248*4882a593Smuzhiyun 0x00, /* 19/25 - lamoc/version */
249*4882a593Smuzhiyun 0x00, /* 1a/26 - mioc */
250*4882a593Smuzhiyun 0x00, /* 1b/27 - ramoc/reserved */
251*4882a593Smuzhiyun 0x20, /* 1c/28 - cdfr */
252*4882a593Smuzhiyun 0x00, /* 1d/29 - res4 */
253*4882a593Smuzhiyun 0x00, /* 1e/30 - cbru */
254*4882a593Smuzhiyun 0x00, /* 1f/31 - cbrl */
255*4882a593Smuzhiyun };
256*4882a593Smuzhiyun
__cs4231_readb(struct snd_cs4231 * cp,void __iomem * reg_addr)257*4882a593Smuzhiyun static u8 __cs4231_readb(struct snd_cs4231 *cp, void __iomem *reg_addr)
258*4882a593Smuzhiyun {
259*4882a593Smuzhiyun if (cp->flags & CS4231_FLAG_EBUS)
260*4882a593Smuzhiyun return readb(reg_addr);
261*4882a593Smuzhiyun else
262*4882a593Smuzhiyun return sbus_readb(reg_addr);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
__cs4231_writeb(struct snd_cs4231 * cp,u8 val,void __iomem * reg_addr)265*4882a593Smuzhiyun static void __cs4231_writeb(struct snd_cs4231 *cp, u8 val,
266*4882a593Smuzhiyun void __iomem *reg_addr)
267*4882a593Smuzhiyun {
268*4882a593Smuzhiyun if (cp->flags & CS4231_FLAG_EBUS)
269*4882a593Smuzhiyun return writeb(val, reg_addr);
270*4882a593Smuzhiyun else
271*4882a593Smuzhiyun return sbus_writeb(val, reg_addr);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /*
275*4882a593Smuzhiyun * Basic I/O functions
276*4882a593Smuzhiyun */
277*4882a593Smuzhiyun
snd_cs4231_ready(struct snd_cs4231 * chip)278*4882a593Smuzhiyun static void snd_cs4231_ready(struct snd_cs4231 *chip)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun int timeout;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun for (timeout = 250; timeout > 0; timeout--) {
283*4882a593Smuzhiyun int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
284*4882a593Smuzhiyun if ((val & CS4231_INIT) == 0)
285*4882a593Smuzhiyun break;
286*4882a593Smuzhiyun udelay(100);
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
snd_cs4231_dout(struct snd_cs4231 * chip,unsigned char reg,unsigned char value)290*4882a593Smuzhiyun static void snd_cs4231_dout(struct snd_cs4231 *chip, unsigned char reg,
291*4882a593Smuzhiyun unsigned char value)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun snd_cs4231_ready(chip);
294*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
295*4882a593Smuzhiyun if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
296*4882a593Smuzhiyun snd_printdd("out: auto calibration time out - reg = 0x%x, "
297*4882a593Smuzhiyun "value = 0x%x\n",
298*4882a593Smuzhiyun reg, value);
299*4882a593Smuzhiyun #endif
300*4882a593Smuzhiyun __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
301*4882a593Smuzhiyun wmb();
302*4882a593Smuzhiyun __cs4231_writeb(chip, value, CS4231U(chip, REG));
303*4882a593Smuzhiyun mb();
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
snd_cs4231_outm(struct snd_cs4231 * chip,unsigned char reg,unsigned char mask,unsigned char value)306*4882a593Smuzhiyun static inline void snd_cs4231_outm(struct snd_cs4231 *chip, unsigned char reg,
307*4882a593Smuzhiyun unsigned char mask, unsigned char value)
308*4882a593Smuzhiyun {
309*4882a593Smuzhiyun unsigned char tmp = (chip->image[reg] & mask) | value;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun chip->image[reg] = tmp;
312*4882a593Smuzhiyun if (!chip->calibrate_mute)
313*4882a593Smuzhiyun snd_cs4231_dout(chip, reg, tmp);
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
snd_cs4231_out(struct snd_cs4231 * chip,unsigned char reg,unsigned char value)316*4882a593Smuzhiyun static void snd_cs4231_out(struct snd_cs4231 *chip, unsigned char reg,
317*4882a593Smuzhiyun unsigned char value)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun snd_cs4231_dout(chip, reg, value);
320*4882a593Smuzhiyun chip->image[reg] = value;
321*4882a593Smuzhiyun mb();
322*4882a593Smuzhiyun }
323*4882a593Smuzhiyun
snd_cs4231_in(struct snd_cs4231 * chip,unsigned char reg)324*4882a593Smuzhiyun static unsigned char snd_cs4231_in(struct snd_cs4231 *chip, unsigned char reg)
325*4882a593Smuzhiyun {
326*4882a593Smuzhiyun snd_cs4231_ready(chip);
327*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
328*4882a593Smuzhiyun if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
329*4882a593Smuzhiyun snd_printdd("in: auto calibration time out - reg = 0x%x\n",
330*4882a593Smuzhiyun reg);
331*4882a593Smuzhiyun #endif
332*4882a593Smuzhiyun __cs4231_writeb(chip, chip->mce_bit | reg, CS4231U(chip, REGSEL));
333*4882a593Smuzhiyun mb();
334*4882a593Smuzhiyun return __cs4231_readb(chip, CS4231U(chip, REG));
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun /*
338*4882a593Smuzhiyun * CS4231 detection / MCE routines
339*4882a593Smuzhiyun */
340*4882a593Smuzhiyun
snd_cs4231_busy_wait(struct snd_cs4231 * chip)341*4882a593Smuzhiyun static void snd_cs4231_busy_wait(struct snd_cs4231 *chip)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun int timeout;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun /* looks like this sequence is proper for CS4231A chip (GUS MAX) */
346*4882a593Smuzhiyun for (timeout = 5; timeout > 0; timeout--)
347*4882a593Smuzhiyun __cs4231_readb(chip, CS4231U(chip, REGSEL));
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun /* end of cleanup sequence */
350*4882a593Smuzhiyun for (timeout = 500; timeout > 0; timeout--) {
351*4882a593Smuzhiyun int val = __cs4231_readb(chip, CS4231U(chip, REGSEL));
352*4882a593Smuzhiyun if ((val & CS4231_INIT) == 0)
353*4882a593Smuzhiyun break;
354*4882a593Smuzhiyun msleep(1);
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
snd_cs4231_mce_up(struct snd_cs4231 * chip)358*4882a593Smuzhiyun static void snd_cs4231_mce_up(struct snd_cs4231 *chip)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun unsigned long flags;
361*4882a593Smuzhiyun int timeout;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
364*4882a593Smuzhiyun snd_cs4231_ready(chip);
365*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
366*4882a593Smuzhiyun if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
367*4882a593Smuzhiyun snd_printdd("mce_up - auto calibration time out (0)\n");
368*4882a593Smuzhiyun #endif
369*4882a593Smuzhiyun chip->mce_bit |= CS4231_MCE;
370*4882a593Smuzhiyun timeout = __cs4231_readb(chip, CS4231U(chip, REGSEL));
371*4882a593Smuzhiyun if (timeout == 0x80)
372*4882a593Smuzhiyun snd_printdd("mce_up [%p]: serious init problem - "
373*4882a593Smuzhiyun "codec still busy\n",
374*4882a593Smuzhiyun chip->port);
375*4882a593Smuzhiyun if (!(timeout & CS4231_MCE))
376*4882a593Smuzhiyun __cs4231_writeb(chip, chip->mce_bit | (timeout & 0x1f),
377*4882a593Smuzhiyun CS4231U(chip, REGSEL));
378*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
snd_cs4231_mce_down(struct snd_cs4231 * chip)381*4882a593Smuzhiyun static void snd_cs4231_mce_down(struct snd_cs4231 *chip)
382*4882a593Smuzhiyun {
383*4882a593Smuzhiyun unsigned long flags, timeout;
384*4882a593Smuzhiyun int reg;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun snd_cs4231_busy_wait(chip);
387*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
388*4882a593Smuzhiyun #ifdef CONFIG_SND_DEBUG
389*4882a593Smuzhiyun if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
390*4882a593Smuzhiyun snd_printdd("mce_down [%p] - auto calibration time out (0)\n",
391*4882a593Smuzhiyun CS4231U(chip, REGSEL));
392*4882a593Smuzhiyun #endif
393*4882a593Smuzhiyun chip->mce_bit &= ~CS4231_MCE;
394*4882a593Smuzhiyun reg = __cs4231_readb(chip, CS4231U(chip, REGSEL));
395*4882a593Smuzhiyun __cs4231_writeb(chip, chip->mce_bit | (reg & 0x1f),
396*4882a593Smuzhiyun CS4231U(chip, REGSEL));
397*4882a593Smuzhiyun if (reg == 0x80)
398*4882a593Smuzhiyun snd_printdd("mce_down [%p]: serious init problem "
399*4882a593Smuzhiyun "- codec still busy\n", chip->port);
400*4882a593Smuzhiyun if ((reg & CS4231_MCE) == 0) {
401*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
402*4882a593Smuzhiyun return;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun /*
406*4882a593Smuzhiyun * Wait for auto-calibration (AC) process to finish, i.e. ACI to go low.
407*4882a593Smuzhiyun */
408*4882a593Smuzhiyun timeout = jiffies + msecs_to_jiffies(250);
409*4882a593Smuzhiyun do {
410*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
411*4882a593Smuzhiyun msleep(1);
412*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
413*4882a593Smuzhiyun reg = snd_cs4231_in(chip, CS4231_TEST_INIT);
414*4882a593Smuzhiyun reg &= CS4231_CALIB_IN_PROGRESS;
415*4882a593Smuzhiyun } while (reg && time_before(jiffies, timeout));
416*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun if (reg)
419*4882a593Smuzhiyun snd_printk(KERN_ERR
420*4882a593Smuzhiyun "mce_down - auto calibration time out (2)\n");
421*4882a593Smuzhiyun }
422*4882a593Smuzhiyun
snd_cs4231_advance_dma(struct cs4231_dma_control * dma_cont,struct snd_pcm_substream * substream,unsigned int * periods_sent)423*4882a593Smuzhiyun static void snd_cs4231_advance_dma(struct cs4231_dma_control *dma_cont,
424*4882a593Smuzhiyun struct snd_pcm_substream *substream,
425*4882a593Smuzhiyun unsigned int *periods_sent)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun while (1) {
430*4882a593Smuzhiyun unsigned int period_size = snd_pcm_lib_period_bytes(substream);
431*4882a593Smuzhiyun unsigned int offset = period_size * (*periods_sent);
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun if (WARN_ON(period_size >= (1 << 24)))
434*4882a593Smuzhiyun return;
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun if (dma_cont->request(dma_cont,
437*4882a593Smuzhiyun runtime->dma_addr + offset, period_size))
438*4882a593Smuzhiyun return;
439*4882a593Smuzhiyun (*periods_sent) = ((*periods_sent) + 1) % runtime->periods;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun }
442*4882a593Smuzhiyun
cs4231_dma_trigger(struct snd_pcm_substream * substream,unsigned int what,int on)443*4882a593Smuzhiyun static void cs4231_dma_trigger(struct snd_pcm_substream *substream,
444*4882a593Smuzhiyun unsigned int what, int on)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
447*4882a593Smuzhiyun struct cs4231_dma_control *dma_cont;
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun if (what & CS4231_PLAYBACK_ENABLE) {
450*4882a593Smuzhiyun dma_cont = &chip->p_dma;
451*4882a593Smuzhiyun if (on) {
452*4882a593Smuzhiyun dma_cont->prepare(dma_cont, 0);
453*4882a593Smuzhiyun dma_cont->enable(dma_cont, 1);
454*4882a593Smuzhiyun snd_cs4231_advance_dma(dma_cont,
455*4882a593Smuzhiyun chip->playback_substream,
456*4882a593Smuzhiyun &chip->p_periods_sent);
457*4882a593Smuzhiyun } else {
458*4882a593Smuzhiyun dma_cont->enable(dma_cont, 0);
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun }
461*4882a593Smuzhiyun if (what & CS4231_RECORD_ENABLE) {
462*4882a593Smuzhiyun dma_cont = &chip->c_dma;
463*4882a593Smuzhiyun if (on) {
464*4882a593Smuzhiyun dma_cont->prepare(dma_cont, 1);
465*4882a593Smuzhiyun dma_cont->enable(dma_cont, 1);
466*4882a593Smuzhiyun snd_cs4231_advance_dma(dma_cont,
467*4882a593Smuzhiyun chip->capture_substream,
468*4882a593Smuzhiyun &chip->c_periods_sent);
469*4882a593Smuzhiyun } else {
470*4882a593Smuzhiyun dma_cont->enable(dma_cont, 0);
471*4882a593Smuzhiyun }
472*4882a593Smuzhiyun }
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
snd_cs4231_trigger(struct snd_pcm_substream * substream,int cmd)475*4882a593Smuzhiyun static int snd_cs4231_trigger(struct snd_pcm_substream *substream, int cmd)
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
478*4882a593Smuzhiyun int result = 0;
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun switch (cmd) {
481*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_START:
482*4882a593Smuzhiyun case SNDRV_PCM_TRIGGER_STOP:
483*4882a593Smuzhiyun {
484*4882a593Smuzhiyun unsigned int what = 0;
485*4882a593Smuzhiyun struct snd_pcm_substream *s;
486*4882a593Smuzhiyun unsigned long flags;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun snd_pcm_group_for_each_entry(s, substream) {
489*4882a593Smuzhiyun if (s == chip->playback_substream) {
490*4882a593Smuzhiyun what |= CS4231_PLAYBACK_ENABLE;
491*4882a593Smuzhiyun snd_pcm_trigger_done(s, substream);
492*4882a593Smuzhiyun } else if (s == chip->capture_substream) {
493*4882a593Smuzhiyun what |= CS4231_RECORD_ENABLE;
494*4882a593Smuzhiyun snd_pcm_trigger_done(s, substream);
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun }
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
499*4882a593Smuzhiyun if (cmd == SNDRV_PCM_TRIGGER_START) {
500*4882a593Smuzhiyun cs4231_dma_trigger(substream, what, 1);
501*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] |= what;
502*4882a593Smuzhiyun } else {
503*4882a593Smuzhiyun cs4231_dma_trigger(substream, what, 0);
504*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] &= ~what;
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IFACE_CTRL,
507*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL]);
508*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
509*4882a593Smuzhiyun break;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun default:
512*4882a593Smuzhiyun result = -EINVAL;
513*4882a593Smuzhiyun break;
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun return result;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /*
520*4882a593Smuzhiyun * CODEC I/O
521*4882a593Smuzhiyun */
522*4882a593Smuzhiyun
snd_cs4231_get_rate(unsigned int rate)523*4882a593Smuzhiyun static unsigned char snd_cs4231_get_rate(unsigned int rate)
524*4882a593Smuzhiyun {
525*4882a593Smuzhiyun int i;
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun for (i = 0; i < 14; i++)
528*4882a593Smuzhiyun if (rate == rates[i])
529*4882a593Smuzhiyun return freq_bits[i];
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun return freq_bits[13];
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun
snd_cs4231_get_format(struct snd_cs4231 * chip,int format,int channels)534*4882a593Smuzhiyun static unsigned char snd_cs4231_get_format(struct snd_cs4231 *chip, int format,
535*4882a593Smuzhiyun int channels)
536*4882a593Smuzhiyun {
537*4882a593Smuzhiyun unsigned char rformat;
538*4882a593Smuzhiyun
539*4882a593Smuzhiyun rformat = CS4231_LINEAR_8;
540*4882a593Smuzhiyun switch (format) {
541*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_MU_LAW:
542*4882a593Smuzhiyun rformat = CS4231_ULAW_8;
543*4882a593Smuzhiyun break;
544*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_A_LAW:
545*4882a593Smuzhiyun rformat = CS4231_ALAW_8;
546*4882a593Smuzhiyun break;
547*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S16_LE:
548*4882a593Smuzhiyun rformat = CS4231_LINEAR_16;
549*4882a593Smuzhiyun break;
550*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_S16_BE:
551*4882a593Smuzhiyun rformat = CS4231_LINEAR_16_BIG;
552*4882a593Smuzhiyun break;
553*4882a593Smuzhiyun case SNDRV_PCM_FORMAT_IMA_ADPCM:
554*4882a593Smuzhiyun rformat = CS4231_ADPCM_16;
555*4882a593Smuzhiyun break;
556*4882a593Smuzhiyun }
557*4882a593Smuzhiyun if (channels > 1)
558*4882a593Smuzhiyun rformat |= CS4231_STEREO;
559*4882a593Smuzhiyun return rformat;
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun
snd_cs4231_calibrate_mute(struct snd_cs4231 * chip,int mute)562*4882a593Smuzhiyun static void snd_cs4231_calibrate_mute(struct snd_cs4231 *chip, int mute)
563*4882a593Smuzhiyun {
564*4882a593Smuzhiyun unsigned long flags;
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun mute = mute ? 1 : 0;
567*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
568*4882a593Smuzhiyun if (chip->calibrate_mute == mute) {
569*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
570*4882a593Smuzhiyun return;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun if (!mute) {
573*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_LEFT_INPUT,
574*4882a593Smuzhiyun chip->image[CS4231_LEFT_INPUT]);
575*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_RIGHT_INPUT,
576*4882a593Smuzhiyun chip->image[CS4231_RIGHT_INPUT]);
577*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_LOOPBACK,
578*4882a593Smuzhiyun chip->image[CS4231_LOOPBACK]);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT,
581*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
582*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT,
583*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
584*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT,
585*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
586*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT,
587*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
588*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT,
589*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
590*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT,
591*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
592*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN,
593*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
594*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN,
595*4882a593Smuzhiyun mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
596*4882a593Smuzhiyun snd_cs4231_dout(chip, CS4231_MONO_CTRL,
597*4882a593Smuzhiyun mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
598*4882a593Smuzhiyun chip->calibrate_mute = mute;
599*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun
snd_cs4231_playback_format(struct snd_cs4231 * chip,struct snd_pcm_hw_params * params,unsigned char pdfr)602*4882a593Smuzhiyun static void snd_cs4231_playback_format(struct snd_cs4231 *chip,
603*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
604*4882a593Smuzhiyun unsigned char pdfr)
605*4882a593Smuzhiyun {
606*4882a593Smuzhiyun unsigned long flags;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun mutex_lock(&chip->mce_mutex);
609*4882a593Smuzhiyun snd_cs4231_calibrate_mute(chip, 1);
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
612*4882a593Smuzhiyun
613*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
614*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
615*4882a593Smuzhiyun (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
616*4882a593Smuzhiyun (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
617*4882a593Smuzhiyun pdfr);
618*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun snd_cs4231_calibrate_mute(chip, 0);
623*4882a593Smuzhiyun mutex_unlock(&chip->mce_mutex);
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun
snd_cs4231_capture_format(struct snd_cs4231 * chip,struct snd_pcm_hw_params * params,unsigned char cdfr)626*4882a593Smuzhiyun static void snd_cs4231_capture_format(struct snd_cs4231 *chip,
627*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
628*4882a593Smuzhiyun unsigned char cdfr)
629*4882a593Smuzhiyun {
630*4882a593Smuzhiyun unsigned long flags;
631*4882a593Smuzhiyun
632*4882a593Smuzhiyun mutex_lock(&chip->mce_mutex);
633*4882a593Smuzhiyun snd_cs4231_calibrate_mute(chip, 1);
634*4882a593Smuzhiyun
635*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
638*4882a593Smuzhiyun if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
639*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
640*4882a593Smuzhiyun ((chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
641*4882a593Smuzhiyun (cdfr & 0x0f));
642*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
643*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
644*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
645*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
646*4882a593Smuzhiyun }
647*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
648*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
651*4882a593Smuzhiyun
652*4882a593Smuzhiyun snd_cs4231_calibrate_mute(chip, 0);
653*4882a593Smuzhiyun mutex_unlock(&chip->mce_mutex);
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun /*
657*4882a593Smuzhiyun * Timer interface
658*4882a593Smuzhiyun */
659*4882a593Smuzhiyun
snd_cs4231_timer_resolution(struct snd_timer * timer)660*4882a593Smuzhiyun static unsigned long snd_cs4231_timer_resolution(struct snd_timer *timer)
661*4882a593Smuzhiyun {
662*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_timer_chip(timer);
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
665*4882a593Smuzhiyun }
666*4882a593Smuzhiyun
snd_cs4231_timer_start(struct snd_timer * timer)667*4882a593Smuzhiyun static int snd_cs4231_timer_start(struct snd_timer *timer)
668*4882a593Smuzhiyun {
669*4882a593Smuzhiyun unsigned long flags;
670*4882a593Smuzhiyun unsigned int ticks;
671*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_timer_chip(timer);
672*4882a593Smuzhiyun
673*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
674*4882a593Smuzhiyun ticks = timer->sticks;
675*4882a593Smuzhiyun if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
676*4882a593Smuzhiyun (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
677*4882a593Smuzhiyun (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
678*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_TIMER_HIGH,
679*4882a593Smuzhiyun chip->image[CS4231_TIMER_HIGH] =
680*4882a593Smuzhiyun (unsigned char) (ticks >> 8));
681*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_TIMER_LOW,
682*4882a593Smuzhiyun chip->image[CS4231_TIMER_LOW] =
683*4882a593Smuzhiyun (unsigned char) ticks);
684*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
685*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_1] |
686*4882a593Smuzhiyun CS4231_TIMER_ENABLE);
687*4882a593Smuzhiyun }
688*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
689*4882a593Smuzhiyun
690*4882a593Smuzhiyun return 0;
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun
snd_cs4231_timer_stop(struct snd_timer * timer)693*4882a593Smuzhiyun static int snd_cs4231_timer_stop(struct snd_timer *timer)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun unsigned long flags;
696*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_timer_chip(timer);
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
699*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE;
700*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
701*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_1]);
702*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
703*4882a593Smuzhiyun
704*4882a593Smuzhiyun return 0;
705*4882a593Smuzhiyun }
706*4882a593Smuzhiyun
snd_cs4231_init(struct snd_cs4231 * chip)707*4882a593Smuzhiyun static void snd_cs4231_init(struct snd_cs4231 *chip)
708*4882a593Smuzhiyun {
709*4882a593Smuzhiyun unsigned long flags;
710*4882a593Smuzhiyun
711*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun #ifdef SNDRV_DEBUG_MCE
714*4882a593Smuzhiyun snd_printdd("init: (1)\n");
715*4882a593Smuzhiyun #endif
716*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
717*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
718*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
719*4882a593Smuzhiyun CS4231_PLAYBACK_PIO |
720*4882a593Smuzhiyun CS4231_RECORD_ENABLE |
721*4882a593Smuzhiyun CS4231_RECORD_PIO |
722*4882a593Smuzhiyun CS4231_CALIB_MODE);
723*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
724*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
725*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
726*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun #ifdef SNDRV_DEBUG_MCE
729*4882a593Smuzhiyun snd_printdd("init: (2)\n");
730*4882a593Smuzhiyun #endif
731*4882a593Smuzhiyun
732*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
733*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
734*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_ALT_FEATURE_1,
735*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_1]);
736*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
737*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
738*4882a593Smuzhiyun
739*4882a593Smuzhiyun #ifdef SNDRV_DEBUG_MCE
740*4882a593Smuzhiyun snd_printdd("init: (3) - afei = 0x%x\n",
741*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_1]);
742*4882a593Smuzhiyun #endif
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
745*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_ALT_FEATURE_2,
746*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_2]);
747*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
748*4882a593Smuzhiyun
749*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
750*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
751*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
752*4882a593Smuzhiyun chip->image[CS4231_PLAYBK_FORMAT]);
753*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
754*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
755*4882a593Smuzhiyun
756*4882a593Smuzhiyun #ifdef SNDRV_DEBUG_MCE
757*4882a593Smuzhiyun snd_printdd("init: (4)\n");
758*4882a593Smuzhiyun #endif
759*4882a593Smuzhiyun
760*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
761*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
762*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
763*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
764*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun #ifdef SNDRV_DEBUG_MCE
767*4882a593Smuzhiyun snd_printdd("init: (5)\n");
768*4882a593Smuzhiyun #endif
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun
snd_cs4231_open(struct snd_cs4231 * chip,unsigned int mode)771*4882a593Smuzhiyun static int snd_cs4231_open(struct snd_cs4231 *chip, unsigned int mode)
772*4882a593Smuzhiyun {
773*4882a593Smuzhiyun unsigned long flags;
774*4882a593Smuzhiyun
775*4882a593Smuzhiyun mutex_lock(&chip->open_mutex);
776*4882a593Smuzhiyun if ((chip->mode & mode)) {
777*4882a593Smuzhiyun mutex_unlock(&chip->open_mutex);
778*4882a593Smuzhiyun return -EAGAIN;
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun if (chip->mode & CS4231_MODE_OPEN) {
781*4882a593Smuzhiyun chip->mode |= mode;
782*4882a593Smuzhiyun mutex_unlock(&chip->open_mutex);
783*4882a593Smuzhiyun return 0;
784*4882a593Smuzhiyun }
785*4882a593Smuzhiyun /* ok. now enable and ack CODEC IRQ */
786*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
787*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
788*4882a593Smuzhiyun CS4231_RECORD_IRQ |
789*4882a593Smuzhiyun CS4231_TIMER_IRQ);
790*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
791*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
792*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
793*4882a593Smuzhiyun
794*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
795*4882a593Smuzhiyun CS4231_RECORD_IRQ |
796*4882a593Smuzhiyun CS4231_TIMER_IRQ);
797*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun chip->mode = mode;
802*4882a593Smuzhiyun mutex_unlock(&chip->open_mutex);
803*4882a593Smuzhiyun return 0;
804*4882a593Smuzhiyun }
805*4882a593Smuzhiyun
snd_cs4231_close(struct snd_cs4231 * chip,unsigned int mode)806*4882a593Smuzhiyun static void snd_cs4231_close(struct snd_cs4231 *chip, unsigned int mode)
807*4882a593Smuzhiyun {
808*4882a593Smuzhiyun unsigned long flags;
809*4882a593Smuzhiyun
810*4882a593Smuzhiyun mutex_lock(&chip->open_mutex);
811*4882a593Smuzhiyun chip->mode &= ~mode;
812*4882a593Smuzhiyun if (chip->mode & CS4231_MODE_OPEN) {
813*4882a593Smuzhiyun mutex_unlock(&chip->open_mutex);
814*4882a593Smuzhiyun return;
815*4882a593Smuzhiyun }
816*4882a593Smuzhiyun snd_cs4231_calibrate_mute(chip, 1);
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun /* disable IRQ */
819*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
820*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
821*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
822*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
823*4882a593Smuzhiyun
824*4882a593Smuzhiyun /* now disable record & playback */
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun if (chip->image[CS4231_IFACE_CTRL] &
827*4882a593Smuzhiyun (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
828*4882a593Smuzhiyun CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
829*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
830*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
831*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
832*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] &=
833*4882a593Smuzhiyun ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
834*4882a593Smuzhiyun CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
835*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IFACE_CTRL,
836*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL]);
837*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
838*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
839*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun /* clear IRQ again */
843*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
844*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
845*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS)); /* clear IRQ */
846*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun snd_cs4231_calibrate_mute(chip, 0);
849*4882a593Smuzhiyun
850*4882a593Smuzhiyun chip->mode = 0;
851*4882a593Smuzhiyun mutex_unlock(&chip->open_mutex);
852*4882a593Smuzhiyun }
853*4882a593Smuzhiyun
854*4882a593Smuzhiyun /*
855*4882a593Smuzhiyun * timer open/close
856*4882a593Smuzhiyun */
857*4882a593Smuzhiyun
snd_cs4231_timer_open(struct snd_timer * timer)858*4882a593Smuzhiyun static int snd_cs4231_timer_open(struct snd_timer *timer)
859*4882a593Smuzhiyun {
860*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_timer_chip(timer);
861*4882a593Smuzhiyun snd_cs4231_open(chip, CS4231_MODE_TIMER);
862*4882a593Smuzhiyun return 0;
863*4882a593Smuzhiyun }
864*4882a593Smuzhiyun
snd_cs4231_timer_close(struct snd_timer * timer)865*4882a593Smuzhiyun static int snd_cs4231_timer_close(struct snd_timer *timer)
866*4882a593Smuzhiyun {
867*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_timer_chip(timer);
868*4882a593Smuzhiyun snd_cs4231_close(chip, CS4231_MODE_TIMER);
869*4882a593Smuzhiyun return 0;
870*4882a593Smuzhiyun }
871*4882a593Smuzhiyun
872*4882a593Smuzhiyun static const struct snd_timer_hardware snd_cs4231_timer_table = {
873*4882a593Smuzhiyun .flags = SNDRV_TIMER_HW_AUTO,
874*4882a593Smuzhiyun .resolution = 9945,
875*4882a593Smuzhiyun .ticks = 65535,
876*4882a593Smuzhiyun .open = snd_cs4231_timer_open,
877*4882a593Smuzhiyun .close = snd_cs4231_timer_close,
878*4882a593Smuzhiyun .c_resolution = snd_cs4231_timer_resolution,
879*4882a593Smuzhiyun .start = snd_cs4231_timer_start,
880*4882a593Smuzhiyun .stop = snd_cs4231_timer_stop,
881*4882a593Smuzhiyun };
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun /*
884*4882a593Smuzhiyun * ok.. exported functions..
885*4882a593Smuzhiyun */
886*4882a593Smuzhiyun
snd_cs4231_playback_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)887*4882a593Smuzhiyun static int snd_cs4231_playback_hw_params(struct snd_pcm_substream *substream,
888*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
889*4882a593Smuzhiyun {
890*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
891*4882a593Smuzhiyun unsigned char new_pdfr;
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params),
894*4882a593Smuzhiyun params_channels(hw_params)) |
895*4882a593Smuzhiyun snd_cs4231_get_rate(params_rate(hw_params));
896*4882a593Smuzhiyun snd_cs4231_playback_format(chip, hw_params, new_pdfr);
897*4882a593Smuzhiyun
898*4882a593Smuzhiyun return 0;
899*4882a593Smuzhiyun }
900*4882a593Smuzhiyun
snd_cs4231_playback_prepare(struct snd_pcm_substream * substream)901*4882a593Smuzhiyun static int snd_cs4231_playback_prepare(struct snd_pcm_substream *substream)
902*4882a593Smuzhiyun {
903*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
904*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
905*4882a593Smuzhiyun unsigned long flags;
906*4882a593Smuzhiyun int ret = 0;
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE |
911*4882a593Smuzhiyun CS4231_PLAYBACK_PIO);
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun if (WARN_ON(runtime->period_size > 0xffff + 1)) {
914*4882a593Smuzhiyun ret = -EINVAL;
915*4882a593Smuzhiyun goto out;
916*4882a593Smuzhiyun }
917*4882a593Smuzhiyun
918*4882a593Smuzhiyun chip->p_periods_sent = 0;
919*4882a593Smuzhiyun
920*4882a593Smuzhiyun out:
921*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
922*4882a593Smuzhiyun
923*4882a593Smuzhiyun return ret;
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun
snd_cs4231_capture_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * hw_params)926*4882a593Smuzhiyun static int snd_cs4231_capture_hw_params(struct snd_pcm_substream *substream,
927*4882a593Smuzhiyun struct snd_pcm_hw_params *hw_params)
928*4882a593Smuzhiyun {
929*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
930*4882a593Smuzhiyun unsigned char new_cdfr;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params),
933*4882a593Smuzhiyun params_channels(hw_params)) |
934*4882a593Smuzhiyun snd_cs4231_get_rate(params_rate(hw_params));
935*4882a593Smuzhiyun snd_cs4231_capture_format(chip, hw_params, new_cdfr);
936*4882a593Smuzhiyun
937*4882a593Smuzhiyun return 0;
938*4882a593Smuzhiyun }
939*4882a593Smuzhiyun
snd_cs4231_capture_prepare(struct snd_pcm_substream * substream)940*4882a593Smuzhiyun static int snd_cs4231_capture_prepare(struct snd_pcm_substream *substream)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
943*4882a593Smuzhiyun unsigned long flags;
944*4882a593Smuzhiyun
945*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
946*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE |
947*4882a593Smuzhiyun CS4231_RECORD_PIO);
948*4882a593Smuzhiyun
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun chip->c_periods_sent = 0;
951*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun return 0;
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun
snd_cs4231_overrange(struct snd_cs4231 * chip)956*4882a593Smuzhiyun static void snd_cs4231_overrange(struct snd_cs4231 *chip)
957*4882a593Smuzhiyun {
958*4882a593Smuzhiyun unsigned long flags;
959*4882a593Smuzhiyun unsigned char res;
960*4882a593Smuzhiyun
961*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
962*4882a593Smuzhiyun res = snd_cs4231_in(chip, CS4231_TEST_INIT);
963*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun /* detect overrange only above 0dB; may be user selectable? */
966*4882a593Smuzhiyun if (res & (0x08 | 0x02))
967*4882a593Smuzhiyun chip->capture_substream->runtime->overrange++;
968*4882a593Smuzhiyun }
969*4882a593Smuzhiyun
snd_cs4231_play_callback(struct snd_cs4231 * chip)970*4882a593Smuzhiyun static void snd_cs4231_play_callback(struct snd_cs4231 *chip)
971*4882a593Smuzhiyun {
972*4882a593Smuzhiyun if (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE) {
973*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->playback_substream);
974*4882a593Smuzhiyun snd_cs4231_advance_dma(&chip->p_dma, chip->playback_substream,
975*4882a593Smuzhiyun &chip->p_periods_sent);
976*4882a593Smuzhiyun }
977*4882a593Smuzhiyun }
978*4882a593Smuzhiyun
snd_cs4231_capture_callback(struct snd_cs4231 * chip)979*4882a593Smuzhiyun static void snd_cs4231_capture_callback(struct snd_cs4231 *chip)
980*4882a593Smuzhiyun {
981*4882a593Smuzhiyun if (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) {
982*4882a593Smuzhiyun snd_pcm_period_elapsed(chip->capture_substream);
983*4882a593Smuzhiyun snd_cs4231_advance_dma(&chip->c_dma, chip->capture_substream,
984*4882a593Smuzhiyun &chip->c_periods_sent);
985*4882a593Smuzhiyun }
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun
snd_cs4231_playback_pointer(struct snd_pcm_substream * substream)988*4882a593Smuzhiyun static snd_pcm_uframes_t snd_cs4231_playback_pointer(
989*4882a593Smuzhiyun struct snd_pcm_substream *substream)
990*4882a593Smuzhiyun {
991*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
992*4882a593Smuzhiyun struct cs4231_dma_control *dma_cont = &chip->p_dma;
993*4882a593Smuzhiyun size_t ptr;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
996*4882a593Smuzhiyun return 0;
997*4882a593Smuzhiyun ptr = dma_cont->address(dma_cont);
998*4882a593Smuzhiyun if (ptr != 0)
999*4882a593Smuzhiyun ptr -= substream->runtime->dma_addr;
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun return bytes_to_frames(substream->runtime, ptr);
1002*4882a593Smuzhiyun }
1003*4882a593Smuzhiyun
snd_cs4231_capture_pointer(struct snd_pcm_substream * substream)1004*4882a593Smuzhiyun static snd_pcm_uframes_t snd_cs4231_capture_pointer(
1005*4882a593Smuzhiyun struct snd_pcm_substream *substream)
1006*4882a593Smuzhiyun {
1007*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1008*4882a593Smuzhiyun struct cs4231_dma_control *dma_cont = &chip->c_dma;
1009*4882a593Smuzhiyun size_t ptr;
1010*4882a593Smuzhiyun
1011*4882a593Smuzhiyun if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1012*4882a593Smuzhiyun return 0;
1013*4882a593Smuzhiyun ptr = dma_cont->address(dma_cont);
1014*4882a593Smuzhiyun if (ptr != 0)
1015*4882a593Smuzhiyun ptr -= substream->runtime->dma_addr;
1016*4882a593Smuzhiyun
1017*4882a593Smuzhiyun return bytes_to_frames(substream->runtime, ptr);
1018*4882a593Smuzhiyun }
1019*4882a593Smuzhiyun
snd_cs4231_probe(struct snd_cs4231 * chip)1020*4882a593Smuzhiyun static int snd_cs4231_probe(struct snd_cs4231 *chip)
1021*4882a593Smuzhiyun {
1022*4882a593Smuzhiyun unsigned long flags;
1023*4882a593Smuzhiyun int i;
1024*4882a593Smuzhiyun int id = 0;
1025*4882a593Smuzhiyun int vers = 0;
1026*4882a593Smuzhiyun unsigned char *ptr;
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun for (i = 0; i < 50; i++) {
1029*4882a593Smuzhiyun mb();
1030*4882a593Smuzhiyun if (__cs4231_readb(chip, CS4231U(chip, REGSEL)) & CS4231_INIT)
1031*4882a593Smuzhiyun msleep(2);
1032*4882a593Smuzhiyun else {
1033*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1034*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1035*4882a593Smuzhiyun id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1036*4882a593Smuzhiyun vers = snd_cs4231_in(chip, CS4231_VERSION);
1037*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1038*4882a593Smuzhiyun if (id == 0x0a)
1039*4882a593Smuzhiyun break; /* this is valid value */
1040*4882a593Smuzhiyun }
1041*4882a593Smuzhiyun }
1042*4882a593Smuzhiyun snd_printdd("cs4231: port = %p, id = 0x%x\n", chip->port, id);
1043*4882a593Smuzhiyun if (id != 0x0a)
1044*4882a593Smuzhiyun return -ENODEV; /* no valid device found */
1045*4882a593Smuzhiyun
1046*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun /* clear any pendings IRQ */
1049*4882a593Smuzhiyun __cs4231_readb(chip, CS4231U(chip, STATUS));
1050*4882a593Smuzhiyun __cs4231_writeb(chip, 0, CS4231U(chip, STATUS));
1051*4882a593Smuzhiyun mb();
1052*4882a593Smuzhiyun
1053*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1056*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] =
1057*4882a593Smuzhiyun chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA;
1058*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1059*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_2] = 0x01;
1060*4882a593Smuzhiyun if (vers & 0x20)
1061*4882a593Smuzhiyun chip->image[CS4231_ALT_FEATURE_2] |= 0x02;
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun ptr = (unsigned char *) &chip->image;
1064*4882a593Smuzhiyun
1065*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1068*4882a593Smuzhiyun
1069*4882a593Smuzhiyun for (i = 0; i < 32; i++) /* ok.. fill all CS4231 registers */
1070*4882a593Smuzhiyun snd_cs4231_out(chip, i, *ptr++);
1071*4882a593Smuzhiyun
1072*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1073*4882a593Smuzhiyun
1074*4882a593Smuzhiyun snd_cs4231_mce_up(chip);
1075*4882a593Smuzhiyun
1076*4882a593Smuzhiyun snd_cs4231_mce_down(chip);
1077*4882a593Smuzhiyun
1078*4882a593Smuzhiyun mdelay(2);
1079*4882a593Smuzhiyun
1080*4882a593Smuzhiyun return 0; /* all things are ok.. */
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_cs4231_playback = {
1084*4882a593Smuzhiyun .info = SNDRV_PCM_INFO_MMAP |
1085*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED |
1086*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
1087*4882a593Smuzhiyun SNDRV_PCM_INFO_SYNC_START,
1088*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1089*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_A_LAW |
1090*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_IMA_ADPCM |
1091*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_U8 |
1092*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_LE |
1093*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_BE,
1094*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_KNOT |
1095*4882a593Smuzhiyun SNDRV_PCM_RATE_8000_48000,
1096*4882a593Smuzhiyun .rate_min = 5510,
1097*4882a593Smuzhiyun .rate_max = 48000,
1098*4882a593Smuzhiyun .channels_min = 1,
1099*4882a593Smuzhiyun .channels_max = 2,
1100*4882a593Smuzhiyun .buffer_bytes_max = 32 * 1024,
1101*4882a593Smuzhiyun .period_bytes_min = 64,
1102*4882a593Smuzhiyun .period_bytes_max = 32 * 1024,
1103*4882a593Smuzhiyun .periods_min = 1,
1104*4882a593Smuzhiyun .periods_max = 1024,
1105*4882a593Smuzhiyun };
1106*4882a593Smuzhiyun
1107*4882a593Smuzhiyun static const struct snd_pcm_hardware snd_cs4231_capture = {
1108*4882a593Smuzhiyun .info = SNDRV_PCM_INFO_MMAP |
1109*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED |
1110*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
1111*4882a593Smuzhiyun SNDRV_PCM_INFO_SYNC_START,
1112*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_MU_LAW |
1113*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_A_LAW |
1114*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_IMA_ADPCM |
1115*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_U8 |
1116*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_LE |
1117*4882a593Smuzhiyun SNDRV_PCM_FMTBIT_S16_BE,
1118*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_KNOT |
1119*4882a593Smuzhiyun SNDRV_PCM_RATE_8000_48000,
1120*4882a593Smuzhiyun .rate_min = 5510,
1121*4882a593Smuzhiyun .rate_max = 48000,
1122*4882a593Smuzhiyun .channels_min = 1,
1123*4882a593Smuzhiyun .channels_max = 2,
1124*4882a593Smuzhiyun .buffer_bytes_max = 32 * 1024,
1125*4882a593Smuzhiyun .period_bytes_min = 64,
1126*4882a593Smuzhiyun .period_bytes_max = 32 * 1024,
1127*4882a593Smuzhiyun .periods_min = 1,
1128*4882a593Smuzhiyun .periods_max = 1024,
1129*4882a593Smuzhiyun };
1130*4882a593Smuzhiyun
snd_cs4231_playback_open(struct snd_pcm_substream * substream)1131*4882a593Smuzhiyun static int snd_cs4231_playback_open(struct snd_pcm_substream *substream)
1132*4882a593Smuzhiyun {
1133*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1134*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
1135*4882a593Smuzhiyun int err;
1136*4882a593Smuzhiyun
1137*4882a593Smuzhiyun runtime->hw = snd_cs4231_playback;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun err = snd_cs4231_open(chip, CS4231_MODE_PLAY);
1140*4882a593Smuzhiyun if (err < 0)
1141*4882a593Smuzhiyun return err;
1142*4882a593Smuzhiyun chip->playback_substream = substream;
1143*4882a593Smuzhiyun chip->p_periods_sent = 0;
1144*4882a593Smuzhiyun snd_pcm_set_sync(substream);
1145*4882a593Smuzhiyun snd_cs4231_xrate(runtime);
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun return 0;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun
snd_cs4231_capture_open(struct snd_pcm_substream * substream)1150*4882a593Smuzhiyun static int snd_cs4231_capture_open(struct snd_pcm_substream *substream)
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1153*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
1154*4882a593Smuzhiyun int err;
1155*4882a593Smuzhiyun
1156*4882a593Smuzhiyun runtime->hw = snd_cs4231_capture;
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun err = snd_cs4231_open(chip, CS4231_MODE_RECORD);
1159*4882a593Smuzhiyun if (err < 0)
1160*4882a593Smuzhiyun return err;
1161*4882a593Smuzhiyun chip->capture_substream = substream;
1162*4882a593Smuzhiyun chip->c_periods_sent = 0;
1163*4882a593Smuzhiyun snd_pcm_set_sync(substream);
1164*4882a593Smuzhiyun snd_cs4231_xrate(runtime);
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun return 0;
1167*4882a593Smuzhiyun }
1168*4882a593Smuzhiyun
snd_cs4231_playback_close(struct snd_pcm_substream * substream)1169*4882a593Smuzhiyun static int snd_cs4231_playback_close(struct snd_pcm_substream *substream)
1170*4882a593Smuzhiyun {
1171*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1172*4882a593Smuzhiyun
1173*4882a593Smuzhiyun snd_cs4231_close(chip, CS4231_MODE_PLAY);
1174*4882a593Smuzhiyun chip->playback_substream = NULL;
1175*4882a593Smuzhiyun
1176*4882a593Smuzhiyun return 0;
1177*4882a593Smuzhiyun }
1178*4882a593Smuzhiyun
snd_cs4231_capture_close(struct snd_pcm_substream * substream)1179*4882a593Smuzhiyun static int snd_cs4231_capture_close(struct snd_pcm_substream *substream)
1180*4882a593Smuzhiyun {
1181*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_pcm_substream_chip(substream);
1182*4882a593Smuzhiyun
1183*4882a593Smuzhiyun snd_cs4231_close(chip, CS4231_MODE_RECORD);
1184*4882a593Smuzhiyun chip->capture_substream = NULL;
1185*4882a593Smuzhiyun
1186*4882a593Smuzhiyun return 0;
1187*4882a593Smuzhiyun }
1188*4882a593Smuzhiyun
1189*4882a593Smuzhiyun /* XXX We can do some power-management, in particular on EBUS using
1190*4882a593Smuzhiyun * XXX the audio AUXIO register...
1191*4882a593Smuzhiyun */
1192*4882a593Smuzhiyun
1193*4882a593Smuzhiyun static const struct snd_pcm_ops snd_cs4231_playback_ops = {
1194*4882a593Smuzhiyun .open = snd_cs4231_playback_open,
1195*4882a593Smuzhiyun .close = snd_cs4231_playback_close,
1196*4882a593Smuzhiyun .hw_params = snd_cs4231_playback_hw_params,
1197*4882a593Smuzhiyun .prepare = snd_cs4231_playback_prepare,
1198*4882a593Smuzhiyun .trigger = snd_cs4231_trigger,
1199*4882a593Smuzhiyun .pointer = snd_cs4231_playback_pointer,
1200*4882a593Smuzhiyun };
1201*4882a593Smuzhiyun
1202*4882a593Smuzhiyun static const struct snd_pcm_ops snd_cs4231_capture_ops = {
1203*4882a593Smuzhiyun .open = snd_cs4231_capture_open,
1204*4882a593Smuzhiyun .close = snd_cs4231_capture_close,
1205*4882a593Smuzhiyun .hw_params = snd_cs4231_capture_hw_params,
1206*4882a593Smuzhiyun .prepare = snd_cs4231_capture_prepare,
1207*4882a593Smuzhiyun .trigger = snd_cs4231_trigger,
1208*4882a593Smuzhiyun .pointer = snd_cs4231_capture_pointer,
1209*4882a593Smuzhiyun };
1210*4882a593Smuzhiyun
snd_cs4231_pcm(struct snd_card * card)1211*4882a593Smuzhiyun static int snd_cs4231_pcm(struct snd_card *card)
1212*4882a593Smuzhiyun {
1213*4882a593Smuzhiyun struct snd_cs4231 *chip = card->private_data;
1214*4882a593Smuzhiyun struct snd_pcm *pcm;
1215*4882a593Smuzhiyun int err;
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun err = snd_pcm_new(card, "CS4231", 0, 1, 1, &pcm);
1218*4882a593Smuzhiyun if (err < 0)
1219*4882a593Smuzhiyun return err;
1220*4882a593Smuzhiyun
1221*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
1222*4882a593Smuzhiyun &snd_cs4231_playback_ops);
1223*4882a593Smuzhiyun snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
1224*4882a593Smuzhiyun &snd_cs4231_capture_ops);
1225*4882a593Smuzhiyun
1226*4882a593Smuzhiyun /* global setup */
1227*4882a593Smuzhiyun pcm->private_data = chip;
1228*4882a593Smuzhiyun pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1229*4882a593Smuzhiyun strcpy(pcm->name, "CS4231");
1230*4882a593Smuzhiyun
1231*4882a593Smuzhiyun snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
1232*4882a593Smuzhiyun &chip->op->dev, 64 * 1024, 128 * 1024);
1233*4882a593Smuzhiyun
1234*4882a593Smuzhiyun chip->pcm = pcm;
1235*4882a593Smuzhiyun
1236*4882a593Smuzhiyun return 0;
1237*4882a593Smuzhiyun }
1238*4882a593Smuzhiyun
snd_cs4231_timer(struct snd_card * card)1239*4882a593Smuzhiyun static int snd_cs4231_timer(struct snd_card *card)
1240*4882a593Smuzhiyun {
1241*4882a593Smuzhiyun struct snd_cs4231 *chip = card->private_data;
1242*4882a593Smuzhiyun struct snd_timer *timer;
1243*4882a593Smuzhiyun struct snd_timer_id tid;
1244*4882a593Smuzhiyun int err;
1245*4882a593Smuzhiyun
1246*4882a593Smuzhiyun /* Timer initialization */
1247*4882a593Smuzhiyun tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1248*4882a593Smuzhiyun tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1249*4882a593Smuzhiyun tid.card = card->number;
1250*4882a593Smuzhiyun tid.device = 0;
1251*4882a593Smuzhiyun tid.subdevice = 0;
1252*4882a593Smuzhiyun err = snd_timer_new(card, "CS4231", &tid, &timer);
1253*4882a593Smuzhiyun if (err < 0)
1254*4882a593Smuzhiyun return err;
1255*4882a593Smuzhiyun strcpy(timer->name, "CS4231");
1256*4882a593Smuzhiyun timer->private_data = chip;
1257*4882a593Smuzhiyun timer->hw = snd_cs4231_timer_table;
1258*4882a593Smuzhiyun chip->timer = timer;
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun return 0;
1261*4882a593Smuzhiyun }
1262*4882a593Smuzhiyun
1263*4882a593Smuzhiyun /*
1264*4882a593Smuzhiyun * MIXER part
1265*4882a593Smuzhiyun */
1266*4882a593Smuzhiyun
snd_cs4231_info_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1267*4882a593Smuzhiyun static int snd_cs4231_info_mux(struct snd_kcontrol *kcontrol,
1268*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
1269*4882a593Smuzhiyun {
1270*4882a593Smuzhiyun static const char * const texts[4] = {
1271*4882a593Smuzhiyun "Line", "CD", "Mic", "Mix"
1272*4882a593Smuzhiyun };
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun return snd_ctl_enum_info(uinfo, 2, 4, texts);
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun
snd_cs4231_get_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1277*4882a593Smuzhiyun static int snd_cs4231_get_mux(struct snd_kcontrol *kcontrol,
1278*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1279*4882a593Smuzhiyun {
1280*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1281*4882a593Smuzhiyun unsigned long flags;
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1284*4882a593Smuzhiyun ucontrol->value.enumerated.item[0] =
1285*4882a593Smuzhiyun (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1286*4882a593Smuzhiyun ucontrol->value.enumerated.item[1] =
1287*4882a593Smuzhiyun (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1288*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1289*4882a593Smuzhiyun
1290*4882a593Smuzhiyun return 0;
1291*4882a593Smuzhiyun }
1292*4882a593Smuzhiyun
snd_cs4231_put_mux(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1293*4882a593Smuzhiyun static int snd_cs4231_put_mux(struct snd_kcontrol *kcontrol,
1294*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1295*4882a593Smuzhiyun {
1296*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1297*4882a593Smuzhiyun unsigned long flags;
1298*4882a593Smuzhiyun unsigned short left, right;
1299*4882a593Smuzhiyun int change;
1300*4882a593Smuzhiyun
1301*4882a593Smuzhiyun if (ucontrol->value.enumerated.item[0] > 3 ||
1302*4882a593Smuzhiyun ucontrol->value.enumerated.item[1] > 3)
1303*4882a593Smuzhiyun return -EINVAL;
1304*4882a593Smuzhiyun left = ucontrol->value.enumerated.item[0] << 6;
1305*4882a593Smuzhiyun right = ucontrol->value.enumerated.item[1] << 6;
1306*4882a593Smuzhiyun
1307*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1308*4882a593Smuzhiyun
1309*4882a593Smuzhiyun left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1310*4882a593Smuzhiyun right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1311*4882a593Smuzhiyun change = left != chip->image[CS4231_LEFT_INPUT] ||
1312*4882a593Smuzhiyun right != chip->image[CS4231_RIGHT_INPUT];
1313*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1314*4882a593Smuzhiyun snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1315*4882a593Smuzhiyun
1316*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun return change;
1319*4882a593Smuzhiyun }
1320*4882a593Smuzhiyun
snd_cs4231_info_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1321*4882a593Smuzhiyun static int snd_cs4231_info_single(struct snd_kcontrol *kcontrol,
1322*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
1323*4882a593Smuzhiyun {
1324*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
1325*4882a593Smuzhiyun
1326*4882a593Smuzhiyun uinfo->type = (mask == 1) ?
1327*4882a593Smuzhiyun SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1328*4882a593Smuzhiyun uinfo->count = 1;
1329*4882a593Smuzhiyun uinfo->value.integer.min = 0;
1330*4882a593Smuzhiyun uinfo->value.integer.max = mask;
1331*4882a593Smuzhiyun
1332*4882a593Smuzhiyun return 0;
1333*4882a593Smuzhiyun }
1334*4882a593Smuzhiyun
snd_cs4231_get_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1335*4882a593Smuzhiyun static int snd_cs4231_get_single(struct snd_kcontrol *kcontrol,
1336*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1337*4882a593Smuzhiyun {
1338*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1339*4882a593Smuzhiyun unsigned long flags;
1340*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
1341*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
1342*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
1343*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & 0xff;
1344*4882a593Smuzhiyun
1345*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1346*4882a593Smuzhiyun
1347*4882a593Smuzhiyun ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1350*4882a593Smuzhiyun
1351*4882a593Smuzhiyun if (invert)
1352*4882a593Smuzhiyun ucontrol->value.integer.value[0] =
1353*4882a593Smuzhiyun (mask - ucontrol->value.integer.value[0]);
1354*4882a593Smuzhiyun
1355*4882a593Smuzhiyun return 0;
1356*4882a593Smuzhiyun }
1357*4882a593Smuzhiyun
snd_cs4231_put_single(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1358*4882a593Smuzhiyun static int snd_cs4231_put_single(struct snd_kcontrol *kcontrol,
1359*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1360*4882a593Smuzhiyun {
1361*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1362*4882a593Smuzhiyun unsigned long flags;
1363*4882a593Smuzhiyun int reg = kcontrol->private_value & 0xff;
1364*4882a593Smuzhiyun int shift = (kcontrol->private_value >> 8) & 0xff;
1365*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 16) & 0xff;
1366*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 24) & 0xff;
1367*4882a593Smuzhiyun int change;
1368*4882a593Smuzhiyun unsigned short val;
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun val = (ucontrol->value.integer.value[0] & mask);
1371*4882a593Smuzhiyun if (invert)
1372*4882a593Smuzhiyun val = mask - val;
1373*4882a593Smuzhiyun val <<= shift;
1374*4882a593Smuzhiyun
1375*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1376*4882a593Smuzhiyun
1377*4882a593Smuzhiyun val = (chip->image[reg] & ~(mask << shift)) | val;
1378*4882a593Smuzhiyun change = val != chip->image[reg];
1379*4882a593Smuzhiyun snd_cs4231_out(chip, reg, val);
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1382*4882a593Smuzhiyun
1383*4882a593Smuzhiyun return change;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun
snd_cs4231_info_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1386*4882a593Smuzhiyun static int snd_cs4231_info_double(struct snd_kcontrol *kcontrol,
1387*4882a593Smuzhiyun struct snd_ctl_elem_info *uinfo)
1388*4882a593Smuzhiyun {
1389*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
1390*4882a593Smuzhiyun
1391*4882a593Smuzhiyun uinfo->type = mask == 1 ?
1392*4882a593Smuzhiyun SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1393*4882a593Smuzhiyun uinfo->count = 2;
1394*4882a593Smuzhiyun uinfo->value.integer.min = 0;
1395*4882a593Smuzhiyun uinfo->value.integer.max = mask;
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun return 0;
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun
snd_cs4231_get_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1400*4882a593Smuzhiyun static int snd_cs4231_get_double(struct snd_kcontrol *kcontrol,
1401*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1402*4882a593Smuzhiyun {
1403*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1404*4882a593Smuzhiyun unsigned long flags;
1405*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
1406*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
1407*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
1408*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
1409*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
1410*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
1411*4882a593Smuzhiyun
1412*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1413*4882a593Smuzhiyun
1414*4882a593Smuzhiyun ucontrol->value.integer.value[0] =
1415*4882a593Smuzhiyun (chip->image[left_reg] >> shift_left) & mask;
1416*4882a593Smuzhiyun ucontrol->value.integer.value[1] =
1417*4882a593Smuzhiyun (chip->image[right_reg] >> shift_right) & mask;
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1420*4882a593Smuzhiyun
1421*4882a593Smuzhiyun if (invert) {
1422*4882a593Smuzhiyun ucontrol->value.integer.value[0] =
1423*4882a593Smuzhiyun (mask - ucontrol->value.integer.value[0]);
1424*4882a593Smuzhiyun ucontrol->value.integer.value[1] =
1425*4882a593Smuzhiyun (mask - ucontrol->value.integer.value[1]);
1426*4882a593Smuzhiyun }
1427*4882a593Smuzhiyun
1428*4882a593Smuzhiyun return 0;
1429*4882a593Smuzhiyun }
1430*4882a593Smuzhiyun
snd_cs4231_put_double(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1431*4882a593Smuzhiyun static int snd_cs4231_put_double(struct snd_kcontrol *kcontrol,
1432*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
1433*4882a593Smuzhiyun {
1434*4882a593Smuzhiyun struct snd_cs4231 *chip = snd_kcontrol_chip(kcontrol);
1435*4882a593Smuzhiyun unsigned long flags;
1436*4882a593Smuzhiyun int left_reg = kcontrol->private_value & 0xff;
1437*4882a593Smuzhiyun int right_reg = (kcontrol->private_value >> 8) & 0xff;
1438*4882a593Smuzhiyun int shift_left = (kcontrol->private_value >> 16) & 0x07;
1439*4882a593Smuzhiyun int shift_right = (kcontrol->private_value >> 19) & 0x07;
1440*4882a593Smuzhiyun int mask = (kcontrol->private_value >> 24) & 0xff;
1441*4882a593Smuzhiyun int invert = (kcontrol->private_value >> 22) & 1;
1442*4882a593Smuzhiyun int change;
1443*4882a593Smuzhiyun unsigned short val1, val2;
1444*4882a593Smuzhiyun
1445*4882a593Smuzhiyun val1 = ucontrol->value.integer.value[0] & mask;
1446*4882a593Smuzhiyun val2 = ucontrol->value.integer.value[1] & mask;
1447*4882a593Smuzhiyun if (invert) {
1448*4882a593Smuzhiyun val1 = mask - val1;
1449*4882a593Smuzhiyun val2 = mask - val2;
1450*4882a593Smuzhiyun }
1451*4882a593Smuzhiyun val1 <<= shift_left;
1452*4882a593Smuzhiyun val2 <<= shift_right;
1453*4882a593Smuzhiyun
1454*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1455*4882a593Smuzhiyun
1456*4882a593Smuzhiyun val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1457*4882a593Smuzhiyun val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1458*4882a593Smuzhiyun change = val1 != chip->image[left_reg];
1459*4882a593Smuzhiyun change |= val2 != chip->image[right_reg];
1460*4882a593Smuzhiyun snd_cs4231_out(chip, left_reg, val1);
1461*4882a593Smuzhiyun snd_cs4231_out(chip, right_reg, val2);
1462*4882a593Smuzhiyun
1463*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun return change;
1466*4882a593Smuzhiyun }
1467*4882a593Smuzhiyun
1468*4882a593Smuzhiyun #define CS4231_SINGLE(xname, xindex, reg, shift, mask, invert) \
1469*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1470*4882a593Smuzhiyun .info = snd_cs4231_info_single, \
1471*4882a593Smuzhiyun .get = snd_cs4231_get_single, .put = snd_cs4231_put_single, \
1472*4882a593Smuzhiyun .private_value = (reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24) }
1473*4882a593Smuzhiyun
1474*4882a593Smuzhiyun #define CS4231_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, \
1475*4882a593Smuzhiyun shift_right, mask, invert) \
1476*4882a593Smuzhiyun { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), .index = (xindex), \
1477*4882a593Smuzhiyun .info = snd_cs4231_info_double, \
1478*4882a593Smuzhiyun .get = snd_cs4231_get_double, .put = snd_cs4231_put_double, \
1479*4882a593Smuzhiyun .private_value = (left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | \
1480*4882a593Smuzhiyun ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22) }
1481*4882a593Smuzhiyun
1482*4882a593Smuzhiyun static const struct snd_kcontrol_new snd_cs4231_controls[] = {
1483*4882a593Smuzhiyun CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT,
1484*4882a593Smuzhiyun CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1485*4882a593Smuzhiyun CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT,
1486*4882a593Smuzhiyun CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1487*4882a593Smuzhiyun CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN,
1488*4882a593Smuzhiyun CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1489*4882a593Smuzhiyun CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN,
1490*4882a593Smuzhiyun CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1491*4882a593Smuzhiyun CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT,
1492*4882a593Smuzhiyun CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1493*4882a593Smuzhiyun CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT,
1494*4882a593Smuzhiyun CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1495*4882a593Smuzhiyun CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT,
1496*4882a593Smuzhiyun CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1497*4882a593Smuzhiyun CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT,
1498*4882a593Smuzhiyun CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1499*4882a593Smuzhiyun CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1500*4882a593Smuzhiyun CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1501*4882a593Smuzhiyun CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1502*4882a593Smuzhiyun CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1503*4882a593Smuzhiyun CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0,
1504*4882a593Smuzhiyun 15, 0),
1505*4882a593Smuzhiyun {
1506*4882a593Smuzhiyun .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1507*4882a593Smuzhiyun .name = "Capture Source",
1508*4882a593Smuzhiyun .info = snd_cs4231_info_mux,
1509*4882a593Smuzhiyun .get = snd_cs4231_get_mux,
1510*4882a593Smuzhiyun .put = snd_cs4231_put_mux,
1511*4882a593Smuzhiyun },
1512*4882a593Smuzhiyun CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5,
1513*4882a593Smuzhiyun 1, 0),
1514*4882a593Smuzhiyun CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1515*4882a593Smuzhiyun CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1),
1516*4882a593Smuzhiyun /* SPARC specific uses of XCTL{0,1} general purpose outputs. */
1517*4882a593Smuzhiyun CS4231_SINGLE("Line Out Switch", 0, CS4231_PIN_CTRL, 6, 1, 1),
1518*4882a593Smuzhiyun CS4231_SINGLE("Headphone Out Switch", 0, CS4231_PIN_CTRL, 7, 1, 1)
1519*4882a593Smuzhiyun };
1520*4882a593Smuzhiyun
snd_cs4231_mixer(struct snd_card * card)1521*4882a593Smuzhiyun static int snd_cs4231_mixer(struct snd_card *card)
1522*4882a593Smuzhiyun {
1523*4882a593Smuzhiyun struct snd_cs4231 *chip = card->private_data;
1524*4882a593Smuzhiyun int err, idx;
1525*4882a593Smuzhiyun
1526*4882a593Smuzhiyun if (snd_BUG_ON(!chip || !chip->pcm))
1527*4882a593Smuzhiyun return -EINVAL;
1528*4882a593Smuzhiyun
1529*4882a593Smuzhiyun strcpy(card->mixername, chip->pcm->name);
1530*4882a593Smuzhiyun
1531*4882a593Smuzhiyun for (idx = 0; idx < ARRAY_SIZE(snd_cs4231_controls); idx++) {
1532*4882a593Smuzhiyun err = snd_ctl_add(card,
1533*4882a593Smuzhiyun snd_ctl_new1(&snd_cs4231_controls[idx], chip));
1534*4882a593Smuzhiyun if (err < 0)
1535*4882a593Smuzhiyun return err;
1536*4882a593Smuzhiyun }
1537*4882a593Smuzhiyun return 0;
1538*4882a593Smuzhiyun }
1539*4882a593Smuzhiyun
1540*4882a593Smuzhiyun static int dev;
1541*4882a593Smuzhiyun
cs4231_attach_begin(struct platform_device * op,struct snd_card ** rcard)1542*4882a593Smuzhiyun static int cs4231_attach_begin(struct platform_device *op,
1543*4882a593Smuzhiyun struct snd_card **rcard)
1544*4882a593Smuzhiyun {
1545*4882a593Smuzhiyun struct snd_card *card;
1546*4882a593Smuzhiyun struct snd_cs4231 *chip;
1547*4882a593Smuzhiyun int err;
1548*4882a593Smuzhiyun
1549*4882a593Smuzhiyun *rcard = NULL;
1550*4882a593Smuzhiyun
1551*4882a593Smuzhiyun if (dev >= SNDRV_CARDS)
1552*4882a593Smuzhiyun return -ENODEV;
1553*4882a593Smuzhiyun
1554*4882a593Smuzhiyun if (!enable[dev]) {
1555*4882a593Smuzhiyun dev++;
1556*4882a593Smuzhiyun return -ENOENT;
1557*4882a593Smuzhiyun }
1558*4882a593Smuzhiyun
1559*4882a593Smuzhiyun err = snd_card_new(&op->dev, index[dev], id[dev], THIS_MODULE,
1560*4882a593Smuzhiyun sizeof(struct snd_cs4231), &card);
1561*4882a593Smuzhiyun if (err < 0)
1562*4882a593Smuzhiyun return err;
1563*4882a593Smuzhiyun
1564*4882a593Smuzhiyun strcpy(card->driver, "CS4231");
1565*4882a593Smuzhiyun strcpy(card->shortname, "Sun CS4231");
1566*4882a593Smuzhiyun
1567*4882a593Smuzhiyun chip = card->private_data;
1568*4882a593Smuzhiyun chip->card = card;
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun *rcard = card;
1571*4882a593Smuzhiyun return 0;
1572*4882a593Smuzhiyun }
1573*4882a593Smuzhiyun
cs4231_attach_finish(struct snd_card * card)1574*4882a593Smuzhiyun static int cs4231_attach_finish(struct snd_card *card)
1575*4882a593Smuzhiyun {
1576*4882a593Smuzhiyun struct snd_cs4231 *chip = card->private_data;
1577*4882a593Smuzhiyun int err;
1578*4882a593Smuzhiyun
1579*4882a593Smuzhiyun err = snd_cs4231_pcm(card);
1580*4882a593Smuzhiyun if (err < 0)
1581*4882a593Smuzhiyun goto out_err;
1582*4882a593Smuzhiyun
1583*4882a593Smuzhiyun err = snd_cs4231_mixer(card);
1584*4882a593Smuzhiyun if (err < 0)
1585*4882a593Smuzhiyun goto out_err;
1586*4882a593Smuzhiyun
1587*4882a593Smuzhiyun err = snd_cs4231_timer(card);
1588*4882a593Smuzhiyun if (err < 0)
1589*4882a593Smuzhiyun goto out_err;
1590*4882a593Smuzhiyun
1591*4882a593Smuzhiyun err = snd_card_register(card);
1592*4882a593Smuzhiyun if (err < 0)
1593*4882a593Smuzhiyun goto out_err;
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun dev_set_drvdata(&chip->op->dev, chip);
1596*4882a593Smuzhiyun
1597*4882a593Smuzhiyun dev++;
1598*4882a593Smuzhiyun return 0;
1599*4882a593Smuzhiyun
1600*4882a593Smuzhiyun out_err:
1601*4882a593Smuzhiyun snd_card_free(card);
1602*4882a593Smuzhiyun return err;
1603*4882a593Smuzhiyun }
1604*4882a593Smuzhiyun
1605*4882a593Smuzhiyun #ifdef SBUS_SUPPORT
1606*4882a593Smuzhiyun
snd_cs4231_sbus_interrupt(int irq,void * dev_id)1607*4882a593Smuzhiyun static irqreturn_t snd_cs4231_sbus_interrupt(int irq, void *dev_id)
1608*4882a593Smuzhiyun {
1609*4882a593Smuzhiyun unsigned long flags;
1610*4882a593Smuzhiyun unsigned char status;
1611*4882a593Smuzhiyun u32 csr;
1612*4882a593Smuzhiyun struct snd_cs4231 *chip = dev_id;
1613*4882a593Smuzhiyun
1614*4882a593Smuzhiyun /*This is IRQ is not raised by the cs4231*/
1615*4882a593Smuzhiyun if (!(__cs4231_readb(chip, CS4231U(chip, STATUS)) & CS4231_GLOBALIRQ))
1616*4882a593Smuzhiyun return IRQ_NONE;
1617*4882a593Smuzhiyun
1618*4882a593Smuzhiyun /* ACK the APC interrupt. */
1619*4882a593Smuzhiyun csr = sbus_readl(chip->port + APCCSR);
1620*4882a593Smuzhiyun
1621*4882a593Smuzhiyun sbus_writel(csr, chip->port + APCCSR);
1622*4882a593Smuzhiyun
1623*4882a593Smuzhiyun if ((csr & APC_PDMA_READY) &&
1624*4882a593Smuzhiyun (csr & APC_PLAY_INT) &&
1625*4882a593Smuzhiyun (csr & APC_XINT_PNVA) &&
1626*4882a593Smuzhiyun !(csr & APC_XINT_EMPT))
1627*4882a593Smuzhiyun snd_cs4231_play_callback(chip);
1628*4882a593Smuzhiyun
1629*4882a593Smuzhiyun if ((csr & APC_CDMA_READY) &&
1630*4882a593Smuzhiyun (csr & APC_CAPT_INT) &&
1631*4882a593Smuzhiyun (csr & APC_XINT_CNVA) &&
1632*4882a593Smuzhiyun !(csr & APC_XINT_EMPT))
1633*4882a593Smuzhiyun snd_cs4231_capture_callback(chip);
1634*4882a593Smuzhiyun
1635*4882a593Smuzhiyun status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
1636*4882a593Smuzhiyun
1637*4882a593Smuzhiyun if (status & CS4231_TIMER_IRQ) {
1638*4882a593Smuzhiyun if (chip->timer)
1639*4882a593Smuzhiyun snd_timer_interrupt(chip->timer, chip->timer->sticks);
1640*4882a593Smuzhiyun }
1641*4882a593Smuzhiyun
1642*4882a593Smuzhiyun if ((status & CS4231_RECORD_IRQ) && (csr & APC_CDMA_READY))
1643*4882a593Smuzhiyun snd_cs4231_overrange(chip);
1644*4882a593Smuzhiyun
1645*4882a593Smuzhiyun /* ACK the CS4231 interrupt. */
1646*4882a593Smuzhiyun spin_lock_irqsave(&chip->lock, flags);
1647*4882a593Smuzhiyun snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1648*4882a593Smuzhiyun spin_unlock_irqrestore(&chip->lock, flags);
1649*4882a593Smuzhiyun
1650*4882a593Smuzhiyun return IRQ_HANDLED;
1651*4882a593Smuzhiyun }
1652*4882a593Smuzhiyun
1653*4882a593Smuzhiyun /*
1654*4882a593Smuzhiyun * SBUS DMA routines
1655*4882a593Smuzhiyun */
1656*4882a593Smuzhiyun
sbus_dma_request(struct cs4231_dma_control * dma_cont,dma_addr_t bus_addr,size_t len)1657*4882a593Smuzhiyun static int sbus_dma_request(struct cs4231_dma_control *dma_cont,
1658*4882a593Smuzhiyun dma_addr_t bus_addr, size_t len)
1659*4882a593Smuzhiyun {
1660*4882a593Smuzhiyun unsigned long flags;
1661*4882a593Smuzhiyun u32 test, csr;
1662*4882a593Smuzhiyun int err;
1663*4882a593Smuzhiyun struct sbus_dma_info *base = &dma_cont->sbus_info;
1664*4882a593Smuzhiyun
1665*4882a593Smuzhiyun if (len >= (1 << 24))
1666*4882a593Smuzhiyun return -EINVAL;
1667*4882a593Smuzhiyun spin_lock_irqsave(&base->lock, flags);
1668*4882a593Smuzhiyun csr = sbus_readl(base->regs + APCCSR);
1669*4882a593Smuzhiyun err = -EINVAL;
1670*4882a593Smuzhiyun test = APC_CDMA_READY;
1671*4882a593Smuzhiyun if (base->dir == APC_PLAY)
1672*4882a593Smuzhiyun test = APC_PDMA_READY;
1673*4882a593Smuzhiyun if (!(csr & test))
1674*4882a593Smuzhiyun goto out;
1675*4882a593Smuzhiyun err = -EBUSY;
1676*4882a593Smuzhiyun test = APC_XINT_CNVA;
1677*4882a593Smuzhiyun if (base->dir == APC_PLAY)
1678*4882a593Smuzhiyun test = APC_XINT_PNVA;
1679*4882a593Smuzhiyun if (!(csr & test))
1680*4882a593Smuzhiyun goto out;
1681*4882a593Smuzhiyun err = 0;
1682*4882a593Smuzhiyun sbus_writel(bus_addr, base->regs + base->dir + APCNVA);
1683*4882a593Smuzhiyun sbus_writel(len, base->regs + base->dir + APCNC);
1684*4882a593Smuzhiyun out:
1685*4882a593Smuzhiyun spin_unlock_irqrestore(&base->lock, flags);
1686*4882a593Smuzhiyun return err;
1687*4882a593Smuzhiyun }
1688*4882a593Smuzhiyun
sbus_dma_prepare(struct cs4231_dma_control * dma_cont,int d)1689*4882a593Smuzhiyun static void sbus_dma_prepare(struct cs4231_dma_control *dma_cont, int d)
1690*4882a593Smuzhiyun {
1691*4882a593Smuzhiyun unsigned long flags;
1692*4882a593Smuzhiyun u32 csr, test;
1693*4882a593Smuzhiyun struct sbus_dma_info *base = &dma_cont->sbus_info;
1694*4882a593Smuzhiyun
1695*4882a593Smuzhiyun spin_lock_irqsave(&base->lock, flags);
1696*4882a593Smuzhiyun csr = sbus_readl(base->regs + APCCSR);
1697*4882a593Smuzhiyun test = APC_GENL_INT | APC_PLAY_INT | APC_XINT_ENA |
1698*4882a593Smuzhiyun APC_XINT_PLAY | APC_XINT_PEMP | APC_XINT_GENL |
1699*4882a593Smuzhiyun APC_XINT_PENA;
1700*4882a593Smuzhiyun if (base->dir == APC_RECORD)
1701*4882a593Smuzhiyun test = APC_GENL_INT | APC_CAPT_INT | APC_XINT_ENA |
1702*4882a593Smuzhiyun APC_XINT_CAPT | APC_XINT_CEMP | APC_XINT_GENL;
1703*4882a593Smuzhiyun csr |= test;
1704*4882a593Smuzhiyun sbus_writel(csr, base->regs + APCCSR);
1705*4882a593Smuzhiyun spin_unlock_irqrestore(&base->lock, flags);
1706*4882a593Smuzhiyun }
1707*4882a593Smuzhiyun
sbus_dma_enable(struct cs4231_dma_control * dma_cont,int on)1708*4882a593Smuzhiyun static void sbus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1709*4882a593Smuzhiyun {
1710*4882a593Smuzhiyun unsigned long flags;
1711*4882a593Smuzhiyun u32 csr, shift;
1712*4882a593Smuzhiyun struct sbus_dma_info *base = &dma_cont->sbus_info;
1713*4882a593Smuzhiyun
1714*4882a593Smuzhiyun spin_lock_irqsave(&base->lock, flags);
1715*4882a593Smuzhiyun if (!on) {
1716*4882a593Smuzhiyun sbus_writel(0, base->regs + base->dir + APCNC);
1717*4882a593Smuzhiyun sbus_writel(0, base->regs + base->dir + APCNVA);
1718*4882a593Smuzhiyun if (base->dir == APC_PLAY) {
1719*4882a593Smuzhiyun sbus_writel(0, base->regs + base->dir + APCC);
1720*4882a593Smuzhiyun sbus_writel(0, base->regs + base->dir + APCVA);
1721*4882a593Smuzhiyun }
1722*4882a593Smuzhiyun
1723*4882a593Smuzhiyun udelay(1200);
1724*4882a593Smuzhiyun }
1725*4882a593Smuzhiyun csr = sbus_readl(base->regs + APCCSR);
1726*4882a593Smuzhiyun shift = 0;
1727*4882a593Smuzhiyun if (base->dir == APC_PLAY)
1728*4882a593Smuzhiyun shift = 1;
1729*4882a593Smuzhiyun if (on)
1730*4882a593Smuzhiyun csr &= ~(APC_CPAUSE << shift);
1731*4882a593Smuzhiyun else
1732*4882a593Smuzhiyun csr |= (APC_CPAUSE << shift);
1733*4882a593Smuzhiyun sbus_writel(csr, base->regs + APCCSR);
1734*4882a593Smuzhiyun if (on)
1735*4882a593Smuzhiyun csr |= (APC_CDMA_READY << shift);
1736*4882a593Smuzhiyun else
1737*4882a593Smuzhiyun csr &= ~(APC_CDMA_READY << shift);
1738*4882a593Smuzhiyun sbus_writel(csr, base->regs + APCCSR);
1739*4882a593Smuzhiyun
1740*4882a593Smuzhiyun spin_unlock_irqrestore(&base->lock, flags);
1741*4882a593Smuzhiyun }
1742*4882a593Smuzhiyun
sbus_dma_addr(struct cs4231_dma_control * dma_cont)1743*4882a593Smuzhiyun static unsigned int sbus_dma_addr(struct cs4231_dma_control *dma_cont)
1744*4882a593Smuzhiyun {
1745*4882a593Smuzhiyun struct sbus_dma_info *base = &dma_cont->sbus_info;
1746*4882a593Smuzhiyun
1747*4882a593Smuzhiyun return sbus_readl(base->regs + base->dir + APCVA);
1748*4882a593Smuzhiyun }
1749*4882a593Smuzhiyun
1750*4882a593Smuzhiyun /*
1751*4882a593Smuzhiyun * Init and exit routines
1752*4882a593Smuzhiyun */
1753*4882a593Smuzhiyun
snd_cs4231_sbus_free(struct snd_cs4231 * chip)1754*4882a593Smuzhiyun static int snd_cs4231_sbus_free(struct snd_cs4231 *chip)
1755*4882a593Smuzhiyun {
1756*4882a593Smuzhiyun struct platform_device *op = chip->op;
1757*4882a593Smuzhiyun
1758*4882a593Smuzhiyun if (chip->irq[0])
1759*4882a593Smuzhiyun free_irq(chip->irq[0], chip);
1760*4882a593Smuzhiyun
1761*4882a593Smuzhiyun if (chip->port)
1762*4882a593Smuzhiyun of_iounmap(&op->resource[0], chip->port, chip->regs_size);
1763*4882a593Smuzhiyun
1764*4882a593Smuzhiyun return 0;
1765*4882a593Smuzhiyun }
1766*4882a593Smuzhiyun
snd_cs4231_sbus_dev_free(struct snd_device * device)1767*4882a593Smuzhiyun static int snd_cs4231_sbus_dev_free(struct snd_device *device)
1768*4882a593Smuzhiyun {
1769*4882a593Smuzhiyun struct snd_cs4231 *cp = device->device_data;
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun return snd_cs4231_sbus_free(cp);
1772*4882a593Smuzhiyun }
1773*4882a593Smuzhiyun
1774*4882a593Smuzhiyun static const struct snd_device_ops snd_cs4231_sbus_dev_ops = {
1775*4882a593Smuzhiyun .dev_free = snd_cs4231_sbus_dev_free,
1776*4882a593Smuzhiyun };
1777*4882a593Smuzhiyun
snd_cs4231_sbus_create(struct snd_card * card,struct platform_device * op,int dev)1778*4882a593Smuzhiyun static int snd_cs4231_sbus_create(struct snd_card *card,
1779*4882a593Smuzhiyun struct platform_device *op,
1780*4882a593Smuzhiyun int dev)
1781*4882a593Smuzhiyun {
1782*4882a593Smuzhiyun struct snd_cs4231 *chip = card->private_data;
1783*4882a593Smuzhiyun int err;
1784*4882a593Smuzhiyun
1785*4882a593Smuzhiyun spin_lock_init(&chip->lock);
1786*4882a593Smuzhiyun spin_lock_init(&chip->c_dma.sbus_info.lock);
1787*4882a593Smuzhiyun spin_lock_init(&chip->p_dma.sbus_info.lock);
1788*4882a593Smuzhiyun mutex_init(&chip->mce_mutex);
1789*4882a593Smuzhiyun mutex_init(&chip->open_mutex);
1790*4882a593Smuzhiyun chip->op = op;
1791*4882a593Smuzhiyun chip->regs_size = resource_size(&op->resource[0]);
1792*4882a593Smuzhiyun memcpy(&chip->image, &snd_cs4231_original_image,
1793*4882a593Smuzhiyun sizeof(snd_cs4231_original_image));
1794*4882a593Smuzhiyun
1795*4882a593Smuzhiyun chip->port = of_ioremap(&op->resource[0], 0,
1796*4882a593Smuzhiyun chip->regs_size, "cs4231");
1797*4882a593Smuzhiyun if (!chip->port) {
1798*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1799*4882a593Smuzhiyun return -EIO;
1800*4882a593Smuzhiyun }
1801*4882a593Smuzhiyun
1802*4882a593Smuzhiyun chip->c_dma.sbus_info.regs = chip->port;
1803*4882a593Smuzhiyun chip->p_dma.sbus_info.regs = chip->port;
1804*4882a593Smuzhiyun chip->c_dma.sbus_info.dir = APC_RECORD;
1805*4882a593Smuzhiyun chip->p_dma.sbus_info.dir = APC_PLAY;
1806*4882a593Smuzhiyun
1807*4882a593Smuzhiyun chip->p_dma.prepare = sbus_dma_prepare;
1808*4882a593Smuzhiyun chip->p_dma.enable = sbus_dma_enable;
1809*4882a593Smuzhiyun chip->p_dma.request = sbus_dma_request;
1810*4882a593Smuzhiyun chip->p_dma.address = sbus_dma_addr;
1811*4882a593Smuzhiyun
1812*4882a593Smuzhiyun chip->c_dma.prepare = sbus_dma_prepare;
1813*4882a593Smuzhiyun chip->c_dma.enable = sbus_dma_enable;
1814*4882a593Smuzhiyun chip->c_dma.request = sbus_dma_request;
1815*4882a593Smuzhiyun chip->c_dma.address = sbus_dma_addr;
1816*4882a593Smuzhiyun
1817*4882a593Smuzhiyun if (request_irq(op->archdata.irqs[0], snd_cs4231_sbus_interrupt,
1818*4882a593Smuzhiyun IRQF_SHARED, "cs4231", chip)) {
1819*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to grab SBUS IRQ %d\n",
1820*4882a593Smuzhiyun dev, op->archdata.irqs[0]);
1821*4882a593Smuzhiyun snd_cs4231_sbus_free(chip);
1822*4882a593Smuzhiyun return -EBUSY;
1823*4882a593Smuzhiyun }
1824*4882a593Smuzhiyun chip->irq[0] = op->archdata.irqs[0];
1825*4882a593Smuzhiyun
1826*4882a593Smuzhiyun if (snd_cs4231_probe(chip) < 0) {
1827*4882a593Smuzhiyun snd_cs4231_sbus_free(chip);
1828*4882a593Smuzhiyun return -ENODEV;
1829*4882a593Smuzhiyun }
1830*4882a593Smuzhiyun snd_cs4231_init(chip);
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
1833*4882a593Smuzhiyun chip, &snd_cs4231_sbus_dev_ops)) < 0) {
1834*4882a593Smuzhiyun snd_cs4231_sbus_free(chip);
1835*4882a593Smuzhiyun return err;
1836*4882a593Smuzhiyun }
1837*4882a593Smuzhiyun
1838*4882a593Smuzhiyun return 0;
1839*4882a593Smuzhiyun }
1840*4882a593Smuzhiyun
cs4231_sbus_probe(struct platform_device * op)1841*4882a593Smuzhiyun static int cs4231_sbus_probe(struct platform_device *op)
1842*4882a593Smuzhiyun {
1843*4882a593Smuzhiyun struct resource *rp = &op->resource[0];
1844*4882a593Smuzhiyun struct snd_card *card;
1845*4882a593Smuzhiyun int err;
1846*4882a593Smuzhiyun
1847*4882a593Smuzhiyun err = cs4231_attach_begin(op, &card);
1848*4882a593Smuzhiyun if (err)
1849*4882a593Smuzhiyun return err;
1850*4882a593Smuzhiyun
1851*4882a593Smuzhiyun sprintf(card->longname, "%s at 0x%02lx:0x%016Lx, irq %d",
1852*4882a593Smuzhiyun card->shortname,
1853*4882a593Smuzhiyun rp->flags & 0xffL,
1854*4882a593Smuzhiyun (unsigned long long)rp->start,
1855*4882a593Smuzhiyun op->archdata.irqs[0]);
1856*4882a593Smuzhiyun
1857*4882a593Smuzhiyun err = snd_cs4231_sbus_create(card, op, dev);
1858*4882a593Smuzhiyun if (err < 0) {
1859*4882a593Smuzhiyun snd_card_free(card);
1860*4882a593Smuzhiyun return err;
1861*4882a593Smuzhiyun }
1862*4882a593Smuzhiyun
1863*4882a593Smuzhiyun return cs4231_attach_finish(card);
1864*4882a593Smuzhiyun }
1865*4882a593Smuzhiyun #endif
1866*4882a593Smuzhiyun
1867*4882a593Smuzhiyun #ifdef EBUS_SUPPORT
1868*4882a593Smuzhiyun
snd_cs4231_ebus_play_callback(struct ebus_dma_info * p,int event,void * cookie)1869*4882a593Smuzhiyun static void snd_cs4231_ebus_play_callback(struct ebus_dma_info *p, int event,
1870*4882a593Smuzhiyun void *cookie)
1871*4882a593Smuzhiyun {
1872*4882a593Smuzhiyun struct snd_cs4231 *chip = cookie;
1873*4882a593Smuzhiyun
1874*4882a593Smuzhiyun snd_cs4231_play_callback(chip);
1875*4882a593Smuzhiyun }
1876*4882a593Smuzhiyun
snd_cs4231_ebus_capture_callback(struct ebus_dma_info * p,int event,void * cookie)1877*4882a593Smuzhiyun static void snd_cs4231_ebus_capture_callback(struct ebus_dma_info *p,
1878*4882a593Smuzhiyun int event, void *cookie)
1879*4882a593Smuzhiyun {
1880*4882a593Smuzhiyun struct snd_cs4231 *chip = cookie;
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun snd_cs4231_capture_callback(chip);
1883*4882a593Smuzhiyun }
1884*4882a593Smuzhiyun
1885*4882a593Smuzhiyun /*
1886*4882a593Smuzhiyun * EBUS DMA wrappers
1887*4882a593Smuzhiyun */
1888*4882a593Smuzhiyun
_ebus_dma_request(struct cs4231_dma_control * dma_cont,dma_addr_t bus_addr,size_t len)1889*4882a593Smuzhiyun static int _ebus_dma_request(struct cs4231_dma_control *dma_cont,
1890*4882a593Smuzhiyun dma_addr_t bus_addr, size_t len)
1891*4882a593Smuzhiyun {
1892*4882a593Smuzhiyun return ebus_dma_request(&dma_cont->ebus_info, bus_addr, len);
1893*4882a593Smuzhiyun }
1894*4882a593Smuzhiyun
_ebus_dma_enable(struct cs4231_dma_control * dma_cont,int on)1895*4882a593Smuzhiyun static void _ebus_dma_enable(struct cs4231_dma_control *dma_cont, int on)
1896*4882a593Smuzhiyun {
1897*4882a593Smuzhiyun ebus_dma_enable(&dma_cont->ebus_info, on);
1898*4882a593Smuzhiyun }
1899*4882a593Smuzhiyun
_ebus_dma_prepare(struct cs4231_dma_control * dma_cont,int dir)1900*4882a593Smuzhiyun static void _ebus_dma_prepare(struct cs4231_dma_control *dma_cont, int dir)
1901*4882a593Smuzhiyun {
1902*4882a593Smuzhiyun ebus_dma_prepare(&dma_cont->ebus_info, dir);
1903*4882a593Smuzhiyun }
1904*4882a593Smuzhiyun
_ebus_dma_addr(struct cs4231_dma_control * dma_cont)1905*4882a593Smuzhiyun static unsigned int _ebus_dma_addr(struct cs4231_dma_control *dma_cont)
1906*4882a593Smuzhiyun {
1907*4882a593Smuzhiyun return ebus_dma_addr(&dma_cont->ebus_info);
1908*4882a593Smuzhiyun }
1909*4882a593Smuzhiyun
1910*4882a593Smuzhiyun /*
1911*4882a593Smuzhiyun * Init and exit routines
1912*4882a593Smuzhiyun */
1913*4882a593Smuzhiyun
snd_cs4231_ebus_free(struct snd_cs4231 * chip)1914*4882a593Smuzhiyun static int snd_cs4231_ebus_free(struct snd_cs4231 *chip)
1915*4882a593Smuzhiyun {
1916*4882a593Smuzhiyun struct platform_device *op = chip->op;
1917*4882a593Smuzhiyun
1918*4882a593Smuzhiyun if (chip->c_dma.ebus_info.regs) {
1919*4882a593Smuzhiyun ebus_dma_unregister(&chip->c_dma.ebus_info);
1920*4882a593Smuzhiyun of_iounmap(&op->resource[2], chip->c_dma.ebus_info.regs, 0x10);
1921*4882a593Smuzhiyun }
1922*4882a593Smuzhiyun if (chip->p_dma.ebus_info.regs) {
1923*4882a593Smuzhiyun ebus_dma_unregister(&chip->p_dma.ebus_info);
1924*4882a593Smuzhiyun of_iounmap(&op->resource[1], chip->p_dma.ebus_info.regs, 0x10);
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun
1927*4882a593Smuzhiyun if (chip->port)
1928*4882a593Smuzhiyun of_iounmap(&op->resource[0], chip->port, 0x10);
1929*4882a593Smuzhiyun
1930*4882a593Smuzhiyun return 0;
1931*4882a593Smuzhiyun }
1932*4882a593Smuzhiyun
snd_cs4231_ebus_dev_free(struct snd_device * device)1933*4882a593Smuzhiyun static int snd_cs4231_ebus_dev_free(struct snd_device *device)
1934*4882a593Smuzhiyun {
1935*4882a593Smuzhiyun struct snd_cs4231 *cp = device->device_data;
1936*4882a593Smuzhiyun
1937*4882a593Smuzhiyun return snd_cs4231_ebus_free(cp);
1938*4882a593Smuzhiyun }
1939*4882a593Smuzhiyun
1940*4882a593Smuzhiyun static const struct snd_device_ops snd_cs4231_ebus_dev_ops = {
1941*4882a593Smuzhiyun .dev_free = snd_cs4231_ebus_dev_free,
1942*4882a593Smuzhiyun };
1943*4882a593Smuzhiyun
snd_cs4231_ebus_create(struct snd_card * card,struct platform_device * op,int dev)1944*4882a593Smuzhiyun static int snd_cs4231_ebus_create(struct snd_card *card,
1945*4882a593Smuzhiyun struct platform_device *op,
1946*4882a593Smuzhiyun int dev)
1947*4882a593Smuzhiyun {
1948*4882a593Smuzhiyun struct snd_cs4231 *chip = card->private_data;
1949*4882a593Smuzhiyun int err;
1950*4882a593Smuzhiyun
1951*4882a593Smuzhiyun spin_lock_init(&chip->lock);
1952*4882a593Smuzhiyun spin_lock_init(&chip->c_dma.ebus_info.lock);
1953*4882a593Smuzhiyun spin_lock_init(&chip->p_dma.ebus_info.lock);
1954*4882a593Smuzhiyun mutex_init(&chip->mce_mutex);
1955*4882a593Smuzhiyun mutex_init(&chip->open_mutex);
1956*4882a593Smuzhiyun chip->flags |= CS4231_FLAG_EBUS;
1957*4882a593Smuzhiyun chip->op = op;
1958*4882a593Smuzhiyun memcpy(&chip->image, &snd_cs4231_original_image,
1959*4882a593Smuzhiyun sizeof(snd_cs4231_original_image));
1960*4882a593Smuzhiyun strcpy(chip->c_dma.ebus_info.name, "cs4231(capture)");
1961*4882a593Smuzhiyun chip->c_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1962*4882a593Smuzhiyun chip->c_dma.ebus_info.callback = snd_cs4231_ebus_capture_callback;
1963*4882a593Smuzhiyun chip->c_dma.ebus_info.client_cookie = chip;
1964*4882a593Smuzhiyun chip->c_dma.ebus_info.irq = op->archdata.irqs[0];
1965*4882a593Smuzhiyun strcpy(chip->p_dma.ebus_info.name, "cs4231(play)");
1966*4882a593Smuzhiyun chip->p_dma.ebus_info.flags = EBUS_DMA_FLAG_USE_EBDMA_HANDLER;
1967*4882a593Smuzhiyun chip->p_dma.ebus_info.callback = snd_cs4231_ebus_play_callback;
1968*4882a593Smuzhiyun chip->p_dma.ebus_info.client_cookie = chip;
1969*4882a593Smuzhiyun chip->p_dma.ebus_info.irq = op->archdata.irqs[1];
1970*4882a593Smuzhiyun
1971*4882a593Smuzhiyun chip->p_dma.prepare = _ebus_dma_prepare;
1972*4882a593Smuzhiyun chip->p_dma.enable = _ebus_dma_enable;
1973*4882a593Smuzhiyun chip->p_dma.request = _ebus_dma_request;
1974*4882a593Smuzhiyun chip->p_dma.address = _ebus_dma_addr;
1975*4882a593Smuzhiyun
1976*4882a593Smuzhiyun chip->c_dma.prepare = _ebus_dma_prepare;
1977*4882a593Smuzhiyun chip->c_dma.enable = _ebus_dma_enable;
1978*4882a593Smuzhiyun chip->c_dma.request = _ebus_dma_request;
1979*4882a593Smuzhiyun chip->c_dma.address = _ebus_dma_addr;
1980*4882a593Smuzhiyun
1981*4882a593Smuzhiyun chip->port = of_ioremap(&op->resource[0], 0, 0x10, "cs4231");
1982*4882a593Smuzhiyun chip->p_dma.ebus_info.regs =
1983*4882a593Smuzhiyun of_ioremap(&op->resource[1], 0, 0x10, "cs4231_pdma");
1984*4882a593Smuzhiyun chip->c_dma.ebus_info.regs =
1985*4882a593Smuzhiyun of_ioremap(&op->resource[2], 0, 0x10, "cs4231_cdma");
1986*4882a593Smuzhiyun if (!chip->port || !chip->p_dma.ebus_info.regs ||
1987*4882a593Smuzhiyun !chip->c_dma.ebus_info.regs) {
1988*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
1989*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to map chip registers.\n", dev);
1990*4882a593Smuzhiyun return -EIO;
1991*4882a593Smuzhiyun }
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun if (ebus_dma_register(&chip->c_dma.ebus_info)) {
1994*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
1995*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to register EBUS capture DMA\n",
1996*4882a593Smuzhiyun dev);
1997*4882a593Smuzhiyun return -EBUSY;
1998*4882a593Smuzhiyun }
1999*4882a593Smuzhiyun if (ebus_dma_irq_enable(&chip->c_dma.ebus_info, 1)) {
2000*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
2001*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to enable EBUS capture IRQ\n",
2002*4882a593Smuzhiyun dev);
2003*4882a593Smuzhiyun return -EBUSY;
2004*4882a593Smuzhiyun }
2005*4882a593Smuzhiyun
2006*4882a593Smuzhiyun if (ebus_dma_register(&chip->p_dma.ebus_info)) {
2007*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
2008*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to register EBUS play DMA\n",
2009*4882a593Smuzhiyun dev);
2010*4882a593Smuzhiyun return -EBUSY;
2011*4882a593Smuzhiyun }
2012*4882a593Smuzhiyun if (ebus_dma_irq_enable(&chip->p_dma.ebus_info, 1)) {
2013*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
2014*4882a593Smuzhiyun snd_printdd("cs4231-%d: Unable to enable EBUS play IRQ\n", dev);
2015*4882a593Smuzhiyun return -EBUSY;
2016*4882a593Smuzhiyun }
2017*4882a593Smuzhiyun
2018*4882a593Smuzhiyun if (snd_cs4231_probe(chip) < 0) {
2019*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
2020*4882a593Smuzhiyun return -ENODEV;
2021*4882a593Smuzhiyun }
2022*4882a593Smuzhiyun snd_cs4231_init(chip);
2023*4882a593Smuzhiyun
2024*4882a593Smuzhiyun if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
2025*4882a593Smuzhiyun chip, &snd_cs4231_ebus_dev_ops)) < 0) {
2026*4882a593Smuzhiyun snd_cs4231_ebus_free(chip);
2027*4882a593Smuzhiyun return err;
2028*4882a593Smuzhiyun }
2029*4882a593Smuzhiyun
2030*4882a593Smuzhiyun return 0;
2031*4882a593Smuzhiyun }
2032*4882a593Smuzhiyun
cs4231_ebus_probe(struct platform_device * op)2033*4882a593Smuzhiyun static int cs4231_ebus_probe(struct platform_device *op)
2034*4882a593Smuzhiyun {
2035*4882a593Smuzhiyun struct snd_card *card;
2036*4882a593Smuzhiyun int err;
2037*4882a593Smuzhiyun
2038*4882a593Smuzhiyun err = cs4231_attach_begin(op, &card);
2039*4882a593Smuzhiyun if (err)
2040*4882a593Smuzhiyun return err;
2041*4882a593Smuzhiyun
2042*4882a593Smuzhiyun sprintf(card->longname, "%s at 0x%llx, irq %d",
2043*4882a593Smuzhiyun card->shortname,
2044*4882a593Smuzhiyun op->resource[0].start,
2045*4882a593Smuzhiyun op->archdata.irqs[0]);
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun err = snd_cs4231_ebus_create(card, op, dev);
2048*4882a593Smuzhiyun if (err < 0) {
2049*4882a593Smuzhiyun snd_card_free(card);
2050*4882a593Smuzhiyun return err;
2051*4882a593Smuzhiyun }
2052*4882a593Smuzhiyun
2053*4882a593Smuzhiyun return cs4231_attach_finish(card);
2054*4882a593Smuzhiyun }
2055*4882a593Smuzhiyun #endif
2056*4882a593Smuzhiyun
cs4231_probe(struct platform_device * op)2057*4882a593Smuzhiyun static int cs4231_probe(struct platform_device *op)
2058*4882a593Smuzhiyun {
2059*4882a593Smuzhiyun #ifdef EBUS_SUPPORT
2060*4882a593Smuzhiyun if (of_node_name_eq(op->dev.of_node->parent, "ebus"))
2061*4882a593Smuzhiyun return cs4231_ebus_probe(op);
2062*4882a593Smuzhiyun #endif
2063*4882a593Smuzhiyun #ifdef SBUS_SUPPORT
2064*4882a593Smuzhiyun if (of_node_name_eq(op->dev.of_node->parent, "sbus") ||
2065*4882a593Smuzhiyun of_node_name_eq(op->dev.of_node->parent, "sbi"))
2066*4882a593Smuzhiyun return cs4231_sbus_probe(op);
2067*4882a593Smuzhiyun #endif
2068*4882a593Smuzhiyun return -ENODEV;
2069*4882a593Smuzhiyun }
2070*4882a593Smuzhiyun
cs4231_remove(struct platform_device * op)2071*4882a593Smuzhiyun static int cs4231_remove(struct platform_device *op)
2072*4882a593Smuzhiyun {
2073*4882a593Smuzhiyun struct snd_cs4231 *chip = dev_get_drvdata(&op->dev);
2074*4882a593Smuzhiyun
2075*4882a593Smuzhiyun snd_card_free(chip->card);
2076*4882a593Smuzhiyun
2077*4882a593Smuzhiyun return 0;
2078*4882a593Smuzhiyun }
2079*4882a593Smuzhiyun
2080*4882a593Smuzhiyun static const struct of_device_id cs4231_match[] = {
2081*4882a593Smuzhiyun {
2082*4882a593Smuzhiyun .name = "SUNW,CS4231",
2083*4882a593Smuzhiyun },
2084*4882a593Smuzhiyun {
2085*4882a593Smuzhiyun .name = "audio",
2086*4882a593Smuzhiyun .compatible = "SUNW,CS4231",
2087*4882a593Smuzhiyun },
2088*4882a593Smuzhiyun {},
2089*4882a593Smuzhiyun };
2090*4882a593Smuzhiyun
2091*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, cs4231_match);
2092*4882a593Smuzhiyun
2093*4882a593Smuzhiyun static struct platform_driver cs4231_driver = {
2094*4882a593Smuzhiyun .driver = {
2095*4882a593Smuzhiyun .name = "audio",
2096*4882a593Smuzhiyun .of_match_table = cs4231_match,
2097*4882a593Smuzhiyun },
2098*4882a593Smuzhiyun .probe = cs4231_probe,
2099*4882a593Smuzhiyun .remove = cs4231_remove,
2100*4882a593Smuzhiyun };
2101*4882a593Smuzhiyun
2102*4882a593Smuzhiyun module_platform_driver(cs4231_driver);
2103