1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Socionext UniPhier EVEA ADC/DAC codec driver.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2016-2017 Socionext Inc.
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/clk.h>
8*4882a593Smuzhiyun #include <linux/module.h>
9*4882a593Smuzhiyun #include <linux/of.h>
10*4882a593Smuzhiyun #include <linux/regmap.h>
11*4882a593Smuzhiyun #include <linux/reset.h>
12*4882a593Smuzhiyun #include <sound/pcm.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun #define DRV_NAME "evea"
16*4882a593Smuzhiyun #define EVEA_RATES SNDRV_PCM_RATE_48000
17*4882a593Smuzhiyun #define EVEA_FORMATS SNDRV_PCM_FMTBIT_S32_LE
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define AADCPOW(n) (0x0078 + 0x04 * (n))
20*4882a593Smuzhiyun #define AADCPOW_AADC_POWD BIT(0)
21*4882a593Smuzhiyun #define ALINSW1 0x0088
22*4882a593Smuzhiyun #define ALINSW1_SEL1_SHIFT 3
23*4882a593Smuzhiyun #define AHPOUTPOW 0x0098
24*4882a593Smuzhiyun #define AHPOUTPOW_HP_ON BIT(4)
25*4882a593Smuzhiyun #define ALINEPOW 0x009c
26*4882a593Smuzhiyun #define ALINEPOW_LIN2_POWD BIT(3)
27*4882a593Smuzhiyun #define ALINEPOW_LIN1_POWD BIT(4)
28*4882a593Smuzhiyun #define ALO1OUTPOW 0x00a8
29*4882a593Smuzhiyun #define ALO1OUTPOW_LO1_ON BIT(4)
30*4882a593Smuzhiyun #define ALO2OUTPOW 0x00ac
31*4882a593Smuzhiyun #define ALO2OUTPOW_ADAC2_MUTE BIT(0)
32*4882a593Smuzhiyun #define ALO2OUTPOW_LO2_ON BIT(4)
33*4882a593Smuzhiyun #define AANAPOW 0x00b8
34*4882a593Smuzhiyun #define AANAPOW_A_POWD BIT(4)
35*4882a593Smuzhiyun #define ADACSEQ1(n) (0x0144 + 0x40 * (n))
36*4882a593Smuzhiyun #define ADACSEQ1_MMUTE BIT(1)
37*4882a593Smuzhiyun #define ADACSEQ2(n) (0x0160 + 0x40 * (n))
38*4882a593Smuzhiyun #define ADACSEQ2_ADACIN_FIX BIT(0)
39*4882a593Smuzhiyun #define ADAC1ODC 0x0200
40*4882a593Smuzhiyun #define ADAC1ODC_HP_DIS_RES_MASK GENMASK(2, 1)
41*4882a593Smuzhiyun #define ADAC1ODC_HP_DIS_RES_OFF (0x0 << 1)
42*4882a593Smuzhiyun #define ADAC1ODC_HP_DIS_RES_ON (0x3 << 1)
43*4882a593Smuzhiyun #define ADAC1ODC_ADAC_RAMPCLT_MASK GENMASK(8, 7)
44*4882a593Smuzhiyun #define ADAC1ODC_ADAC_RAMPCLT_NORMAL (0x0 << 7)
45*4882a593Smuzhiyun #define ADAC1ODC_ADAC_RAMPCLT_REDUCE (0x1 << 7)
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun struct evea_priv {
48*4882a593Smuzhiyun struct clk *clk, *clk_exiv;
49*4882a593Smuzhiyun struct reset_control *rst, *rst_exiv, *rst_adamv;
50*4882a593Smuzhiyun struct regmap *regmap;
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun int switch_lin;
53*4882a593Smuzhiyun int switch_lo;
54*4882a593Smuzhiyun int switch_hp;
55*4882a593Smuzhiyun };
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun static const char * const linsw1_sel1_text[] = {
58*4882a593Smuzhiyun "LIN1", "LIN2", "LIN3"
59*4882a593Smuzhiyun };
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun static SOC_ENUM_SINGLE_DECL(linsw1_sel1_enum,
62*4882a593Smuzhiyun ALINSW1, ALINSW1_SEL1_SHIFT,
63*4882a593Smuzhiyun linsw1_sel1_text);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static const struct snd_kcontrol_new linesw1_mux[] = {
66*4882a593Smuzhiyun SOC_DAPM_ENUM("Line In 1 Source", linsw1_sel1_enum),
67*4882a593Smuzhiyun };
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun static const struct snd_soc_dapm_widget evea_widgets[] = {
70*4882a593Smuzhiyun SND_SOC_DAPM_ADC("ADC", NULL, SND_SOC_NOPM, 0, 0),
71*4882a593Smuzhiyun SND_SOC_DAPM_MUX("Line In 1 Mux", SND_SOC_NOPM, 0, 0, linesw1_mux),
72*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN1_LP"),
73*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN1_RP"),
74*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN2_LP"),
75*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN2_RP"),
76*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN3_LP"),
77*4882a593Smuzhiyun SND_SOC_DAPM_INPUT("LIN3_RP"),
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC HP", NULL, SND_SOC_NOPM, 0, 0),
80*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC LO1", NULL, SND_SOC_NOPM, 0, 0),
81*4882a593Smuzhiyun SND_SOC_DAPM_DAC("DAC LO2", NULL, SND_SOC_NOPM, 0, 0),
82*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HP1_L"),
83*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("HP1_R"),
84*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LO2_L"),
85*4882a593Smuzhiyun SND_SOC_DAPM_OUTPUT("LO2_R"),
86*4882a593Smuzhiyun };
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun static const struct snd_soc_dapm_route evea_routes[] = {
89*4882a593Smuzhiyun { "Line In 1", NULL, "ADC" },
90*4882a593Smuzhiyun { "ADC", NULL, "Line In 1 Mux" },
91*4882a593Smuzhiyun { "Line In 1 Mux", "LIN1", "LIN1_LP" },
92*4882a593Smuzhiyun { "Line In 1 Mux", "LIN1", "LIN1_RP" },
93*4882a593Smuzhiyun { "Line In 1 Mux", "LIN2", "LIN2_LP" },
94*4882a593Smuzhiyun { "Line In 1 Mux", "LIN2", "LIN2_RP" },
95*4882a593Smuzhiyun { "Line In 1 Mux", "LIN3", "LIN3_LP" },
96*4882a593Smuzhiyun { "Line In 1 Mux", "LIN3", "LIN3_RP" },
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun { "DAC HP", NULL, "Headphone 1" },
99*4882a593Smuzhiyun { "DAC LO1", NULL, "Line Out 1" },
100*4882a593Smuzhiyun { "DAC LO2", NULL, "Line Out 2" },
101*4882a593Smuzhiyun { "HP1_L", NULL, "DAC HP" },
102*4882a593Smuzhiyun { "HP1_R", NULL, "DAC HP" },
103*4882a593Smuzhiyun { "LO2_L", NULL, "DAC LO2" },
104*4882a593Smuzhiyun { "LO2_R", NULL, "DAC LO2" },
105*4882a593Smuzhiyun };
106*4882a593Smuzhiyun
evea_set_power_state_on(struct evea_priv * evea)107*4882a593Smuzhiyun static void evea_set_power_state_on(struct evea_priv *evea)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun struct regmap *map = evea->regmap;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun regmap_update_bits(map, AANAPOW, AANAPOW_A_POWD,
112*4882a593Smuzhiyun AANAPOW_A_POWD);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun regmap_update_bits(map, ADAC1ODC, ADAC1ODC_HP_DIS_RES_MASK,
115*4882a593Smuzhiyun ADAC1ODC_HP_DIS_RES_ON);
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun regmap_update_bits(map, ADAC1ODC, ADAC1ODC_ADAC_RAMPCLT_MASK,
118*4882a593Smuzhiyun ADAC1ODC_ADAC_RAMPCLT_REDUCE);
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ2(0), ADACSEQ2_ADACIN_FIX, 0);
121*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ2(1), ADACSEQ2_ADACIN_FIX, 0);
122*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ2(2), ADACSEQ2_ADACIN_FIX, 0);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
evea_set_power_state_off(struct evea_priv * evea)125*4882a593Smuzhiyun static void evea_set_power_state_off(struct evea_priv *evea)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct regmap *map = evea->regmap;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun regmap_update_bits(map, ADAC1ODC, ADAC1ODC_HP_DIS_RES_MASK,
130*4882a593Smuzhiyun ADAC1ODC_HP_DIS_RES_ON);
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(0), ADACSEQ1_MMUTE,
133*4882a593Smuzhiyun ADACSEQ1_MMUTE);
134*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(1), ADACSEQ1_MMUTE,
135*4882a593Smuzhiyun ADACSEQ1_MMUTE);
136*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(2), ADACSEQ1_MMUTE,
137*4882a593Smuzhiyun ADACSEQ1_MMUTE);
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun regmap_update_bits(map, ALO1OUTPOW, ALO1OUTPOW_LO1_ON, 0);
140*4882a593Smuzhiyun regmap_update_bits(map, ALO2OUTPOW, ALO2OUTPOW_LO2_ON, 0);
141*4882a593Smuzhiyun regmap_update_bits(map, AHPOUTPOW, AHPOUTPOW_HP_ON, 0);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
evea_update_switch_lin(struct evea_priv * evea)144*4882a593Smuzhiyun static int evea_update_switch_lin(struct evea_priv *evea)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun struct regmap *map = evea->regmap;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (evea->switch_lin) {
149*4882a593Smuzhiyun regmap_update_bits(map, ALINEPOW,
150*4882a593Smuzhiyun ALINEPOW_LIN2_POWD | ALINEPOW_LIN1_POWD,
151*4882a593Smuzhiyun ALINEPOW_LIN2_POWD | ALINEPOW_LIN1_POWD);
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun regmap_update_bits(map, AADCPOW(0), AADCPOW_AADC_POWD,
154*4882a593Smuzhiyun AADCPOW_AADC_POWD);
155*4882a593Smuzhiyun regmap_update_bits(map, AADCPOW(1), AADCPOW_AADC_POWD,
156*4882a593Smuzhiyun AADCPOW_AADC_POWD);
157*4882a593Smuzhiyun } else {
158*4882a593Smuzhiyun regmap_update_bits(map, AADCPOW(0), AADCPOW_AADC_POWD, 0);
159*4882a593Smuzhiyun regmap_update_bits(map, AADCPOW(1), AADCPOW_AADC_POWD, 0);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun regmap_update_bits(map, ALINEPOW,
162*4882a593Smuzhiyun ALINEPOW_LIN2_POWD | ALINEPOW_LIN1_POWD, 0);
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun return 0;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
evea_update_switch_lo(struct evea_priv * evea)168*4882a593Smuzhiyun static int evea_update_switch_lo(struct evea_priv *evea)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun struct regmap *map = evea->regmap;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (evea->switch_lo) {
173*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(0), ADACSEQ1_MMUTE, 0);
174*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(2), ADACSEQ1_MMUTE, 0);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun regmap_update_bits(map, ALO1OUTPOW, ALO1OUTPOW_LO1_ON,
177*4882a593Smuzhiyun ALO1OUTPOW_LO1_ON);
178*4882a593Smuzhiyun regmap_update_bits(map, ALO2OUTPOW,
179*4882a593Smuzhiyun ALO2OUTPOW_ADAC2_MUTE | ALO2OUTPOW_LO2_ON,
180*4882a593Smuzhiyun ALO2OUTPOW_ADAC2_MUTE | ALO2OUTPOW_LO2_ON);
181*4882a593Smuzhiyun } else {
182*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(0), ADACSEQ1_MMUTE,
183*4882a593Smuzhiyun ADACSEQ1_MMUTE);
184*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(2), ADACSEQ1_MMUTE,
185*4882a593Smuzhiyun ADACSEQ1_MMUTE);
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun regmap_update_bits(map, ALO1OUTPOW, ALO1OUTPOW_LO1_ON, 0);
188*4882a593Smuzhiyun regmap_update_bits(map, ALO2OUTPOW,
189*4882a593Smuzhiyun ALO2OUTPOW_ADAC2_MUTE | ALO2OUTPOW_LO2_ON,
190*4882a593Smuzhiyun 0);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun return 0;
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun
evea_update_switch_hp(struct evea_priv * evea)196*4882a593Smuzhiyun static int evea_update_switch_hp(struct evea_priv *evea)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct regmap *map = evea->regmap;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if (evea->switch_hp) {
201*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(1), ADACSEQ1_MMUTE, 0);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun regmap_update_bits(map, AHPOUTPOW, AHPOUTPOW_HP_ON,
204*4882a593Smuzhiyun AHPOUTPOW_HP_ON);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun regmap_update_bits(map, ADAC1ODC, ADAC1ODC_HP_DIS_RES_MASK,
207*4882a593Smuzhiyun ADAC1ODC_HP_DIS_RES_OFF);
208*4882a593Smuzhiyun } else {
209*4882a593Smuzhiyun regmap_update_bits(map, ADAC1ODC, ADAC1ODC_HP_DIS_RES_MASK,
210*4882a593Smuzhiyun ADAC1ODC_HP_DIS_RES_ON);
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun regmap_update_bits(map, ADACSEQ1(1), ADACSEQ1_MMUTE,
213*4882a593Smuzhiyun ADACSEQ1_MMUTE);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun regmap_update_bits(map, AHPOUTPOW, AHPOUTPOW_HP_ON, 0);
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun return 0;
219*4882a593Smuzhiyun }
220*4882a593Smuzhiyun
evea_update_switch_all(struct evea_priv * evea)221*4882a593Smuzhiyun static void evea_update_switch_all(struct evea_priv *evea)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun evea_update_switch_lin(evea);
224*4882a593Smuzhiyun evea_update_switch_lo(evea);
225*4882a593Smuzhiyun evea_update_switch_hp(evea);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
evea_get_switch_lin(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)228*4882a593Smuzhiyun static int evea_get_switch_lin(struct snd_kcontrol *kcontrol,
229*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
230*4882a593Smuzhiyun {
231*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
232*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun ucontrol->value.integer.value[0] = evea->switch_lin;
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun return 0;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun
evea_set_switch_lin(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)239*4882a593Smuzhiyun static int evea_set_switch_lin(struct snd_kcontrol *kcontrol,
240*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
243*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun if (evea->switch_lin == ucontrol->value.integer.value[0])
246*4882a593Smuzhiyun return 0;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun evea->switch_lin = ucontrol->value.integer.value[0];
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun return evea_update_switch_lin(evea);
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
evea_get_switch_lo(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)253*4882a593Smuzhiyun static int evea_get_switch_lo(struct snd_kcontrol *kcontrol,
254*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
257*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun ucontrol->value.integer.value[0] = evea->switch_lo;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
evea_set_switch_lo(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)264*4882a593Smuzhiyun static int evea_set_switch_lo(struct snd_kcontrol *kcontrol,
265*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
268*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (evea->switch_lo == ucontrol->value.integer.value[0])
271*4882a593Smuzhiyun return 0;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun evea->switch_lo = ucontrol->value.integer.value[0];
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun return evea_update_switch_lo(evea);
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
evea_get_switch_hp(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)278*4882a593Smuzhiyun static int evea_get_switch_hp(struct snd_kcontrol *kcontrol,
279*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
280*4882a593Smuzhiyun {
281*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
282*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
283*4882a593Smuzhiyun
284*4882a593Smuzhiyun ucontrol->value.integer.value[0] = evea->switch_hp;
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
evea_set_switch_hp(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)289*4882a593Smuzhiyun static int evea_set_switch_hp(struct snd_kcontrol *kcontrol,
290*4882a593Smuzhiyun struct snd_ctl_elem_value *ucontrol)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
293*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun if (evea->switch_hp == ucontrol->value.integer.value[0])
296*4882a593Smuzhiyun return 0;
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun evea->switch_hp = ucontrol->value.integer.value[0];
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun return evea_update_switch_hp(evea);
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun static const struct snd_kcontrol_new evea_controls[] = {
304*4882a593Smuzhiyun SOC_SINGLE_BOOL_EXT("Line Capture Switch", 0,
305*4882a593Smuzhiyun evea_get_switch_lin, evea_set_switch_lin),
306*4882a593Smuzhiyun SOC_SINGLE_BOOL_EXT("Line Playback Switch", 0,
307*4882a593Smuzhiyun evea_get_switch_lo, evea_set_switch_lo),
308*4882a593Smuzhiyun SOC_SINGLE_BOOL_EXT("Headphone Playback Switch", 0,
309*4882a593Smuzhiyun evea_get_switch_hp, evea_set_switch_hp),
310*4882a593Smuzhiyun };
311*4882a593Smuzhiyun
evea_codec_probe(struct snd_soc_component * component)312*4882a593Smuzhiyun static int evea_codec_probe(struct snd_soc_component *component)
313*4882a593Smuzhiyun {
314*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun evea->switch_lin = 1;
317*4882a593Smuzhiyun evea->switch_lo = 1;
318*4882a593Smuzhiyun evea->switch_hp = 1;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun evea_set_power_state_on(evea);
321*4882a593Smuzhiyun evea_update_switch_all(evea);
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun return 0;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
evea_codec_suspend(struct snd_soc_component * component)326*4882a593Smuzhiyun static int evea_codec_suspend(struct snd_soc_component *component)
327*4882a593Smuzhiyun {
328*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun evea_set_power_state_off(evea);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun reset_control_assert(evea->rst_adamv);
333*4882a593Smuzhiyun reset_control_assert(evea->rst_exiv);
334*4882a593Smuzhiyun reset_control_assert(evea->rst);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun clk_disable_unprepare(evea->clk_exiv);
337*4882a593Smuzhiyun clk_disable_unprepare(evea->clk);
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun return 0;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
evea_codec_resume(struct snd_soc_component * component)342*4882a593Smuzhiyun static int evea_codec_resume(struct snd_soc_component *component)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun struct evea_priv *evea = snd_soc_component_get_drvdata(component);
345*4882a593Smuzhiyun int ret;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun ret = clk_prepare_enable(evea->clk);
348*4882a593Smuzhiyun if (ret)
349*4882a593Smuzhiyun return ret;
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun ret = clk_prepare_enable(evea->clk_exiv);
352*4882a593Smuzhiyun if (ret)
353*4882a593Smuzhiyun goto err_out_clock;
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun ret = reset_control_deassert(evea->rst);
356*4882a593Smuzhiyun if (ret)
357*4882a593Smuzhiyun goto err_out_clock_exiv;
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun ret = reset_control_deassert(evea->rst_exiv);
360*4882a593Smuzhiyun if (ret)
361*4882a593Smuzhiyun goto err_out_reset;
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun ret = reset_control_deassert(evea->rst_adamv);
364*4882a593Smuzhiyun if (ret)
365*4882a593Smuzhiyun goto err_out_reset_exiv;
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun evea_set_power_state_on(evea);
368*4882a593Smuzhiyun evea_update_switch_all(evea);
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun return 0;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun err_out_reset_exiv:
373*4882a593Smuzhiyun reset_control_assert(evea->rst_exiv);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun err_out_reset:
376*4882a593Smuzhiyun reset_control_assert(evea->rst);
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun err_out_clock_exiv:
379*4882a593Smuzhiyun clk_disable_unprepare(evea->clk_exiv);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun err_out_clock:
382*4882a593Smuzhiyun clk_disable_unprepare(evea->clk);
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun return ret;
385*4882a593Smuzhiyun }
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun static struct snd_soc_component_driver soc_codec_evea = {
388*4882a593Smuzhiyun .probe = evea_codec_probe,
389*4882a593Smuzhiyun .suspend = evea_codec_suspend,
390*4882a593Smuzhiyun .resume = evea_codec_resume,
391*4882a593Smuzhiyun .dapm_widgets = evea_widgets,
392*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(evea_widgets),
393*4882a593Smuzhiyun .dapm_routes = evea_routes,
394*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(evea_routes),
395*4882a593Smuzhiyun .controls = evea_controls,
396*4882a593Smuzhiyun .num_controls = ARRAY_SIZE(evea_controls),
397*4882a593Smuzhiyun .idle_bias_on = 1,
398*4882a593Smuzhiyun .use_pmdown_time = 1,
399*4882a593Smuzhiyun .endianness = 1,
400*4882a593Smuzhiyun .non_legacy_dai_naming = 1,
401*4882a593Smuzhiyun };
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun static struct snd_soc_dai_driver soc_dai_evea[] = {
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun .name = DRV_NAME "-line1",
406*4882a593Smuzhiyun .playback = {
407*4882a593Smuzhiyun .stream_name = "Line Out 1",
408*4882a593Smuzhiyun .formats = EVEA_FORMATS,
409*4882a593Smuzhiyun .rates = EVEA_RATES,
410*4882a593Smuzhiyun .channels_min = 2,
411*4882a593Smuzhiyun .channels_max = 2,
412*4882a593Smuzhiyun },
413*4882a593Smuzhiyun .capture = {
414*4882a593Smuzhiyun .stream_name = "Line In 1",
415*4882a593Smuzhiyun .formats = EVEA_FORMATS,
416*4882a593Smuzhiyun .rates = EVEA_RATES,
417*4882a593Smuzhiyun .channels_min = 2,
418*4882a593Smuzhiyun .channels_max = 2,
419*4882a593Smuzhiyun },
420*4882a593Smuzhiyun },
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun .name = DRV_NAME "-hp1",
423*4882a593Smuzhiyun .playback = {
424*4882a593Smuzhiyun .stream_name = "Headphone 1",
425*4882a593Smuzhiyun .formats = EVEA_FORMATS,
426*4882a593Smuzhiyun .rates = EVEA_RATES,
427*4882a593Smuzhiyun .channels_min = 2,
428*4882a593Smuzhiyun .channels_max = 2,
429*4882a593Smuzhiyun },
430*4882a593Smuzhiyun },
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun .name = DRV_NAME "-lo2",
433*4882a593Smuzhiyun .playback = {
434*4882a593Smuzhiyun .stream_name = "Line Out 2",
435*4882a593Smuzhiyun .formats = EVEA_FORMATS,
436*4882a593Smuzhiyun .rates = EVEA_RATES,
437*4882a593Smuzhiyun .channels_min = 2,
438*4882a593Smuzhiyun .channels_max = 2,
439*4882a593Smuzhiyun },
440*4882a593Smuzhiyun },
441*4882a593Smuzhiyun };
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun static const struct regmap_config evea_regmap_config = {
444*4882a593Smuzhiyun .reg_bits = 32,
445*4882a593Smuzhiyun .reg_stride = 4,
446*4882a593Smuzhiyun .val_bits = 32,
447*4882a593Smuzhiyun .max_register = 0xffc,
448*4882a593Smuzhiyun .cache_type = REGCACHE_NONE,
449*4882a593Smuzhiyun };
450*4882a593Smuzhiyun
evea_probe(struct platform_device * pdev)451*4882a593Smuzhiyun static int evea_probe(struct platform_device *pdev)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun struct evea_priv *evea;
454*4882a593Smuzhiyun void __iomem *preg;
455*4882a593Smuzhiyun int ret;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun evea = devm_kzalloc(&pdev->dev, sizeof(struct evea_priv), GFP_KERNEL);
458*4882a593Smuzhiyun if (!evea)
459*4882a593Smuzhiyun return -ENOMEM;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun evea->clk = devm_clk_get(&pdev->dev, "evea");
462*4882a593Smuzhiyun if (IS_ERR(evea->clk))
463*4882a593Smuzhiyun return PTR_ERR(evea->clk);
464*4882a593Smuzhiyun
465*4882a593Smuzhiyun evea->clk_exiv = devm_clk_get(&pdev->dev, "exiv");
466*4882a593Smuzhiyun if (IS_ERR(evea->clk_exiv))
467*4882a593Smuzhiyun return PTR_ERR(evea->clk_exiv);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun evea->rst = devm_reset_control_get_shared(&pdev->dev, "evea");
470*4882a593Smuzhiyun if (IS_ERR(evea->rst))
471*4882a593Smuzhiyun return PTR_ERR(evea->rst);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun evea->rst_exiv = devm_reset_control_get_shared(&pdev->dev, "exiv");
474*4882a593Smuzhiyun if (IS_ERR(evea->rst_exiv))
475*4882a593Smuzhiyun return PTR_ERR(evea->rst_exiv);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun preg = devm_platform_ioremap_resource(pdev, 0);
478*4882a593Smuzhiyun if (IS_ERR(preg))
479*4882a593Smuzhiyun return PTR_ERR(preg);
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun evea->regmap = devm_regmap_init_mmio(&pdev->dev, preg,
482*4882a593Smuzhiyun &evea_regmap_config);
483*4882a593Smuzhiyun if (IS_ERR(evea->regmap))
484*4882a593Smuzhiyun return PTR_ERR(evea->regmap);
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun ret = clk_prepare_enable(evea->clk);
487*4882a593Smuzhiyun if (ret)
488*4882a593Smuzhiyun return ret;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun ret = clk_prepare_enable(evea->clk_exiv);
491*4882a593Smuzhiyun if (ret)
492*4882a593Smuzhiyun goto err_out_clock;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun ret = reset_control_deassert(evea->rst);
495*4882a593Smuzhiyun if (ret)
496*4882a593Smuzhiyun goto err_out_clock_exiv;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun ret = reset_control_deassert(evea->rst_exiv);
499*4882a593Smuzhiyun if (ret)
500*4882a593Smuzhiyun goto err_out_reset;
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun /* ADAMV will hangup if EXIV reset is asserted */
503*4882a593Smuzhiyun evea->rst_adamv = devm_reset_control_get_shared(&pdev->dev, "adamv");
504*4882a593Smuzhiyun if (IS_ERR(evea->rst_adamv)) {
505*4882a593Smuzhiyun ret = PTR_ERR(evea->rst_adamv);
506*4882a593Smuzhiyun goto err_out_reset_exiv;
507*4882a593Smuzhiyun }
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun ret = reset_control_deassert(evea->rst_adamv);
510*4882a593Smuzhiyun if (ret)
511*4882a593Smuzhiyun goto err_out_reset_exiv;
512*4882a593Smuzhiyun
513*4882a593Smuzhiyun platform_set_drvdata(pdev, evea);
514*4882a593Smuzhiyun
515*4882a593Smuzhiyun ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_evea,
516*4882a593Smuzhiyun soc_dai_evea, ARRAY_SIZE(soc_dai_evea));
517*4882a593Smuzhiyun if (ret)
518*4882a593Smuzhiyun goto err_out_reset_adamv;
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun return 0;
521*4882a593Smuzhiyun
522*4882a593Smuzhiyun err_out_reset_adamv:
523*4882a593Smuzhiyun reset_control_assert(evea->rst_adamv);
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun err_out_reset_exiv:
526*4882a593Smuzhiyun reset_control_assert(evea->rst_exiv);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun err_out_reset:
529*4882a593Smuzhiyun reset_control_assert(evea->rst);
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun err_out_clock_exiv:
532*4882a593Smuzhiyun clk_disable_unprepare(evea->clk_exiv);
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun err_out_clock:
535*4882a593Smuzhiyun clk_disable_unprepare(evea->clk);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun return ret;
538*4882a593Smuzhiyun }
539*4882a593Smuzhiyun
evea_remove(struct platform_device * pdev)540*4882a593Smuzhiyun static int evea_remove(struct platform_device *pdev)
541*4882a593Smuzhiyun {
542*4882a593Smuzhiyun struct evea_priv *evea = platform_get_drvdata(pdev);
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun reset_control_assert(evea->rst_adamv);
545*4882a593Smuzhiyun reset_control_assert(evea->rst_exiv);
546*4882a593Smuzhiyun reset_control_assert(evea->rst);
547*4882a593Smuzhiyun
548*4882a593Smuzhiyun clk_disable_unprepare(evea->clk_exiv);
549*4882a593Smuzhiyun clk_disable_unprepare(evea->clk);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun return 0;
552*4882a593Smuzhiyun }
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun static const struct of_device_id evea_of_match[] = {
555*4882a593Smuzhiyun { .compatible = "socionext,uniphier-evea", },
556*4882a593Smuzhiyun {}
557*4882a593Smuzhiyun };
558*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, evea_of_match);
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun static struct platform_driver evea_codec_driver = {
561*4882a593Smuzhiyun .driver = {
562*4882a593Smuzhiyun .name = DRV_NAME,
563*4882a593Smuzhiyun .of_match_table = of_match_ptr(evea_of_match),
564*4882a593Smuzhiyun },
565*4882a593Smuzhiyun .probe = evea_probe,
566*4882a593Smuzhiyun .remove = evea_remove,
567*4882a593Smuzhiyun };
568*4882a593Smuzhiyun module_platform_driver(evea_codec_driver);
569*4882a593Smuzhiyun
570*4882a593Smuzhiyun MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
571*4882a593Smuzhiyun MODULE_DESCRIPTION("UniPhier EVEA codec driver");
572*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
573