1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Socionext UniPhier AIO ALSA driver for PXs2.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2018 Socionext Inc.
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "aio.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun static const struct uniphier_aio_spec uniphier_aio_pxs2[] = {
12*4882a593Smuzhiyun /* for Line PCM In, Pin:AI1Dx */
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun .name = AUD_NAME_PCMIN1,
15*4882a593Smuzhiyun .gname = AUD_GNAME_LINE,
16*4882a593Smuzhiyun .swm = {
17*4882a593Smuzhiyun .type = PORT_TYPE_I2S,
18*4882a593Smuzhiyun .dir = PORT_DIR_INPUT,
19*4882a593Smuzhiyun .rb = { 16, 11, },
20*4882a593Smuzhiyun .ch = { 16, 11, },
21*4882a593Smuzhiyun .iif = { 0, 0, },
22*4882a593Smuzhiyun .iport = { 0, AUD_HW_PCMIN1, },
23*4882a593Smuzhiyun },
24*4882a593Smuzhiyun },
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* for Speaker/Headphone/Mic PCM In, Pin:AI2Dx */
27*4882a593Smuzhiyun {
28*4882a593Smuzhiyun .name = AUD_NAME_PCMIN2,
29*4882a593Smuzhiyun .gname = AUD_GNAME_AUX,
30*4882a593Smuzhiyun .swm = {
31*4882a593Smuzhiyun .type = PORT_TYPE_I2S,
32*4882a593Smuzhiyun .dir = PORT_DIR_INPUT,
33*4882a593Smuzhiyun .rb = { 17, 12, },
34*4882a593Smuzhiyun .ch = { 17, 12, },
35*4882a593Smuzhiyun .iif = { 1, 1, },
36*4882a593Smuzhiyun .iport = { 1, AUD_HW_PCMIN2, },
37*4882a593Smuzhiyun },
38*4882a593Smuzhiyun },
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* for HDMI PCM Out, Pin:AO1Dx (inner) */
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun .name = AUD_NAME_HPCMOUT1,
43*4882a593Smuzhiyun .gname = AUD_GNAME_HDMI,
44*4882a593Smuzhiyun .swm = {
45*4882a593Smuzhiyun .type = PORT_TYPE_I2S,
46*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
47*4882a593Smuzhiyun .rb = { 0, 0, },
48*4882a593Smuzhiyun .ch = { 0, 0, },
49*4882a593Smuzhiyun .oif = { 0, 0, },
50*4882a593Smuzhiyun .oport = { 3, AUD_HW_HPCMOUT1, },
51*4882a593Smuzhiyun },
52*4882a593Smuzhiyun },
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* for Line PCM Out, Pin:AO2Dx */
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun .name = AUD_NAME_PCMOUT1,
57*4882a593Smuzhiyun .gname = AUD_GNAME_LINE,
58*4882a593Smuzhiyun .swm = {
59*4882a593Smuzhiyun .type = PORT_TYPE_I2S,
60*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
61*4882a593Smuzhiyun .rb = { 1, 1, },
62*4882a593Smuzhiyun .ch = { 1, 1, },
63*4882a593Smuzhiyun .oif = { 1, 1, },
64*4882a593Smuzhiyun .oport = { 0, AUD_HW_PCMOUT1, },
65*4882a593Smuzhiyun },
66*4882a593Smuzhiyun },
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun /* for Speaker/Headphone/Mic PCM Out, Pin:AO3Dx */
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun .name = AUD_NAME_PCMOUT2,
71*4882a593Smuzhiyun .gname = AUD_GNAME_AUX,
72*4882a593Smuzhiyun .swm = {
73*4882a593Smuzhiyun .type = PORT_TYPE_I2S,
74*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
75*4882a593Smuzhiyun .rb = { 2, 2, },
76*4882a593Smuzhiyun .ch = { 2, 2, },
77*4882a593Smuzhiyun .oif = { 2, 2, },
78*4882a593Smuzhiyun .oport = { 1, AUD_HW_PCMOUT2, },
79*4882a593Smuzhiyun },
80*4882a593Smuzhiyun },
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun /* for HDMI Out, Pin:AO1IEC */
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun .name = AUD_NAME_HIECOUT1,
85*4882a593Smuzhiyun .swm = {
86*4882a593Smuzhiyun .type = PORT_TYPE_SPDIF,
87*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
88*4882a593Smuzhiyun .rb = { 6, 4, },
89*4882a593Smuzhiyun .ch = { 6, 4, },
90*4882a593Smuzhiyun .oif = { 6, 4, },
91*4882a593Smuzhiyun .oport = { 12, AUD_HW_HIECOUT1, },
92*4882a593Smuzhiyun },
93*4882a593Smuzhiyun },
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /* for HDMI Out, Pin:AO1IEC, Compress */
96*4882a593Smuzhiyun {
97*4882a593Smuzhiyun .name = AUD_NAME_HIECCOMPOUT1,
98*4882a593Smuzhiyun .swm = {
99*4882a593Smuzhiyun .type = PORT_TYPE_SPDIF,
100*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
101*4882a593Smuzhiyun .rb = { 6, 4, },
102*4882a593Smuzhiyun .ch = { 6, 4, },
103*4882a593Smuzhiyun .oif = { 6, 4, },
104*4882a593Smuzhiyun .oport = { 12, AUD_HW_HIECOUT1, },
105*4882a593Smuzhiyun },
106*4882a593Smuzhiyun },
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* for S/PDIF Out, Pin:AO2IEC */
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun .name = AUD_NAME_IECOUT1,
111*4882a593Smuzhiyun .swm = {
112*4882a593Smuzhiyun .type = PORT_TYPE_SPDIF,
113*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
114*4882a593Smuzhiyun .rb = { 7, 5, },
115*4882a593Smuzhiyun .ch = { 7, 5, },
116*4882a593Smuzhiyun .oif = { 7, 5, },
117*4882a593Smuzhiyun .oport = { 13, AUD_HW_IECOUT1, },
118*4882a593Smuzhiyun },
119*4882a593Smuzhiyun },
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* for S/PDIF Out, Pin:AO2IEC */
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun .name = AUD_NAME_IECCOMPOUT1,
124*4882a593Smuzhiyun .swm = {
125*4882a593Smuzhiyun .type = PORT_TYPE_SPDIF,
126*4882a593Smuzhiyun .dir = PORT_DIR_OUTPUT,
127*4882a593Smuzhiyun .rb = { 7, 5, },
128*4882a593Smuzhiyun .ch = { 7, 5, },
129*4882a593Smuzhiyun .oif = { 7, 5, },
130*4882a593Smuzhiyun .oport = { 13, AUD_HW_IECOUT1, },
131*4882a593Smuzhiyun },
132*4882a593Smuzhiyun },
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun static const struct uniphier_aio_pll uniphier_aio_pll_pxs2[] = {
136*4882a593Smuzhiyun [AUD_PLL_A1] = { .enable = true, },
137*4882a593Smuzhiyun [AUD_PLL_F1] = { .enable = true, },
138*4882a593Smuzhiyun [AUD_PLL_A2] = { .enable = true, },
139*4882a593Smuzhiyun [AUD_PLL_F2] = { .enable = true, },
140*4882a593Smuzhiyun [AUD_PLL_APLL] = { .enable = true, },
141*4882a593Smuzhiyun [AUD_PLL_HSC0] = { .enable = true, },
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun
uniphier_aio_pxs2_probe(struct snd_soc_dai * dai)144*4882a593Smuzhiyun static int uniphier_aio_pxs2_probe(struct snd_soc_dai *dai)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun int ret;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun ret = uniphier_aio_dai_probe(dai);
149*4882a593Smuzhiyun if (ret < 0)
150*4882a593Smuzhiyun return ret;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun ret = snd_soc_dai_set_pll(dai, AUD_PLL_A1, 0, 0, 36864000);
153*4882a593Smuzhiyun if (ret < 0)
154*4882a593Smuzhiyun return ret;
155*4882a593Smuzhiyun ret = snd_soc_dai_set_pll(dai, AUD_PLL_F1, 0, 0, 36864000);
156*4882a593Smuzhiyun if (ret < 0)
157*4882a593Smuzhiyun return ret;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun ret = snd_soc_dai_set_pll(dai, AUD_PLL_A2, 0, 0, 33868800);
160*4882a593Smuzhiyun if (ret < 0)
161*4882a593Smuzhiyun return ret;
162*4882a593Smuzhiyun ret = snd_soc_dai_set_pll(dai, AUD_PLL_F2, 0, 0, 33868800);
163*4882a593Smuzhiyun if (ret < 0)
164*4882a593Smuzhiyun return ret;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun return 0;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun static struct snd_soc_dai_driver uniphier_aio_dai_pxs2[] = {
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun .name = AUD_GNAME_HDMI,
172*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
173*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
174*4882a593Smuzhiyun .playback = {
175*4882a593Smuzhiyun .stream_name = AUD_NAME_HPCMOUT1,
176*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
177*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
178*4882a593Smuzhiyun .channels_min = 2,
179*4882a593Smuzhiyun .channels_max = 2,
180*4882a593Smuzhiyun },
181*4882a593Smuzhiyun .ops = &uniphier_aio_i2s_ops,
182*4882a593Smuzhiyun },
183*4882a593Smuzhiyun {
184*4882a593Smuzhiyun .name = AUD_GNAME_LINE,
185*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
186*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
187*4882a593Smuzhiyun .playback = {
188*4882a593Smuzhiyun .stream_name = AUD_NAME_PCMOUT1,
189*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
190*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
191*4882a593Smuzhiyun .channels_min = 2,
192*4882a593Smuzhiyun .channels_max = 2,
193*4882a593Smuzhiyun },
194*4882a593Smuzhiyun .capture = {
195*4882a593Smuzhiyun .stream_name = AUD_NAME_PCMIN1,
196*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
197*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
198*4882a593Smuzhiyun .channels_min = 2,
199*4882a593Smuzhiyun .channels_max = 2,
200*4882a593Smuzhiyun },
201*4882a593Smuzhiyun .ops = &uniphier_aio_i2s_ops,
202*4882a593Smuzhiyun },
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun .name = AUD_GNAME_AUX,
205*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
206*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
207*4882a593Smuzhiyun .playback = {
208*4882a593Smuzhiyun .stream_name = AUD_NAME_PCMOUT2,
209*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
210*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
211*4882a593Smuzhiyun .channels_min = 2,
212*4882a593Smuzhiyun .channels_max = 2,
213*4882a593Smuzhiyun },
214*4882a593Smuzhiyun .capture = {
215*4882a593Smuzhiyun .stream_name = AUD_NAME_PCMIN2,
216*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
217*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
218*4882a593Smuzhiyun .channels_min = 2,
219*4882a593Smuzhiyun .channels_max = 2,
220*4882a593Smuzhiyun },
221*4882a593Smuzhiyun .ops = &uniphier_aio_i2s_ops,
222*4882a593Smuzhiyun },
223*4882a593Smuzhiyun {
224*4882a593Smuzhiyun .name = AUD_NAME_HIECOUT1,
225*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
226*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
227*4882a593Smuzhiyun .playback = {
228*4882a593Smuzhiyun .stream_name = AUD_NAME_HIECOUT1,
229*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
230*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
231*4882a593Smuzhiyun .channels_min = 2,
232*4882a593Smuzhiyun .channels_max = 2,
233*4882a593Smuzhiyun },
234*4882a593Smuzhiyun .ops = &uniphier_aio_spdif_ops,
235*4882a593Smuzhiyun },
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun .name = AUD_NAME_IECOUT1,
238*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
239*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
240*4882a593Smuzhiyun .playback = {
241*4882a593Smuzhiyun .stream_name = AUD_NAME_IECOUT1,
242*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
243*4882a593Smuzhiyun .rates = SNDRV_PCM_RATE_48000,
244*4882a593Smuzhiyun .channels_min = 2,
245*4882a593Smuzhiyun .channels_max = 2,
246*4882a593Smuzhiyun },
247*4882a593Smuzhiyun .ops = &uniphier_aio_spdif_ops,
248*4882a593Smuzhiyun },
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun .name = AUD_NAME_HIECCOMPOUT1,
251*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
252*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
253*4882a593Smuzhiyun .compress_new = snd_soc_new_compress,
254*4882a593Smuzhiyun .playback = {
255*4882a593Smuzhiyun .stream_name = AUD_NAME_HIECCOMPOUT1,
256*4882a593Smuzhiyun .channels_min = 1,
257*4882a593Smuzhiyun .channels_max = 1,
258*4882a593Smuzhiyun },
259*4882a593Smuzhiyun .ops = &uniphier_aio_spdif_ops,
260*4882a593Smuzhiyun },
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun .name = AUD_NAME_IECCOMPOUT1,
263*4882a593Smuzhiyun .probe = uniphier_aio_pxs2_probe,
264*4882a593Smuzhiyun .remove = uniphier_aio_dai_remove,
265*4882a593Smuzhiyun .compress_new = snd_soc_new_compress,
266*4882a593Smuzhiyun .playback = {
267*4882a593Smuzhiyun .stream_name = AUD_NAME_IECCOMPOUT1,
268*4882a593Smuzhiyun .channels_min = 1,
269*4882a593Smuzhiyun .channels_max = 1,
270*4882a593Smuzhiyun },
271*4882a593Smuzhiyun .ops = &uniphier_aio_spdif_ops,
272*4882a593Smuzhiyun },
273*4882a593Smuzhiyun };
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun static const struct uniphier_aio_chip_spec uniphier_aio_pxs2_spec = {
276*4882a593Smuzhiyun .specs = uniphier_aio_pxs2,
277*4882a593Smuzhiyun .num_specs = ARRAY_SIZE(uniphier_aio_pxs2),
278*4882a593Smuzhiyun .dais = uniphier_aio_dai_pxs2,
279*4882a593Smuzhiyun .num_dais = ARRAY_SIZE(uniphier_aio_dai_pxs2),
280*4882a593Smuzhiyun .plls = uniphier_aio_pll_pxs2,
281*4882a593Smuzhiyun .num_plls = ARRAY_SIZE(uniphier_aio_pll_pxs2),
282*4882a593Smuzhiyun .addr_ext = 0,
283*4882a593Smuzhiyun };
284*4882a593Smuzhiyun
285*4882a593Smuzhiyun static const struct of_device_id uniphier_aio_of_match[] = {
286*4882a593Smuzhiyun {
287*4882a593Smuzhiyun .compatible = "socionext,uniphier-pxs2-aio",
288*4882a593Smuzhiyun .data = &uniphier_aio_pxs2_spec,
289*4882a593Smuzhiyun },
290*4882a593Smuzhiyun {},
291*4882a593Smuzhiyun };
292*4882a593Smuzhiyun MODULE_DEVICE_TABLE(of, uniphier_aio_of_match);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun static struct platform_driver uniphier_aio_driver = {
295*4882a593Smuzhiyun .driver = {
296*4882a593Smuzhiyun .name = "snd-uniphier-aio-pxs2",
297*4882a593Smuzhiyun .of_match_table = of_match_ptr(uniphier_aio_of_match),
298*4882a593Smuzhiyun },
299*4882a593Smuzhiyun .probe = uniphier_aio_probe,
300*4882a593Smuzhiyun .remove = uniphier_aio_remove,
301*4882a593Smuzhiyun };
302*4882a593Smuzhiyun module_platform_driver(uniphier_aio_driver);
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
305*4882a593Smuzhiyun MODULE_DESCRIPTION("UniPhier PXs2 AIO driver.");
306*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
307