xref: /OK3568_Linux_fs/kernel/sound/soc/uniphier/aio-dma.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Socionext UniPhier AIO DMA driver.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2016-2018 Socionext Inc.
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/dma-mapping.h>
8*4882a593Smuzhiyun #include <linux/errno.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/module.h>
11*4882a593Smuzhiyun #include <sound/core.h>
12*4882a593Smuzhiyun #include <sound/pcm.h>
13*4882a593Smuzhiyun #include <sound/soc.h>
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #include "aio.h"
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun static struct snd_pcm_hardware uniphier_aiodma_hw = {
18*4882a593Smuzhiyun 	.info = SNDRV_PCM_INFO_MMAP |
19*4882a593Smuzhiyun 		SNDRV_PCM_INFO_MMAP_VALID |
20*4882a593Smuzhiyun 		SNDRV_PCM_INFO_INTERLEAVED,
21*4882a593Smuzhiyun 	.period_bytes_min = 256,
22*4882a593Smuzhiyun 	.period_bytes_max = 4096,
23*4882a593Smuzhiyun 	.periods_min      = 4,
24*4882a593Smuzhiyun 	.periods_max      = 1024,
25*4882a593Smuzhiyun 	.buffer_bytes_max = 128 * 1024,
26*4882a593Smuzhiyun };
27*4882a593Smuzhiyun 
aiodma_pcm_irq(struct uniphier_aio_sub * sub)28*4882a593Smuzhiyun static void aiodma_pcm_irq(struct uniphier_aio_sub *sub)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = sub->substream->runtime;
31*4882a593Smuzhiyun 	int bytes = runtime->period_size *
32*4882a593Smuzhiyun 		runtime->channels * samples_to_bytes(runtime, 1);
33*4882a593Smuzhiyun 	int ret;
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun 	spin_lock(&sub->lock);
36*4882a593Smuzhiyun 	ret = aiodma_rb_set_threshold(sub, runtime->dma_bytes,
37*4882a593Smuzhiyun 				      sub->threshold + bytes);
38*4882a593Smuzhiyun 	if (!ret)
39*4882a593Smuzhiyun 		sub->threshold += bytes;
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun 	aiodma_rb_sync(sub, runtime->dma_addr, runtime->dma_bytes, bytes);
42*4882a593Smuzhiyun 	aiodma_rb_clear_irq(sub);
43*4882a593Smuzhiyun 	spin_unlock(&sub->lock);
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	snd_pcm_period_elapsed(sub->substream);
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun 
aiodma_compr_irq(struct uniphier_aio_sub * sub)48*4882a593Smuzhiyun static void aiodma_compr_irq(struct uniphier_aio_sub *sub)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun 	struct snd_compr_runtime *runtime = sub->cstream->runtime;
51*4882a593Smuzhiyun 	int bytes = runtime->fragment_size;
52*4882a593Smuzhiyun 	int ret;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	spin_lock(&sub->lock);
55*4882a593Smuzhiyun 	ret = aiodma_rb_set_threshold(sub, sub->compr_bytes,
56*4882a593Smuzhiyun 				      sub->threshold + bytes);
57*4882a593Smuzhiyun 	if (!ret)
58*4882a593Smuzhiyun 		sub->threshold += bytes;
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 	aiodma_rb_sync(sub, sub->compr_addr, sub->compr_bytes, bytes);
61*4882a593Smuzhiyun 	aiodma_rb_clear_irq(sub);
62*4882a593Smuzhiyun 	spin_unlock(&sub->lock);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	snd_compr_fragment_elapsed(sub->cstream);
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
aiodma_irq(int irq,void * p)67*4882a593Smuzhiyun static irqreturn_t aiodma_irq(int irq, void *p)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	struct platform_device *pdev = p;
70*4882a593Smuzhiyun 	struct uniphier_aio_chip *chip = platform_get_drvdata(pdev);
71*4882a593Smuzhiyun 	irqreturn_t ret = IRQ_NONE;
72*4882a593Smuzhiyun 	int i, j;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun 	for (i = 0; i < chip->num_aios; i++) {
75*4882a593Smuzhiyun 		struct uniphier_aio *aio = &chip->aios[i];
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 		for (j = 0; j < ARRAY_SIZE(aio->sub); j++) {
78*4882a593Smuzhiyun 			struct uniphier_aio_sub *sub = &aio->sub[j];
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 			/* Skip channel that does not trigger */
81*4882a593Smuzhiyun 			if (!sub->running || !aiodma_rb_is_irq(sub))
82*4882a593Smuzhiyun 				continue;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun 			if (sub->substream)
85*4882a593Smuzhiyun 				aiodma_pcm_irq(sub);
86*4882a593Smuzhiyun 			if (sub->cstream)
87*4882a593Smuzhiyun 				aiodma_compr_irq(sub);
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 			ret = IRQ_HANDLED;
90*4882a593Smuzhiyun 		}
91*4882a593Smuzhiyun 	}
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	return ret;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun 
uniphier_aiodma_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)96*4882a593Smuzhiyun static int uniphier_aiodma_open(struct snd_soc_component *component,
97*4882a593Smuzhiyun 				struct snd_pcm_substream *substream)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 	snd_soc_set_runtime_hwparams(substream, &uniphier_aiodma_hw);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	return snd_pcm_hw_constraint_step(runtime, 0,
104*4882a593Smuzhiyun 		SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 256);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
uniphier_aiodma_prepare(struct snd_soc_component * component,struct snd_pcm_substream * substream)107*4882a593Smuzhiyun static int uniphier_aiodma_prepare(struct snd_soc_component *component,
108*4882a593Smuzhiyun 				   struct snd_pcm_substream *substream)
109*4882a593Smuzhiyun {
110*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
111*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
112*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(asoc_rtd_to_cpu(rtd, 0));
113*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
114*4882a593Smuzhiyun 	int bytes = runtime->period_size *
115*4882a593Smuzhiyun 		runtime->channels * samples_to_bytes(runtime, 1);
116*4882a593Smuzhiyun 	unsigned long flags;
117*4882a593Smuzhiyun 	int ret;
118*4882a593Smuzhiyun 
119*4882a593Smuzhiyun 	ret = aiodma_ch_set_param(sub);
120*4882a593Smuzhiyun 	if (ret)
121*4882a593Smuzhiyun 		return ret;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	spin_lock_irqsave(&sub->lock, flags);
124*4882a593Smuzhiyun 	ret = aiodma_rb_set_buffer(sub, runtime->dma_addr,
125*4882a593Smuzhiyun 				   runtime->dma_addr + runtime->dma_bytes,
126*4882a593Smuzhiyun 				   bytes);
127*4882a593Smuzhiyun 	spin_unlock_irqrestore(&sub->lock, flags);
128*4882a593Smuzhiyun 	if (ret)
129*4882a593Smuzhiyun 		return ret;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return 0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
uniphier_aiodma_trigger(struct snd_soc_component * component,struct snd_pcm_substream * substream,int cmd)134*4882a593Smuzhiyun static int uniphier_aiodma_trigger(struct snd_soc_component *component,
135*4882a593Smuzhiyun 				   struct snd_pcm_substream *substream, int cmd)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
138*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
139*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(asoc_rtd_to_cpu(rtd, 0));
140*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
141*4882a593Smuzhiyun 	struct device *dev = &aio->chip->pdev->dev;
142*4882a593Smuzhiyun 	int bytes = runtime->period_size *
143*4882a593Smuzhiyun 		runtime->channels * samples_to_bytes(runtime, 1);
144*4882a593Smuzhiyun 	unsigned long flags;
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 	spin_lock_irqsave(&sub->lock, flags);
147*4882a593Smuzhiyun 	switch (cmd) {
148*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_START:
149*4882a593Smuzhiyun 		aiodma_rb_sync(sub, runtime->dma_addr, runtime->dma_bytes,
150*4882a593Smuzhiyun 			       bytes);
151*4882a593Smuzhiyun 		aiodma_ch_set_enable(sub, 1);
152*4882a593Smuzhiyun 		sub->running = 1;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 		break;
155*4882a593Smuzhiyun 	case SNDRV_PCM_TRIGGER_STOP:
156*4882a593Smuzhiyun 		sub->running = 0;
157*4882a593Smuzhiyun 		aiodma_ch_set_enable(sub, 0);
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 		break;
160*4882a593Smuzhiyun 	default:
161*4882a593Smuzhiyun 		dev_warn(dev, "Unknown trigger(%d) ignored\n", cmd);
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	}
164*4882a593Smuzhiyun 	spin_unlock_irqrestore(&sub->lock, flags);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	return 0;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun 
uniphier_aiodma_pointer(struct snd_soc_component * component,struct snd_pcm_substream * substream)169*4882a593Smuzhiyun static snd_pcm_uframes_t uniphier_aiodma_pointer(
170*4882a593Smuzhiyun 					struct snd_soc_component *component,
171*4882a593Smuzhiyun 					struct snd_pcm_substream *substream)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	struct snd_pcm_runtime *runtime = substream->runtime;
174*4882a593Smuzhiyun 	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
175*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(asoc_rtd_to_cpu(rtd, 0));
176*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
177*4882a593Smuzhiyun 	int bytes = runtime->period_size *
178*4882a593Smuzhiyun 		runtime->channels * samples_to_bytes(runtime, 1);
179*4882a593Smuzhiyun 	unsigned long flags;
180*4882a593Smuzhiyun 	snd_pcm_uframes_t pos;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	spin_lock_irqsave(&sub->lock, flags);
183*4882a593Smuzhiyun 	aiodma_rb_sync(sub, runtime->dma_addr, runtime->dma_bytes, bytes);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	if (sub->swm->dir == PORT_DIR_OUTPUT)
186*4882a593Smuzhiyun 		pos = bytes_to_frames(runtime, sub->rd_offs);
187*4882a593Smuzhiyun 	else
188*4882a593Smuzhiyun 		pos = bytes_to_frames(runtime, sub->wr_offs);
189*4882a593Smuzhiyun 	spin_unlock_irqrestore(&sub->lock, flags);
190*4882a593Smuzhiyun 
191*4882a593Smuzhiyun 	return pos;
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
uniphier_aiodma_mmap(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct vm_area_struct * vma)194*4882a593Smuzhiyun static int uniphier_aiodma_mmap(struct snd_soc_component *component,
195*4882a593Smuzhiyun 				struct snd_pcm_substream *substream,
196*4882a593Smuzhiyun 				struct vm_area_struct *vma)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun 	return remap_pfn_range(vma, vma->vm_start,
201*4882a593Smuzhiyun 			       substream->runtime->dma_addr >> PAGE_SHIFT,
202*4882a593Smuzhiyun 			       vma->vm_end - vma->vm_start, vma->vm_page_prot);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun 
uniphier_aiodma_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)205*4882a593Smuzhiyun static int uniphier_aiodma_new(struct snd_soc_component *component,
206*4882a593Smuzhiyun 			       struct snd_soc_pcm_runtime *rtd)
207*4882a593Smuzhiyun {
208*4882a593Smuzhiyun 	struct device *dev = rtd->card->snd_card->dev;
209*4882a593Smuzhiyun 	struct snd_pcm *pcm = rtd->pcm;
210*4882a593Smuzhiyun 	int ret;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(33));
213*4882a593Smuzhiyun 	if (ret)
214*4882a593Smuzhiyun 		return ret;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	snd_pcm_set_managed_buffer_all(pcm,
217*4882a593Smuzhiyun 		SNDRV_DMA_TYPE_DEV, dev,
218*4882a593Smuzhiyun 		uniphier_aiodma_hw.buffer_bytes_max,
219*4882a593Smuzhiyun 		uniphier_aiodma_hw.buffer_bytes_max);
220*4882a593Smuzhiyun 	return 0;
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun static const struct snd_soc_component_driver uniphier_soc_platform = {
224*4882a593Smuzhiyun 	.open		= uniphier_aiodma_open,
225*4882a593Smuzhiyun 	.prepare	= uniphier_aiodma_prepare,
226*4882a593Smuzhiyun 	.trigger	= uniphier_aiodma_trigger,
227*4882a593Smuzhiyun 	.pointer	= uniphier_aiodma_pointer,
228*4882a593Smuzhiyun 	.mmap		= uniphier_aiodma_mmap,
229*4882a593Smuzhiyun 	.pcm_construct	= uniphier_aiodma_new,
230*4882a593Smuzhiyun 	.compress_ops	= &uniphier_aio_compress_ops,
231*4882a593Smuzhiyun };
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun static const struct regmap_config aiodma_regmap_config = {
234*4882a593Smuzhiyun 	.reg_bits      = 32,
235*4882a593Smuzhiyun 	.reg_stride    = 4,
236*4882a593Smuzhiyun 	.val_bits      = 32,
237*4882a593Smuzhiyun 	.max_register  = 0x7fffc,
238*4882a593Smuzhiyun 	.cache_type    = REGCACHE_NONE,
239*4882a593Smuzhiyun };
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun /**
242*4882a593Smuzhiyun  * uniphier_aiodma_soc_register_platform - register the AIO DMA
243*4882a593Smuzhiyun  * @pdev: the platform device
244*4882a593Smuzhiyun  *
245*4882a593Smuzhiyun  * Register and setup the DMA of AIO to transfer the sound data to device.
246*4882a593Smuzhiyun  * This function need to call once at driver startup and need NOT to call
247*4882a593Smuzhiyun  * unregister function.
248*4882a593Smuzhiyun  *
249*4882a593Smuzhiyun  * Return: Zero if successful, otherwise a negative value on error.
250*4882a593Smuzhiyun  */
uniphier_aiodma_soc_register_platform(struct platform_device * pdev)251*4882a593Smuzhiyun int uniphier_aiodma_soc_register_platform(struct platform_device *pdev)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	struct uniphier_aio_chip *chip = platform_get_drvdata(pdev);
254*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
255*4882a593Smuzhiyun 	void __iomem *preg;
256*4882a593Smuzhiyun 	int irq, ret;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	preg = devm_platform_ioremap_resource(pdev, 0);
259*4882a593Smuzhiyun 	if (IS_ERR(preg))
260*4882a593Smuzhiyun 		return PTR_ERR(preg);
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	chip->regmap = devm_regmap_init_mmio(dev, preg,
263*4882a593Smuzhiyun 					     &aiodma_regmap_config);
264*4882a593Smuzhiyun 	if (IS_ERR(chip->regmap))
265*4882a593Smuzhiyun 		return PTR_ERR(chip->regmap);
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	irq = platform_get_irq(pdev, 0);
268*4882a593Smuzhiyun 	if (irq < 0)
269*4882a593Smuzhiyun 		return irq;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	ret = devm_request_irq(dev, irq, aiodma_irq,
272*4882a593Smuzhiyun 			       IRQF_SHARED, dev_name(dev), pdev);
273*4882a593Smuzhiyun 	if (ret)
274*4882a593Smuzhiyun 		return ret;
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun 	return devm_snd_soc_register_component(dev, &uniphier_soc_platform,
277*4882a593Smuzhiyun 					       NULL, 0);
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aiodma_soc_register_platform);
280