xref: /OK3568_Linux_fs/kernel/sound/soc/uniphier/aio-cpu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Socionext UniPhier AIO ALSA CPU DAI driver.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (c) 2016-2018 Socionext Inc.
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/clk.h>
8*4882a593Smuzhiyun #include <linux/errno.h>
9*4882a593Smuzhiyun #include <linux/kernel.h>
10*4882a593Smuzhiyun #include <linux/mfd/syscon.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/of_platform.h>
14*4882a593Smuzhiyun #include <linux/platform_device.h>
15*4882a593Smuzhiyun #include <linux/reset.h>
16*4882a593Smuzhiyun #include <sound/core.h>
17*4882a593Smuzhiyun #include <sound/pcm.h>
18*4882a593Smuzhiyun #include <sound/pcm_params.h>
19*4882a593Smuzhiyun #include <sound/soc.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include "aio.h"
22*4882a593Smuzhiyun 
is_valid_pll(struct uniphier_aio_chip * chip,int pll_id)23*4882a593Smuzhiyun static bool is_valid_pll(struct uniphier_aio_chip *chip, int pll_id)
24*4882a593Smuzhiyun {
25*4882a593Smuzhiyun 	struct device *dev = &chip->pdev->dev;
26*4882a593Smuzhiyun 
27*4882a593Smuzhiyun 	if (pll_id < 0 || chip->num_plls <= pll_id) {
28*4882a593Smuzhiyun 		dev_err(dev, "PLL(%d) is not supported\n", pll_id);
29*4882a593Smuzhiyun 		return false;
30*4882a593Smuzhiyun 	}
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	return chip->plls[pll_id].enable;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun /**
36*4882a593Smuzhiyun  * find_volume - find volume supported HW port by HW port number
37*4882a593Smuzhiyun  * @chip: the AIO chip pointer
38*4882a593Smuzhiyun  * @oport_hw: HW port number, one of AUD_HW_XXXX
39*4882a593Smuzhiyun  *
40*4882a593Smuzhiyun  * Find AIO device from device list by HW port number. Volume feature is
41*4882a593Smuzhiyun  * available only in Output and PCM ports, this limitation comes from HW
42*4882a593Smuzhiyun  * specifications.
43*4882a593Smuzhiyun  *
44*4882a593Smuzhiyun  * Return: The pointer of AIO substream if successful, otherwise NULL on error.
45*4882a593Smuzhiyun  */
find_volume(struct uniphier_aio_chip * chip,int oport_hw)46*4882a593Smuzhiyun static struct uniphier_aio_sub *find_volume(struct uniphier_aio_chip *chip,
47*4882a593Smuzhiyun 					    int oport_hw)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun 	int i;
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	for (i = 0; i < chip->num_aios; i++) {
52*4882a593Smuzhiyun 		struct uniphier_aio_sub *sub = &chip->aios[i].sub[0];
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 		if (!sub->swm)
55*4882a593Smuzhiyun 			continue;
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 		if (sub->swm->oport.hw == oport_hw)
58*4882a593Smuzhiyun 			return sub;
59*4882a593Smuzhiyun 	}
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	return NULL;
62*4882a593Smuzhiyun }
63*4882a593Smuzhiyun 
match_spec(const struct uniphier_aio_spec * spec,const char * name,int dir)64*4882a593Smuzhiyun static bool match_spec(const struct uniphier_aio_spec *spec,
65*4882a593Smuzhiyun 		       const char *name, int dir)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	if (dir == SNDRV_PCM_STREAM_PLAYBACK &&
68*4882a593Smuzhiyun 	    spec->swm.dir != PORT_DIR_OUTPUT) {
69*4882a593Smuzhiyun 		return false;
70*4882a593Smuzhiyun 	}
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	if (dir == SNDRV_PCM_STREAM_CAPTURE &&
73*4882a593Smuzhiyun 	    spec->swm.dir != PORT_DIR_INPUT) {
74*4882a593Smuzhiyun 		return false;
75*4882a593Smuzhiyun 	}
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	if (spec->name && strcmp(spec->name, name) == 0)
78*4882a593Smuzhiyun 		return true;
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	if (spec->gname && strcmp(spec->gname, name) == 0)
81*4882a593Smuzhiyun 		return true;
82*4882a593Smuzhiyun 
83*4882a593Smuzhiyun 	return false;
84*4882a593Smuzhiyun }
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /**
87*4882a593Smuzhiyun  * find_spec - find HW specification info by name
88*4882a593Smuzhiyun  * @aio: the AIO device pointer
89*4882a593Smuzhiyun  * @name: name of device
90*4882a593Smuzhiyun  * @direction: the direction of substream, SNDRV_PCM_STREAM_*
91*4882a593Smuzhiyun  *
92*4882a593Smuzhiyun  * Find hardware specification information from list by device name. This
93*4882a593Smuzhiyun  * information is used for telling the difference of SoCs to driver.
94*4882a593Smuzhiyun  *
95*4882a593Smuzhiyun  * Specification list is array of 'struct uniphier_aio_spec' which is defined
96*4882a593Smuzhiyun  * in each drivers (see: aio-i2s.c).
97*4882a593Smuzhiyun  *
98*4882a593Smuzhiyun  * Return: The pointer of hardware specification of AIO if successful,
99*4882a593Smuzhiyun  * otherwise NULL on error.
100*4882a593Smuzhiyun  */
find_spec(struct uniphier_aio * aio,const char * name,int direction)101*4882a593Smuzhiyun static const struct uniphier_aio_spec *find_spec(struct uniphier_aio *aio,
102*4882a593Smuzhiyun 						 const char *name,
103*4882a593Smuzhiyun 						 int direction)
104*4882a593Smuzhiyun {
105*4882a593Smuzhiyun 	const struct uniphier_aio_chip_spec *chip_spec = aio->chip->chip_spec;
106*4882a593Smuzhiyun 	int i;
107*4882a593Smuzhiyun 
108*4882a593Smuzhiyun 	for (i = 0; i < chip_spec->num_specs; i++) {
109*4882a593Smuzhiyun 		const struct uniphier_aio_spec *spec = &chip_spec->specs[i];
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 		if (match_spec(spec, name, direction))
112*4882a593Smuzhiyun 			return spec;
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	return NULL;
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun /**
119*4882a593Smuzhiyun  * find_divider - find clock divider by frequency
120*4882a593Smuzhiyun  * @aio: the AIO device pointer
121*4882a593Smuzhiyun  * @pll_id: PLL ID, should be AUD_PLL_XX
122*4882a593Smuzhiyun  * @freq: required frequency
123*4882a593Smuzhiyun  *
124*4882a593Smuzhiyun  * Find suitable clock divider by frequency.
125*4882a593Smuzhiyun  *
126*4882a593Smuzhiyun  * Return: The ID of PLL if successful, otherwise negative error value.
127*4882a593Smuzhiyun  */
find_divider(struct uniphier_aio * aio,int pll_id,unsigned int freq)128*4882a593Smuzhiyun static int find_divider(struct uniphier_aio *aio, int pll_id, unsigned int freq)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun 	struct uniphier_aio_pll *pll;
131*4882a593Smuzhiyun 	int mul[] = { 1, 1, 1, 2, };
132*4882a593Smuzhiyun 	int div[] = { 2, 3, 1, 3, };
133*4882a593Smuzhiyun 	int i;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	if (!is_valid_pll(aio->chip, pll_id))
136*4882a593Smuzhiyun 		return -EINVAL;
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 	pll = &aio->chip->plls[pll_id];
139*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(mul); i++)
140*4882a593Smuzhiyun 		if (pll->freq * mul[i] / div[i] == freq)
141*4882a593Smuzhiyun 			return i;
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	return -ENOTSUPP;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
uniphier_aio_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)146*4882a593Smuzhiyun static int uniphier_aio_set_sysclk(struct snd_soc_dai *dai, int clk_id,
147*4882a593Smuzhiyun 				   unsigned int freq, int dir)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
150*4882a593Smuzhiyun 	struct device *dev = &aio->chip->pdev->dev;
151*4882a593Smuzhiyun 	bool pll_auto = false;
152*4882a593Smuzhiyun 	int pll_id, div_id;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	switch (clk_id) {
155*4882a593Smuzhiyun 	case AUD_CLK_IO:
156*4882a593Smuzhiyun 		return -ENOTSUPP;
157*4882a593Smuzhiyun 	case AUD_CLK_A1:
158*4882a593Smuzhiyun 		pll_id = AUD_PLL_A1;
159*4882a593Smuzhiyun 		break;
160*4882a593Smuzhiyun 	case AUD_CLK_F1:
161*4882a593Smuzhiyun 		pll_id = AUD_PLL_F1;
162*4882a593Smuzhiyun 		break;
163*4882a593Smuzhiyun 	case AUD_CLK_A2:
164*4882a593Smuzhiyun 		pll_id = AUD_PLL_A2;
165*4882a593Smuzhiyun 		break;
166*4882a593Smuzhiyun 	case AUD_CLK_F2:
167*4882a593Smuzhiyun 		pll_id = AUD_PLL_F2;
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	case AUD_CLK_A:
170*4882a593Smuzhiyun 		pll_id = AUD_PLL_A1;
171*4882a593Smuzhiyun 		pll_auto = true;
172*4882a593Smuzhiyun 		break;
173*4882a593Smuzhiyun 	case AUD_CLK_F:
174*4882a593Smuzhiyun 		pll_id = AUD_PLL_F1;
175*4882a593Smuzhiyun 		pll_auto = true;
176*4882a593Smuzhiyun 		break;
177*4882a593Smuzhiyun 	case AUD_CLK_APLL:
178*4882a593Smuzhiyun 		pll_id = AUD_PLL_APLL;
179*4882a593Smuzhiyun 		break;
180*4882a593Smuzhiyun 	case AUD_CLK_RX0:
181*4882a593Smuzhiyun 		pll_id = AUD_PLL_RX0;
182*4882a593Smuzhiyun 		break;
183*4882a593Smuzhiyun 	case AUD_CLK_USB0:
184*4882a593Smuzhiyun 		pll_id = AUD_PLL_USB0;
185*4882a593Smuzhiyun 		break;
186*4882a593Smuzhiyun 	case AUD_CLK_HSC0:
187*4882a593Smuzhiyun 		pll_id = AUD_PLL_HSC0;
188*4882a593Smuzhiyun 		break;
189*4882a593Smuzhiyun 	default:
190*4882a593Smuzhiyun 		dev_err(dev, "Sysclk(%d) is not supported\n", clk_id);
191*4882a593Smuzhiyun 		return -EINVAL;
192*4882a593Smuzhiyun 	}
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	if (pll_auto) {
195*4882a593Smuzhiyun 		for (pll_id = 0; pll_id < aio->chip->num_plls; pll_id++) {
196*4882a593Smuzhiyun 			div_id = find_divider(aio, pll_id, freq);
197*4882a593Smuzhiyun 			if (div_id >= 0) {
198*4882a593Smuzhiyun 				aio->plldiv = div_id;
199*4882a593Smuzhiyun 				break;
200*4882a593Smuzhiyun 			}
201*4882a593Smuzhiyun 		}
202*4882a593Smuzhiyun 		if (pll_id == aio->chip->num_plls) {
203*4882a593Smuzhiyun 			dev_err(dev, "Sysclk frequency is not supported(%d)\n",
204*4882a593Smuzhiyun 				freq);
205*4882a593Smuzhiyun 			return -EINVAL;
206*4882a593Smuzhiyun 		}
207*4882a593Smuzhiyun 	}
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	if (dir == SND_SOC_CLOCK_OUT)
210*4882a593Smuzhiyun 		aio->pll_out = pll_id;
211*4882a593Smuzhiyun 	else
212*4882a593Smuzhiyun 		aio->pll_in = pll_id;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	return 0;
215*4882a593Smuzhiyun }
216*4882a593Smuzhiyun 
uniphier_aio_set_pll(struct snd_soc_dai * dai,int pll_id,int source,unsigned int freq_in,unsigned int freq_out)217*4882a593Smuzhiyun static int uniphier_aio_set_pll(struct snd_soc_dai *dai, int pll_id,
218*4882a593Smuzhiyun 				int source, unsigned int freq_in,
219*4882a593Smuzhiyun 				unsigned int freq_out)
220*4882a593Smuzhiyun {
221*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
222*4882a593Smuzhiyun 	int ret;
223*4882a593Smuzhiyun 
224*4882a593Smuzhiyun 	if (!is_valid_pll(aio->chip, pll_id))
225*4882a593Smuzhiyun 		return -EINVAL;
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	ret = aio_chip_set_pll(aio->chip, pll_id, freq_out);
228*4882a593Smuzhiyun 	if (ret < 0)
229*4882a593Smuzhiyun 		return ret;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	return 0;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
uniphier_aio_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)234*4882a593Smuzhiyun static int uniphier_aio_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
237*4882a593Smuzhiyun 	struct device *dev = &aio->chip->pdev->dev;
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
240*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_LEFT_J:
241*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_RIGHT_J:
242*4882a593Smuzhiyun 	case SND_SOC_DAIFMT_I2S:
243*4882a593Smuzhiyun 		aio->fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
244*4882a593Smuzhiyun 		break;
245*4882a593Smuzhiyun 	default:
246*4882a593Smuzhiyun 		dev_err(dev, "Format is not supported(%d)\n",
247*4882a593Smuzhiyun 			fmt & SND_SOC_DAIFMT_FORMAT_MASK);
248*4882a593Smuzhiyun 		return -EINVAL;
249*4882a593Smuzhiyun 	}
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	return 0;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun 
uniphier_aio_startup(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)254*4882a593Smuzhiyun static int uniphier_aio_startup(struct snd_pcm_substream *substream,
255*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
258*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
259*4882a593Smuzhiyun 	int ret;
260*4882a593Smuzhiyun 
261*4882a593Smuzhiyun 	sub->substream = substream;
262*4882a593Smuzhiyun 	sub->pass_through = 0;
263*4882a593Smuzhiyun 	sub->use_mmap = true;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	ret = aio_init(sub);
266*4882a593Smuzhiyun 	if (ret)
267*4882a593Smuzhiyun 		return ret;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun 
uniphier_aio_shutdown(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)272*4882a593Smuzhiyun static void uniphier_aio_shutdown(struct snd_pcm_substream *substream,
273*4882a593Smuzhiyun 				  struct snd_soc_dai *dai)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
276*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	sub->substream = NULL;
279*4882a593Smuzhiyun }
280*4882a593Smuzhiyun 
uniphier_aio_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)281*4882a593Smuzhiyun static int uniphier_aio_hw_params(struct snd_pcm_substream *substream,
282*4882a593Smuzhiyun 				  struct snd_pcm_hw_params *params,
283*4882a593Smuzhiyun 				  struct snd_soc_dai *dai)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
286*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
287*4882a593Smuzhiyun 	struct device *dev = &aio->chip->pdev->dev;
288*4882a593Smuzhiyun 	int freq, ret;
289*4882a593Smuzhiyun 
290*4882a593Smuzhiyun 	switch (params_rate(params)) {
291*4882a593Smuzhiyun 	case 48000:
292*4882a593Smuzhiyun 	case 32000:
293*4882a593Smuzhiyun 	case 24000:
294*4882a593Smuzhiyun 		freq = 12288000;
295*4882a593Smuzhiyun 		break;
296*4882a593Smuzhiyun 	case 44100:
297*4882a593Smuzhiyun 	case 22050:
298*4882a593Smuzhiyun 		freq = 11289600;
299*4882a593Smuzhiyun 		break;
300*4882a593Smuzhiyun 	default:
301*4882a593Smuzhiyun 		dev_err(dev, "Rate is not supported(%d)\n",
302*4882a593Smuzhiyun 			params_rate(params));
303*4882a593Smuzhiyun 		return -EINVAL;
304*4882a593Smuzhiyun 	}
305*4882a593Smuzhiyun 	ret = snd_soc_dai_set_sysclk(dai, AUD_CLK_A,
306*4882a593Smuzhiyun 				     freq, SND_SOC_CLOCK_OUT);
307*4882a593Smuzhiyun 	if (ret)
308*4882a593Smuzhiyun 		return ret;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	sub->params = *params;
311*4882a593Smuzhiyun 	sub->setting = 1;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	aio_port_reset(sub);
314*4882a593Smuzhiyun 	aio_port_set_volume(sub, sub->vol);
315*4882a593Smuzhiyun 	aio_src_reset(sub);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	return 0;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
uniphier_aio_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)320*4882a593Smuzhiyun static int uniphier_aio_hw_free(struct snd_pcm_substream *substream,
321*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
324*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	sub->setting = 0;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	return 0;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun 
uniphier_aio_prepare(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)331*4882a593Smuzhiyun static int uniphier_aio_prepare(struct snd_pcm_substream *substream,
332*4882a593Smuzhiyun 				struct snd_soc_dai *dai)
333*4882a593Smuzhiyun {
334*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
335*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub = &aio->sub[substream->stream];
336*4882a593Smuzhiyun 	int ret;
337*4882a593Smuzhiyun 
338*4882a593Smuzhiyun 	ret = aio_port_set_param(sub, sub->pass_through, &sub->params);
339*4882a593Smuzhiyun 	if (ret)
340*4882a593Smuzhiyun 		return ret;
341*4882a593Smuzhiyun 	ret = aio_src_set_param(sub, &sub->params);
342*4882a593Smuzhiyun 	if (ret)
343*4882a593Smuzhiyun 		return ret;
344*4882a593Smuzhiyun 	aio_port_set_enable(sub, 1);
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	ret = aio_if_set_param(sub, sub->pass_through);
347*4882a593Smuzhiyun 	if (ret)
348*4882a593Smuzhiyun 		return ret;
349*4882a593Smuzhiyun 
350*4882a593Smuzhiyun 	if (sub->swm->type == PORT_TYPE_CONV) {
351*4882a593Smuzhiyun 		ret = aio_srcif_set_param(sub);
352*4882a593Smuzhiyun 		if (ret)
353*4882a593Smuzhiyun 			return ret;
354*4882a593Smuzhiyun 		ret = aio_srcch_set_param(sub);
355*4882a593Smuzhiyun 		if (ret)
356*4882a593Smuzhiyun 			return ret;
357*4882a593Smuzhiyun 		aio_srcch_set_enable(sub, 1);
358*4882a593Smuzhiyun 	}
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun 	return 0;
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun const struct snd_soc_dai_ops uniphier_aio_i2s_ops = {
364*4882a593Smuzhiyun 	.set_sysclk  = uniphier_aio_set_sysclk,
365*4882a593Smuzhiyun 	.set_pll     = uniphier_aio_set_pll,
366*4882a593Smuzhiyun 	.set_fmt     = uniphier_aio_set_fmt,
367*4882a593Smuzhiyun 	.startup     = uniphier_aio_startup,
368*4882a593Smuzhiyun 	.shutdown    = uniphier_aio_shutdown,
369*4882a593Smuzhiyun 	.hw_params   = uniphier_aio_hw_params,
370*4882a593Smuzhiyun 	.hw_free     = uniphier_aio_hw_free,
371*4882a593Smuzhiyun 	.prepare     = uniphier_aio_prepare,
372*4882a593Smuzhiyun };
373*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aio_i2s_ops);
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun const struct snd_soc_dai_ops uniphier_aio_spdif_ops = {
376*4882a593Smuzhiyun 	.set_sysclk  = uniphier_aio_set_sysclk,
377*4882a593Smuzhiyun 	.set_pll     = uniphier_aio_set_pll,
378*4882a593Smuzhiyun 	.startup     = uniphier_aio_startup,
379*4882a593Smuzhiyun 	.shutdown    = uniphier_aio_shutdown,
380*4882a593Smuzhiyun 	.hw_params   = uniphier_aio_hw_params,
381*4882a593Smuzhiyun 	.hw_free     = uniphier_aio_hw_free,
382*4882a593Smuzhiyun 	.prepare     = uniphier_aio_prepare,
383*4882a593Smuzhiyun };
384*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aio_spdif_ops);
385*4882a593Smuzhiyun 
uniphier_aio_dai_probe(struct snd_soc_dai * dai)386*4882a593Smuzhiyun int uniphier_aio_dai_probe(struct snd_soc_dai *dai)
387*4882a593Smuzhiyun {
388*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
389*4882a593Smuzhiyun 	int i;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(aio->sub); i++) {
392*4882a593Smuzhiyun 		struct uniphier_aio_sub *sub = &aio->sub[i];
393*4882a593Smuzhiyun 		const struct uniphier_aio_spec *spec;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 		spec = find_spec(aio, dai->name, i);
396*4882a593Smuzhiyun 		if (!spec)
397*4882a593Smuzhiyun 			continue;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 		sub->swm = &spec->swm;
400*4882a593Smuzhiyun 		sub->spec = spec;
401*4882a593Smuzhiyun 
402*4882a593Smuzhiyun 		sub->vol = AUD_VOL_INIT;
403*4882a593Smuzhiyun 	}
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 	aio_iecout_set_enable(aio->chip, true);
406*4882a593Smuzhiyun 	aio_chip_init(aio->chip);
407*4882a593Smuzhiyun 	aio->chip->active = 1;
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	return 0;
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aio_dai_probe);
412*4882a593Smuzhiyun 
uniphier_aio_dai_remove(struct snd_soc_dai * dai)413*4882a593Smuzhiyun int uniphier_aio_dai_remove(struct snd_soc_dai *dai)
414*4882a593Smuzhiyun {
415*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
416*4882a593Smuzhiyun 
417*4882a593Smuzhiyun 	aio->chip->active = 0;
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun 	return 0;
420*4882a593Smuzhiyun }
421*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aio_dai_remove);
422*4882a593Smuzhiyun 
uniphier_aio_dai_suspend(struct snd_soc_dai * dai)423*4882a593Smuzhiyun static void uniphier_aio_dai_suspend(struct snd_soc_dai *dai)
424*4882a593Smuzhiyun {
425*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	if (!snd_soc_dai_active(dai))
428*4882a593Smuzhiyun 		return;
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	aio->chip->num_wup_aios--;
431*4882a593Smuzhiyun 	if (!aio->chip->num_wup_aios) {
432*4882a593Smuzhiyun 		reset_control_assert(aio->chip->rst);
433*4882a593Smuzhiyun 		clk_disable_unprepare(aio->chip->clk);
434*4882a593Smuzhiyun 	}
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun 
uniphier_aio_suspend(struct snd_soc_component * component)437*4882a593Smuzhiyun static int uniphier_aio_suspend(struct snd_soc_component *component)
438*4882a593Smuzhiyun {
439*4882a593Smuzhiyun 	struct snd_soc_dai *dai;
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	for_each_component_dais(component, dai)
442*4882a593Smuzhiyun 		uniphier_aio_dai_suspend(dai);
443*4882a593Smuzhiyun 	return 0;
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
uniphier_aio_dai_resume(struct snd_soc_dai * dai)446*4882a593Smuzhiyun static int uniphier_aio_dai_resume(struct snd_soc_dai *dai)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	struct uniphier_aio *aio = uniphier_priv(dai);
449*4882a593Smuzhiyun 	int ret, i;
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	if (!snd_soc_dai_active(dai))
452*4882a593Smuzhiyun 		return 0;
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	if (!aio->chip->active)
455*4882a593Smuzhiyun 		return 0;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (!aio->chip->num_wup_aios) {
458*4882a593Smuzhiyun 		ret = clk_prepare_enable(aio->chip->clk);
459*4882a593Smuzhiyun 		if (ret)
460*4882a593Smuzhiyun 			return ret;
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 		ret = reset_control_deassert(aio->chip->rst);
463*4882a593Smuzhiyun 		if (ret)
464*4882a593Smuzhiyun 			goto err_out_clock;
465*4882a593Smuzhiyun 	}
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun 	aio_iecout_set_enable(aio->chip, true);
468*4882a593Smuzhiyun 	aio_chip_init(aio->chip);
469*4882a593Smuzhiyun 
470*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(aio->sub); i++) {
471*4882a593Smuzhiyun 		struct uniphier_aio_sub *sub = &aio->sub[i];
472*4882a593Smuzhiyun 
473*4882a593Smuzhiyun 		if (!sub->spec || !sub->substream)
474*4882a593Smuzhiyun 			continue;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 		ret = aio_init(sub);
477*4882a593Smuzhiyun 		if (ret)
478*4882a593Smuzhiyun 			goto err_out_reset;
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun 		if (!sub->setting)
481*4882a593Smuzhiyun 			continue;
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 		aio_port_reset(sub);
484*4882a593Smuzhiyun 		aio_src_reset(sub);
485*4882a593Smuzhiyun 	}
486*4882a593Smuzhiyun 	aio->chip->num_wup_aios++;
487*4882a593Smuzhiyun 
488*4882a593Smuzhiyun 	return 0;
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun err_out_reset:
491*4882a593Smuzhiyun 	if (!aio->chip->num_wup_aios)
492*4882a593Smuzhiyun 		reset_control_assert(aio->chip->rst);
493*4882a593Smuzhiyun err_out_clock:
494*4882a593Smuzhiyun 	if (!aio->chip->num_wup_aios)
495*4882a593Smuzhiyun 		clk_disable_unprepare(aio->chip->clk);
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	return ret;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
uniphier_aio_resume(struct snd_soc_component * component)500*4882a593Smuzhiyun static int uniphier_aio_resume(struct snd_soc_component *component)
501*4882a593Smuzhiyun {
502*4882a593Smuzhiyun 	struct snd_soc_dai *dai;
503*4882a593Smuzhiyun 	int ret = 0;
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	for_each_component_dais(component, dai)
506*4882a593Smuzhiyun 		ret |= uniphier_aio_dai_resume(dai);
507*4882a593Smuzhiyun 	return ret;
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun 
uniphier_aio_vol_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)510*4882a593Smuzhiyun static int uniphier_aio_vol_info(struct snd_kcontrol *kcontrol,
511*4882a593Smuzhiyun 				 struct snd_ctl_elem_info *uinfo)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
514*4882a593Smuzhiyun 	uinfo->count = 1;
515*4882a593Smuzhiyun 	uinfo->value.integer.min = 0;
516*4882a593Smuzhiyun 	uinfo->value.integer.max = AUD_VOL_MAX;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	return 0;
519*4882a593Smuzhiyun }
520*4882a593Smuzhiyun 
uniphier_aio_vol_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)521*4882a593Smuzhiyun static int uniphier_aio_vol_get(struct snd_kcontrol *kcontrol,
522*4882a593Smuzhiyun 				struct snd_ctl_elem_value *ucontrol)
523*4882a593Smuzhiyun {
524*4882a593Smuzhiyun 	struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
525*4882a593Smuzhiyun 	struct uniphier_aio_chip *chip = snd_soc_component_get_drvdata(comp);
526*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub;
527*4882a593Smuzhiyun 	int oport_hw = kcontrol->private_value;
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	sub = find_volume(chip, oport_hw);
530*4882a593Smuzhiyun 	if (!sub)
531*4882a593Smuzhiyun 		return 0;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	ucontrol->value.integer.value[0] = sub->vol;
534*4882a593Smuzhiyun 
535*4882a593Smuzhiyun 	return 0;
536*4882a593Smuzhiyun }
537*4882a593Smuzhiyun 
uniphier_aio_vol_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)538*4882a593Smuzhiyun static int uniphier_aio_vol_put(struct snd_kcontrol *kcontrol,
539*4882a593Smuzhiyun 				struct snd_ctl_elem_value *ucontrol)
540*4882a593Smuzhiyun {
541*4882a593Smuzhiyun 	struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
542*4882a593Smuzhiyun 	struct uniphier_aio_chip *chip = snd_soc_component_get_drvdata(comp);
543*4882a593Smuzhiyun 	struct uniphier_aio_sub *sub;
544*4882a593Smuzhiyun 	int oport_hw = kcontrol->private_value;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	sub = find_volume(chip, oport_hw);
547*4882a593Smuzhiyun 	if (!sub)
548*4882a593Smuzhiyun 		return 0;
549*4882a593Smuzhiyun 
550*4882a593Smuzhiyun 	if (sub->vol == ucontrol->value.integer.value[0])
551*4882a593Smuzhiyun 		return 0;
552*4882a593Smuzhiyun 	sub->vol = ucontrol->value.integer.value[0];
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	aio_port_set_volume(sub, sub->vol);
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	return 0;
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun static const struct snd_kcontrol_new uniphier_aio_controls[] = {
560*4882a593Smuzhiyun 	{
561*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
562*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
563*4882a593Smuzhiyun 		.name = "HPCMOUT1 Volume",
564*4882a593Smuzhiyun 		.info = uniphier_aio_vol_info,
565*4882a593Smuzhiyun 		.get = uniphier_aio_vol_get,
566*4882a593Smuzhiyun 		.put = uniphier_aio_vol_put,
567*4882a593Smuzhiyun 		.private_value = AUD_HW_HPCMOUT1,
568*4882a593Smuzhiyun 	},
569*4882a593Smuzhiyun 	{
570*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
571*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
572*4882a593Smuzhiyun 		.name = "PCMOUT1 Volume",
573*4882a593Smuzhiyun 		.info = uniphier_aio_vol_info,
574*4882a593Smuzhiyun 		.get = uniphier_aio_vol_get,
575*4882a593Smuzhiyun 		.put = uniphier_aio_vol_put,
576*4882a593Smuzhiyun 		.private_value = AUD_HW_PCMOUT1,
577*4882a593Smuzhiyun 	},
578*4882a593Smuzhiyun 	{
579*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
580*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
581*4882a593Smuzhiyun 		.name = "PCMOUT2 Volume",
582*4882a593Smuzhiyun 		.info = uniphier_aio_vol_info,
583*4882a593Smuzhiyun 		.get = uniphier_aio_vol_get,
584*4882a593Smuzhiyun 		.put = uniphier_aio_vol_put,
585*4882a593Smuzhiyun 		.private_value = AUD_HW_PCMOUT2,
586*4882a593Smuzhiyun 	},
587*4882a593Smuzhiyun 	{
588*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
589*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
590*4882a593Smuzhiyun 		.name = "PCMOUT3 Volume",
591*4882a593Smuzhiyun 		.info = uniphier_aio_vol_info,
592*4882a593Smuzhiyun 		.get = uniphier_aio_vol_get,
593*4882a593Smuzhiyun 		.put = uniphier_aio_vol_put,
594*4882a593Smuzhiyun 		.private_value = AUD_HW_PCMOUT3,
595*4882a593Smuzhiyun 	},
596*4882a593Smuzhiyun 	{
597*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
598*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
599*4882a593Smuzhiyun 		.name = "HIECOUT1 Volume",
600*4882a593Smuzhiyun 		.info = uniphier_aio_vol_info,
601*4882a593Smuzhiyun 		.get = uniphier_aio_vol_get,
602*4882a593Smuzhiyun 		.put = uniphier_aio_vol_put,
603*4882a593Smuzhiyun 		.private_value = AUD_HW_HIECOUT1,
604*4882a593Smuzhiyun 	},
605*4882a593Smuzhiyun 	{
606*4882a593Smuzhiyun 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
607*4882a593Smuzhiyun 		.access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
608*4882a593Smuzhiyun 		.name = "IECOUT1 Volume",
609*4882a593Smuzhiyun 		.info = uniphier_aio_vol_info,
610*4882a593Smuzhiyun 		.get = uniphier_aio_vol_get,
611*4882a593Smuzhiyun 		.put = uniphier_aio_vol_put,
612*4882a593Smuzhiyun 		.private_value = AUD_HW_IECOUT1,
613*4882a593Smuzhiyun 	},
614*4882a593Smuzhiyun };
615*4882a593Smuzhiyun 
616*4882a593Smuzhiyun static const struct snd_soc_component_driver uniphier_aio_component = {
617*4882a593Smuzhiyun 	.name = "uniphier-aio",
618*4882a593Smuzhiyun 	.controls = uniphier_aio_controls,
619*4882a593Smuzhiyun 	.num_controls = ARRAY_SIZE(uniphier_aio_controls),
620*4882a593Smuzhiyun 	.suspend = uniphier_aio_suspend,
621*4882a593Smuzhiyun 	.resume  = uniphier_aio_resume,
622*4882a593Smuzhiyun };
623*4882a593Smuzhiyun 
uniphier_aio_probe(struct platform_device * pdev)624*4882a593Smuzhiyun int uniphier_aio_probe(struct platform_device *pdev)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun 	struct uniphier_aio_chip *chip;
627*4882a593Smuzhiyun 	struct device *dev = &pdev->dev;
628*4882a593Smuzhiyun 	int ret, i, j;
629*4882a593Smuzhiyun 
630*4882a593Smuzhiyun 	chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL);
631*4882a593Smuzhiyun 	if (!chip)
632*4882a593Smuzhiyun 		return -ENOMEM;
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	chip->chip_spec = of_device_get_match_data(dev);
635*4882a593Smuzhiyun 	if (!chip->chip_spec)
636*4882a593Smuzhiyun 		return -EINVAL;
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	chip->regmap_sg = syscon_regmap_lookup_by_phandle(dev->of_node,
639*4882a593Smuzhiyun 							  "socionext,syscon");
640*4882a593Smuzhiyun 	if (IS_ERR(chip->regmap_sg)) {
641*4882a593Smuzhiyun 		if (PTR_ERR(chip->regmap_sg) == -EPROBE_DEFER)
642*4882a593Smuzhiyun 			return -EPROBE_DEFER;
643*4882a593Smuzhiyun 		chip->regmap_sg = NULL;
644*4882a593Smuzhiyun 	}
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	chip->clk = devm_clk_get(dev, "aio");
647*4882a593Smuzhiyun 	if (IS_ERR(chip->clk))
648*4882a593Smuzhiyun 		return PTR_ERR(chip->clk);
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	chip->rst = devm_reset_control_get_shared(dev, "aio");
651*4882a593Smuzhiyun 	if (IS_ERR(chip->rst))
652*4882a593Smuzhiyun 		return PTR_ERR(chip->rst);
653*4882a593Smuzhiyun 
654*4882a593Smuzhiyun 	chip->num_aios = chip->chip_spec->num_dais;
655*4882a593Smuzhiyun 	chip->num_wup_aios = chip->num_aios;
656*4882a593Smuzhiyun 	chip->aios = devm_kcalloc(dev,
657*4882a593Smuzhiyun 				  chip->num_aios, sizeof(struct uniphier_aio),
658*4882a593Smuzhiyun 				  GFP_KERNEL);
659*4882a593Smuzhiyun 	if (!chip->aios)
660*4882a593Smuzhiyun 		return -ENOMEM;
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	chip->num_plls = chip->chip_spec->num_plls;
663*4882a593Smuzhiyun 	chip->plls = devm_kcalloc(dev,
664*4882a593Smuzhiyun 				  chip->num_plls,
665*4882a593Smuzhiyun 				  sizeof(struct uniphier_aio_pll),
666*4882a593Smuzhiyun 				  GFP_KERNEL);
667*4882a593Smuzhiyun 	if (!chip->plls)
668*4882a593Smuzhiyun 		return -ENOMEM;
669*4882a593Smuzhiyun 	memcpy(chip->plls, chip->chip_spec->plls,
670*4882a593Smuzhiyun 	       sizeof(struct uniphier_aio_pll) * chip->num_plls);
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	for (i = 0; i < chip->num_aios; i++) {
673*4882a593Smuzhiyun 		struct uniphier_aio *aio = &chip->aios[i];
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 		aio->chip = chip;
676*4882a593Smuzhiyun 		aio->fmt = SND_SOC_DAIFMT_I2S;
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 		for (j = 0; j < ARRAY_SIZE(aio->sub); j++) {
679*4882a593Smuzhiyun 			struct uniphier_aio_sub *sub = &aio->sub[j];
680*4882a593Smuzhiyun 
681*4882a593Smuzhiyun 			sub->aio = aio;
682*4882a593Smuzhiyun 			spin_lock_init(&sub->lock);
683*4882a593Smuzhiyun 		}
684*4882a593Smuzhiyun 	}
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	chip->pdev = pdev;
687*4882a593Smuzhiyun 	platform_set_drvdata(pdev, chip);
688*4882a593Smuzhiyun 
689*4882a593Smuzhiyun 	ret = clk_prepare_enable(chip->clk);
690*4882a593Smuzhiyun 	if (ret)
691*4882a593Smuzhiyun 		return ret;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	ret = reset_control_deassert(chip->rst);
694*4882a593Smuzhiyun 	if (ret)
695*4882a593Smuzhiyun 		goto err_out_clock;
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	ret = devm_snd_soc_register_component(dev, &uniphier_aio_component,
698*4882a593Smuzhiyun 					      chip->chip_spec->dais,
699*4882a593Smuzhiyun 					      chip->chip_spec->num_dais);
700*4882a593Smuzhiyun 	if (ret) {
701*4882a593Smuzhiyun 		dev_err(dev, "Register component failed.\n");
702*4882a593Smuzhiyun 		goto err_out_reset;
703*4882a593Smuzhiyun 	}
704*4882a593Smuzhiyun 
705*4882a593Smuzhiyun 	ret = uniphier_aiodma_soc_register_platform(pdev);
706*4882a593Smuzhiyun 	if (ret) {
707*4882a593Smuzhiyun 		dev_err(dev, "Register platform failed.\n");
708*4882a593Smuzhiyun 		goto err_out_reset;
709*4882a593Smuzhiyun 	}
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	return 0;
712*4882a593Smuzhiyun 
713*4882a593Smuzhiyun err_out_reset:
714*4882a593Smuzhiyun 	reset_control_assert(chip->rst);
715*4882a593Smuzhiyun 
716*4882a593Smuzhiyun err_out_clock:
717*4882a593Smuzhiyun 	clk_disable_unprepare(chip->clk);
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 	return ret;
720*4882a593Smuzhiyun }
721*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aio_probe);
722*4882a593Smuzhiyun 
uniphier_aio_remove(struct platform_device * pdev)723*4882a593Smuzhiyun int uniphier_aio_remove(struct platform_device *pdev)
724*4882a593Smuzhiyun {
725*4882a593Smuzhiyun 	struct uniphier_aio_chip *chip = platform_get_drvdata(pdev);
726*4882a593Smuzhiyun 
727*4882a593Smuzhiyun 	reset_control_assert(chip->rst);
728*4882a593Smuzhiyun 	clk_disable_unprepare(chip->clk);
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	return 0;
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(uniphier_aio_remove);
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun MODULE_AUTHOR("Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>");
735*4882a593Smuzhiyun MODULE_DESCRIPTION("UniPhier AIO CPU DAI driver.");
736*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
737