1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * tegra_pcm.c - Tegra PCM driver
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Author: Stephen Warren <swarren@nvidia.com>
6*4882a593Smuzhiyun * Copyright (C) 2010,2012 - NVIDIA, Inc.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on code copyright/by:
9*4882a593Smuzhiyun *
10*4882a593Smuzhiyun * Copyright (c) 2009-2010, NVIDIA Corporation.
11*4882a593Smuzhiyun * Scott Peterson <speterson@nvidia.com>
12*4882a593Smuzhiyun * Vijay Mali <vmali@nvidia.com>
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * Copyright (C) 2010 Google, Inc.
15*4882a593Smuzhiyun * Iliyan Malchev <malchev@google.com>
16*4882a593Smuzhiyun */
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun #include <linux/module.h>
19*4882a593Smuzhiyun #include <linux/dma-mapping.h>
20*4882a593Smuzhiyun #include <sound/core.h>
21*4882a593Smuzhiyun #include <sound/pcm.h>
22*4882a593Smuzhiyun #include <sound/pcm_params.h>
23*4882a593Smuzhiyun #include <sound/soc.h>
24*4882a593Smuzhiyun #include <sound/dmaengine_pcm.h>
25*4882a593Smuzhiyun #include "tegra_pcm.h"
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun static const struct snd_pcm_hardware tegra_pcm_hardware = {
28*4882a593Smuzhiyun .info = SNDRV_PCM_INFO_MMAP |
29*4882a593Smuzhiyun SNDRV_PCM_INFO_MMAP_VALID |
30*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED,
31*4882a593Smuzhiyun .period_bytes_min = 1024,
32*4882a593Smuzhiyun .period_bytes_max = PAGE_SIZE,
33*4882a593Smuzhiyun .periods_min = 2,
34*4882a593Smuzhiyun .periods_max = 8,
35*4882a593Smuzhiyun .buffer_bytes_max = PAGE_SIZE * 8,
36*4882a593Smuzhiyun .fifo_size = 4,
37*4882a593Smuzhiyun };
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun static const struct snd_dmaengine_pcm_config tegra_dmaengine_pcm_config = {
40*4882a593Smuzhiyun .pcm_hardware = &tegra_pcm_hardware,
41*4882a593Smuzhiyun .prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config,
42*4882a593Smuzhiyun .prealloc_buffer_size = PAGE_SIZE * 8,
43*4882a593Smuzhiyun };
44*4882a593Smuzhiyun
tegra_pcm_platform_register(struct device * dev)45*4882a593Smuzhiyun int tegra_pcm_platform_register(struct device *dev)
46*4882a593Smuzhiyun {
47*4882a593Smuzhiyun return snd_dmaengine_pcm_register(dev, &tegra_dmaengine_pcm_config, 0);
48*4882a593Smuzhiyun }
49*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_platform_register);
50*4882a593Smuzhiyun
tegra_pcm_platform_register_with_chan_names(struct device * dev,struct snd_dmaengine_pcm_config * config,char * txdmachan,char * rxdmachan)51*4882a593Smuzhiyun int tegra_pcm_platform_register_with_chan_names(struct device *dev,
52*4882a593Smuzhiyun struct snd_dmaengine_pcm_config *config,
53*4882a593Smuzhiyun char *txdmachan, char *rxdmachan)
54*4882a593Smuzhiyun {
55*4882a593Smuzhiyun *config = tegra_dmaengine_pcm_config;
56*4882a593Smuzhiyun config->dma_dev = dev->parent;
57*4882a593Smuzhiyun config->chan_names[0] = txdmachan;
58*4882a593Smuzhiyun config->chan_names[1] = rxdmachan;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return snd_dmaengine_pcm_register(dev, config, 0);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_platform_register_with_chan_names);
63*4882a593Smuzhiyun
tegra_pcm_platform_unregister(struct device * dev)64*4882a593Smuzhiyun void tegra_pcm_platform_unregister(struct device *dev)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun return snd_dmaengine_pcm_unregister(dev);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_platform_unregister);
69*4882a593Smuzhiyun
tegra_pcm_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)70*4882a593Smuzhiyun int tegra_pcm_open(struct snd_soc_component *component,
71*4882a593Smuzhiyun struct snd_pcm_substream *substream)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = substream->private_data;
74*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dmap;
75*4882a593Smuzhiyun struct dma_chan *chan;
76*4882a593Smuzhiyun struct snd_soc_dai *cpu_dai = asoc_rtd_to_cpu(rtd, 0);
77*4882a593Smuzhiyun int ret;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun if (rtd->dai_link->no_pcm)
80*4882a593Smuzhiyun return 0;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun dmap = snd_soc_dai_get_dma_data(cpu_dai, substream);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* Set HW params now that initialization is complete */
85*4882a593Smuzhiyun snd_soc_set_runtime_hwparams(substream, &tegra_pcm_hardware);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun /* Ensure period size is multiple of 8 */
88*4882a593Smuzhiyun ret = snd_pcm_hw_constraint_step(substream->runtime, 0,
89*4882a593Smuzhiyun SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 0x8);
90*4882a593Smuzhiyun if (ret) {
91*4882a593Smuzhiyun dev_err(rtd->dev, "failed to set constraint %d\n", ret);
92*4882a593Smuzhiyun return ret;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun chan = dma_request_slave_channel(cpu_dai->dev, dmap->chan_name);
96*4882a593Smuzhiyun if (!chan) {
97*4882a593Smuzhiyun dev_err(cpu_dai->dev,
98*4882a593Smuzhiyun "dmaengine request slave channel failed! (%s)\n",
99*4882a593Smuzhiyun dmap->chan_name);
100*4882a593Smuzhiyun return -ENODEV;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun ret = snd_dmaengine_pcm_open(substream, chan);
104*4882a593Smuzhiyun if (ret) {
105*4882a593Smuzhiyun dev_err(rtd->dev,
106*4882a593Smuzhiyun "dmaengine pcm open failed with err %d (%s)\n", ret,
107*4882a593Smuzhiyun dmap->chan_name);
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun dma_release_channel(chan);
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun return ret;
112*4882a593Smuzhiyun }
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return 0;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_open);
117*4882a593Smuzhiyun
tegra_pcm_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)118*4882a593Smuzhiyun int tegra_pcm_close(struct snd_soc_component *component,
119*4882a593Smuzhiyun struct snd_pcm_substream *substream)
120*4882a593Smuzhiyun {
121*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = substream->private_data;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (rtd->dai_link->no_pcm)
124*4882a593Smuzhiyun return 0;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun snd_dmaengine_pcm_close_release_chan(substream);
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun return 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_close);
131*4882a593Smuzhiyun
tegra_pcm_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)132*4882a593Smuzhiyun int tegra_pcm_hw_params(struct snd_soc_component *component,
133*4882a593Smuzhiyun struct snd_pcm_substream *substream,
134*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = substream->private_data;
137*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dmap;
138*4882a593Smuzhiyun struct dma_slave_config slave_config;
139*4882a593Smuzhiyun struct dma_chan *chan;
140*4882a593Smuzhiyun int ret;
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun if (rtd->dai_link->no_pcm)
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun dmap = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
146*4882a593Smuzhiyun if (!dmap)
147*4882a593Smuzhiyun return 0;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun chan = snd_dmaengine_pcm_get_chan(substream);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun ret = snd_hwparams_to_dma_slave_config(substream, params,
152*4882a593Smuzhiyun &slave_config);
153*4882a593Smuzhiyun if (ret) {
154*4882a593Smuzhiyun dev_err(rtd->dev, "hw params config failed with err %d\n", ret);
155*4882a593Smuzhiyun return ret;
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
159*4882a593Smuzhiyun slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
160*4882a593Smuzhiyun slave_config.dst_addr = dmap->addr;
161*4882a593Smuzhiyun slave_config.dst_maxburst = 8;
162*4882a593Smuzhiyun } else {
163*4882a593Smuzhiyun slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
164*4882a593Smuzhiyun slave_config.src_addr = dmap->addr;
165*4882a593Smuzhiyun slave_config.src_maxburst = 8;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun ret = dmaengine_slave_config(chan, &slave_config);
169*4882a593Smuzhiyun if (ret < 0) {
170*4882a593Smuzhiyun dev_err(rtd->dev, "dma slave config failed with err %d\n", ret);
171*4882a593Smuzhiyun return ret;
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun return 0;
177*4882a593Smuzhiyun }
178*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_hw_params);
179*4882a593Smuzhiyun
tegra_pcm_hw_free(struct snd_soc_component * component,struct snd_pcm_substream * substream)180*4882a593Smuzhiyun int tegra_pcm_hw_free(struct snd_soc_component *component,
181*4882a593Smuzhiyun struct snd_pcm_substream *substream)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = substream->private_data;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun if (rtd->dai_link->no_pcm)
186*4882a593Smuzhiyun return 0;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun snd_pcm_set_runtime_buffer(substream, NULL);
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun return 0;
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_hw_free);
193*4882a593Smuzhiyun
tegra_pcm_mmap(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct vm_area_struct * vma)194*4882a593Smuzhiyun int tegra_pcm_mmap(struct snd_soc_component *component,
195*4882a593Smuzhiyun struct snd_pcm_substream *substream,
196*4882a593Smuzhiyun struct vm_area_struct *vma)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = substream->private_data;
199*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun if (rtd->dai_link->no_pcm)
202*4882a593Smuzhiyun return 0;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun return dma_mmap_wc(substream->pcm->card->dev, vma, runtime->dma_area,
205*4882a593Smuzhiyun runtime->dma_addr, runtime->dma_bytes);
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_mmap);
208*4882a593Smuzhiyun
tegra_pcm_pointer(struct snd_soc_component * component,struct snd_pcm_substream * substream)209*4882a593Smuzhiyun snd_pcm_uframes_t tegra_pcm_pointer(struct snd_soc_component *component,
210*4882a593Smuzhiyun struct snd_pcm_substream *substream)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun return snd_dmaengine_pcm_pointer(substream);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_pointer);
215*4882a593Smuzhiyun
tegra_pcm_preallocate_dma_buffer(struct snd_pcm * pcm,int stream,size_t size)216*4882a593Smuzhiyun static int tegra_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
217*4882a593Smuzhiyun size_t size)
218*4882a593Smuzhiyun {
219*4882a593Smuzhiyun struct snd_pcm_substream *substream = pcm->streams[stream].substream;
220*4882a593Smuzhiyun struct snd_dma_buffer *buf = &substream->dma_buffer;
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun buf->area = dma_alloc_wc(pcm->card->dev, size, &buf->addr, GFP_KERNEL);
223*4882a593Smuzhiyun if (!buf->area)
224*4882a593Smuzhiyun return -ENOMEM;
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun buf->private_data = NULL;
227*4882a593Smuzhiyun buf->dev.type = SNDRV_DMA_TYPE_DEV;
228*4882a593Smuzhiyun buf->dev.dev = pcm->card->dev;
229*4882a593Smuzhiyun buf->bytes = size;
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun return 0;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
tegra_pcm_deallocate_dma_buffer(struct snd_pcm * pcm,int stream)234*4882a593Smuzhiyun static void tegra_pcm_deallocate_dma_buffer(struct snd_pcm *pcm, int stream)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun struct snd_pcm_substream *substream;
237*4882a593Smuzhiyun struct snd_dma_buffer *buf;
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun substream = pcm->streams[stream].substream;
240*4882a593Smuzhiyun if (!substream)
241*4882a593Smuzhiyun return;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun buf = &substream->dma_buffer;
244*4882a593Smuzhiyun if (!buf->area)
245*4882a593Smuzhiyun return;
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun dma_free_wc(pcm->card->dev, buf->bytes, buf->area, buf->addr);
248*4882a593Smuzhiyun buf->area = NULL;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
tegra_pcm_dma_allocate(struct snd_soc_pcm_runtime * rtd,size_t size)251*4882a593Smuzhiyun static int tegra_pcm_dma_allocate(struct snd_soc_pcm_runtime *rtd,
252*4882a593Smuzhiyun size_t size)
253*4882a593Smuzhiyun {
254*4882a593Smuzhiyun struct snd_card *card = rtd->card->snd_card;
255*4882a593Smuzhiyun struct snd_pcm *pcm = rtd->pcm;
256*4882a593Smuzhiyun int ret;
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun ret = dma_set_mask(card->dev, DMA_BIT_MASK(32));
259*4882a593Smuzhiyun if (ret < 0)
260*4882a593Smuzhiyun return ret;
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun ret = dma_set_coherent_mask(card->dev, DMA_BIT_MASK(32));
263*4882a593Smuzhiyun if (ret < 0)
264*4882a593Smuzhiyun return ret;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
267*4882a593Smuzhiyun ret = tegra_pcm_preallocate_dma_buffer(pcm,
268*4882a593Smuzhiyun SNDRV_PCM_STREAM_PLAYBACK, size);
269*4882a593Smuzhiyun if (ret)
270*4882a593Smuzhiyun goto err;
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
274*4882a593Smuzhiyun ret = tegra_pcm_preallocate_dma_buffer(pcm,
275*4882a593Smuzhiyun SNDRV_PCM_STREAM_CAPTURE, size);
276*4882a593Smuzhiyun if (ret)
277*4882a593Smuzhiyun goto err_free_play;
278*4882a593Smuzhiyun }
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun return 0;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun err_free_play:
283*4882a593Smuzhiyun tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
284*4882a593Smuzhiyun err:
285*4882a593Smuzhiyun return ret;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
tegra_pcm_construct(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)288*4882a593Smuzhiyun int tegra_pcm_construct(struct snd_soc_component *component,
289*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun return tegra_pcm_dma_allocate(rtd, tegra_pcm_hardware.buffer_bytes_max);
292*4882a593Smuzhiyun }
293*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_construct);
294*4882a593Smuzhiyun
tegra_pcm_destruct(struct snd_soc_component * component,struct snd_pcm * pcm)295*4882a593Smuzhiyun void tegra_pcm_destruct(struct snd_soc_component *component,
296*4882a593Smuzhiyun struct snd_pcm *pcm)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_CAPTURE);
299*4882a593Smuzhiyun tegra_pcm_deallocate_dma_buffer(pcm, SNDRV_PCM_STREAM_PLAYBACK);
300*4882a593Smuzhiyun }
301*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(tegra_pcm_destruct);
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
304*4882a593Smuzhiyun MODULE_DESCRIPTION("Tegra PCM ASoC driver");
305*4882a593Smuzhiyun MODULE_LICENSE("GPL");
306