1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun #ifndef __SPRD_MCDT_H
4*4882a593Smuzhiyun #define __SPRD_MCDT_H
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun enum sprd_mcdt_channel_type {
7*4882a593Smuzhiyun SPRD_MCDT_DAC_CHAN,
8*4882a593Smuzhiyun SPRD_MCDT_ADC_CHAN,
9*4882a593Smuzhiyun SPRD_MCDT_UNKNOWN_CHAN,
10*4882a593Smuzhiyun };
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun enum sprd_mcdt_dma_chan {
13*4882a593Smuzhiyun SPRD_MCDT_DMA_CH0,
14*4882a593Smuzhiyun SPRD_MCDT_DMA_CH1,
15*4882a593Smuzhiyun SPRD_MCDT_DMA_CH2,
16*4882a593Smuzhiyun SPRD_MCDT_DMA_CH3,
17*4882a593Smuzhiyun SPRD_MCDT_DMA_CH4,
18*4882a593Smuzhiyun };
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun struct sprd_mcdt_chan_callback {
21*4882a593Smuzhiyun void (*notify)(void *data);
22*4882a593Smuzhiyun void *data;
23*4882a593Smuzhiyun };
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun /**
26*4882a593Smuzhiyun * struct sprd_mcdt_chan - this struct represents a single channel instance
27*4882a593Smuzhiyun * @mcdt: the mcdt controller
28*4882a593Smuzhiyun * @id: channel id
29*4882a593Smuzhiyun * @fifo_phys: channel fifo physical address which is used for DMA transfer
30*4882a593Smuzhiyun * @type: channel type
31*4882a593Smuzhiyun * @cb: channel fifo interrupt's callback interface to notify the fifo events
32*4882a593Smuzhiyun * @dma_enable: indicate if use DMA mode to transfer data
33*4882a593Smuzhiyun * @int_enable: indicate if use interrupt mode to notify users to read or
34*4882a593Smuzhiyun * write data manually
35*4882a593Smuzhiyun * @list: used to link into the global list
36*4882a593Smuzhiyun *
37*4882a593Smuzhiyun * Note: users should not modify any members of this structure.
38*4882a593Smuzhiyun */
39*4882a593Smuzhiyun struct sprd_mcdt_chan {
40*4882a593Smuzhiyun struct sprd_mcdt_dev *mcdt;
41*4882a593Smuzhiyun u8 id;
42*4882a593Smuzhiyun unsigned long fifo_phys;
43*4882a593Smuzhiyun enum sprd_mcdt_channel_type type;
44*4882a593Smuzhiyun enum sprd_mcdt_dma_chan dma_chan;
45*4882a593Smuzhiyun struct sprd_mcdt_chan_callback *cb;
46*4882a593Smuzhiyun bool dma_enable;
47*4882a593Smuzhiyun bool int_enable;
48*4882a593Smuzhiyun struct list_head list;
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_SND_SOC_SPRD_MCDT)
52*4882a593Smuzhiyun struct sprd_mcdt_chan *sprd_mcdt_request_chan(u8 channel,
53*4882a593Smuzhiyun enum sprd_mcdt_channel_type type);
54*4882a593Smuzhiyun void sprd_mcdt_free_chan(struct sprd_mcdt_chan *chan);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun int sprd_mcdt_chan_write(struct sprd_mcdt_chan *chan, char *tx_buf, u32 size);
57*4882a593Smuzhiyun int sprd_mcdt_chan_read(struct sprd_mcdt_chan *chan, char *rx_buf, u32 size);
58*4882a593Smuzhiyun int sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan *chan, u32 water_mark,
59*4882a593Smuzhiyun struct sprd_mcdt_chan_callback *cb);
60*4882a593Smuzhiyun void sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan *chan);
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun int sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan *chan,
63*4882a593Smuzhiyun enum sprd_mcdt_dma_chan dma_chan, u32 water_mark);
64*4882a593Smuzhiyun void sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan);
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #else
67*4882a593Smuzhiyun
sprd_mcdt_request_chan(u8 channel,enum sprd_mcdt_channel_type type)68*4882a593Smuzhiyun struct sprd_mcdt_chan *sprd_mcdt_request_chan(u8 channel,
69*4882a593Smuzhiyun enum sprd_mcdt_channel_type type)
70*4882a593Smuzhiyun {
71*4882a593Smuzhiyun return NULL;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
sprd_mcdt_free_chan(struct sprd_mcdt_chan * chan)74*4882a593Smuzhiyun void sprd_mcdt_free_chan(struct sprd_mcdt_chan *chan)
75*4882a593Smuzhiyun { }
76*4882a593Smuzhiyun
sprd_mcdt_chan_write(struct sprd_mcdt_chan * chan,char * tx_buf,u32 size)77*4882a593Smuzhiyun int sprd_mcdt_chan_write(struct sprd_mcdt_chan *chan, char *tx_buf, u32 size)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun return -EINVAL;
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
sprd_mcdt_chan_read(struct sprd_mcdt_chan * chan,char * rx_buf,u32 size)82*4882a593Smuzhiyun int sprd_mcdt_chan_read(struct sprd_mcdt_chan *chan, char *rx_buf, u32 size)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan * chan,u32 water_mark,struct sprd_mcdt_chan_callback * cb)87*4882a593Smuzhiyun int sprd_mcdt_chan_int_enable(struct sprd_mcdt_chan *chan, u32 water_mark,
88*4882a593Smuzhiyun struct sprd_mcdt_chan_callback *cb)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun return -EINVAL;
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan * chan)93*4882a593Smuzhiyun void sprd_mcdt_chan_int_disable(struct sprd_mcdt_chan *chan)
94*4882a593Smuzhiyun { }
95*4882a593Smuzhiyun
sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan * chan,enum sprd_mcdt_dma_chan dma_chan,u32 water_mark)96*4882a593Smuzhiyun int sprd_mcdt_chan_dma_enable(struct sprd_mcdt_chan *chan,
97*4882a593Smuzhiyun enum sprd_mcdt_dma_chan dma_chan, u32 water_mark)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun return -EINVAL;
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan * chan)102*4882a593Smuzhiyun void sprd_mcdt_chan_dma_disable(struct sprd_mcdt_chan *chan)
103*4882a593Smuzhiyun { }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun #endif
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun #endif /* __SPRD_MCDT_H */
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