1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Copyright (C) 2013, Analog Devices Inc.
4*4882a593Smuzhiyun // Author: Lars-Peter Clausen <lars@metafoo.de>
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #include <linux/module.h>
7*4882a593Smuzhiyun #include <linux/init.h>
8*4882a593Smuzhiyun #include <linux/dmaengine.h>
9*4882a593Smuzhiyun #include <linux/slab.h>
10*4882a593Smuzhiyun #include <sound/pcm.h>
11*4882a593Smuzhiyun #include <sound/pcm_params.h>
12*4882a593Smuzhiyun #include <sound/soc.h>
13*4882a593Smuzhiyun #include <linux/dma-mapping.h>
14*4882a593Smuzhiyun #include <linux/of.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #include <sound/dmaengine_pcm.h>
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun static unsigned int prealloc_buffer_size_kbytes = 512;
19*4882a593Smuzhiyun module_param(prealloc_buffer_size_kbytes, uint, 0444);
20*4882a593Smuzhiyun MODULE_PARM_DESC(prealloc_buffer_size_kbytes, "Preallocate DMA buffer size (KB).");
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /*
23*4882a593Smuzhiyun * The platforms dmaengine driver does not support reporting the amount of
24*4882a593Smuzhiyun * bytes that are still left to transfer.
25*4882a593Smuzhiyun */
26*4882a593Smuzhiyun #define SND_DMAENGINE_PCM_FLAG_NO_RESIDUE BIT(31)
27*4882a593Smuzhiyun
dmaengine_dma_dev(struct dmaengine_pcm * pcm,struct snd_pcm_substream * substream)28*4882a593Smuzhiyun static struct device *dmaengine_dma_dev(struct dmaengine_pcm *pcm,
29*4882a593Smuzhiyun struct snd_pcm_substream *substream)
30*4882a593Smuzhiyun {
31*4882a593Smuzhiyun if (!pcm->chan[substream->stream])
32*4882a593Smuzhiyun return NULL;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun return pcm->chan[substream->stream]->device->dev;
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /**
38*4882a593Smuzhiyun * snd_dmaengine_pcm_prepare_slave_config() - Generic prepare_slave_config callback
39*4882a593Smuzhiyun * @substream: PCM substream
40*4882a593Smuzhiyun * @params: hw_params
41*4882a593Smuzhiyun * @slave_config: DMA slave config to prepare
42*4882a593Smuzhiyun *
43*4882a593Smuzhiyun * This function can be used as a generic prepare_slave_config callback for
44*4882a593Smuzhiyun * platforms which make use of the snd_dmaengine_dai_dma_data struct for their
45*4882a593Smuzhiyun * DAI DMA data. Internally the function will first call
46*4882a593Smuzhiyun * snd_hwparams_to_dma_slave_config to fill in the slave config based on the
47*4882a593Smuzhiyun * hw_params, followed by snd_dmaengine_set_config_from_dai_data to fill in the
48*4882a593Smuzhiyun * remaining fields based on the DAI DMA data.
49*4882a593Smuzhiyun */
snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct dma_slave_config * slave_config)50*4882a593Smuzhiyun int snd_dmaengine_pcm_prepare_slave_config(struct snd_pcm_substream *substream,
51*4882a593Smuzhiyun struct snd_pcm_hw_params *params, struct dma_slave_config *slave_config)
52*4882a593Smuzhiyun {
53*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
54*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dma_data;
55*4882a593Smuzhiyun int ret;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (rtd->num_cpus > 1) {
58*4882a593Smuzhiyun dev_err(rtd->dev,
59*4882a593Smuzhiyun "%s doesn't support Multi CPU yet\n", __func__);
60*4882a593Smuzhiyun return -EINVAL;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun ret = snd_hwparams_to_dma_slave_config(substream, params, slave_config);
66*4882a593Smuzhiyun if (ret)
67*4882a593Smuzhiyun return ret;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun snd_dmaengine_pcm_set_config_from_dai_data(substream, dma_data,
70*4882a593Smuzhiyun slave_config);
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_prepare_slave_config);
75*4882a593Smuzhiyun
dmaengine_pcm_hw_params(struct snd_soc_component * component,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)76*4882a593Smuzhiyun static int dmaengine_pcm_hw_params(struct snd_soc_component *component,
77*4882a593Smuzhiyun struct snd_pcm_substream *substream,
78*4882a593Smuzhiyun struct snd_pcm_hw_params *params)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
81*4882a593Smuzhiyun struct dma_chan *chan = snd_dmaengine_pcm_get_chan(substream);
82*4882a593Smuzhiyun int (*prepare_slave_config)(struct snd_pcm_substream *substream,
83*4882a593Smuzhiyun struct snd_pcm_hw_params *params,
84*4882a593Smuzhiyun struct dma_slave_config *slave_config);
85*4882a593Smuzhiyun struct dma_slave_config slave_config;
86*4882a593Smuzhiyun int ret;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun memset(&slave_config, 0, sizeof(slave_config));
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun if (!pcm->config)
91*4882a593Smuzhiyun prepare_slave_config = snd_dmaengine_pcm_prepare_slave_config;
92*4882a593Smuzhiyun else
93*4882a593Smuzhiyun prepare_slave_config = pcm->config->prepare_slave_config;
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun if (prepare_slave_config) {
96*4882a593Smuzhiyun ret = prepare_slave_config(substream, params, &slave_config);
97*4882a593Smuzhiyun if (ret)
98*4882a593Smuzhiyun return ret;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun ret = dmaengine_slave_config(chan, &slave_config);
101*4882a593Smuzhiyun if (ret)
102*4882a593Smuzhiyun return ret;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun }
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun static int
dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component * component,struct snd_pcm_substream * substream)109*4882a593Smuzhiyun dmaengine_pcm_set_runtime_hwparams(struct snd_soc_component *component,
110*4882a593Smuzhiyun struct snd_pcm_substream *substream)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
113*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
114*4882a593Smuzhiyun struct device *dma_dev = dmaengine_dma_dev(pcm, substream);
115*4882a593Smuzhiyun struct dma_chan *chan = pcm->chan[substream->stream];
116*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dma_data;
117*4882a593Smuzhiyun struct snd_pcm_hardware hw;
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun if (rtd->num_cpus > 1) {
120*4882a593Smuzhiyun dev_err(rtd->dev,
121*4882a593Smuzhiyun "%s doesn't support Multi CPU yet\n", __func__);
122*4882a593Smuzhiyun return -EINVAL;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun if (pcm->config && pcm->config->pcm_hardware)
126*4882a593Smuzhiyun return snd_soc_set_runtime_hwparams(substream,
127*4882a593Smuzhiyun pcm->config->pcm_hardware);
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun memset(&hw, 0, sizeof(hw));
132*4882a593Smuzhiyun hw.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
133*4882a593Smuzhiyun SNDRV_PCM_INFO_INTERLEAVED;
134*4882a593Smuzhiyun hw.periods_min = 2;
135*4882a593Smuzhiyun hw.periods_max = UINT_MAX;
136*4882a593Smuzhiyun hw.period_bytes_min = 256;
137*4882a593Smuzhiyun hw.period_bytes_max = dma_get_max_seg_size(dma_dev);
138*4882a593Smuzhiyun hw.buffer_bytes_max = SIZE_MAX;
139*4882a593Smuzhiyun hw.fifo_size = dma_data->fifo_size;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
142*4882a593Smuzhiyun hw.info |= SNDRV_PCM_INFO_BATCH;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /**
145*4882a593Smuzhiyun * FIXME: Remove the return value check to align with the code
146*4882a593Smuzhiyun * before adding snd_dmaengine_pcm_refine_runtime_hwparams
147*4882a593Smuzhiyun * function.
148*4882a593Smuzhiyun */
149*4882a593Smuzhiyun snd_dmaengine_pcm_refine_runtime_hwparams(substream,
150*4882a593Smuzhiyun dma_data,
151*4882a593Smuzhiyun &hw,
152*4882a593Smuzhiyun chan);
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun return snd_soc_set_runtime_hwparams(substream, &hw);
155*4882a593Smuzhiyun }
156*4882a593Smuzhiyun
dmaengine_pcm_open(struct snd_soc_component * component,struct snd_pcm_substream * substream)157*4882a593Smuzhiyun static int dmaengine_pcm_open(struct snd_soc_component *component,
158*4882a593Smuzhiyun struct snd_pcm_substream *substream)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
161*4882a593Smuzhiyun struct dma_chan *chan = pcm->chan[substream->stream];
162*4882a593Smuzhiyun int ret;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun ret = dmaengine_pcm_set_runtime_hwparams(component, substream);
165*4882a593Smuzhiyun if (ret)
166*4882a593Smuzhiyun return ret;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun return snd_dmaengine_pcm_open(substream, chan);
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
dmaengine_pcm_close(struct snd_soc_component * component,struct snd_pcm_substream * substream)171*4882a593Smuzhiyun static int dmaengine_pcm_close(struct snd_soc_component *component,
172*4882a593Smuzhiyun struct snd_pcm_substream *substream)
173*4882a593Smuzhiyun {
174*4882a593Smuzhiyun return snd_dmaengine_pcm_close(substream);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun
dmaengine_pcm_trigger(struct snd_soc_component * component,struct snd_pcm_substream * substream,int cmd)177*4882a593Smuzhiyun static int dmaengine_pcm_trigger(struct snd_soc_component *component,
178*4882a593Smuzhiyun struct snd_pcm_substream *substream, int cmd)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun return snd_dmaengine_pcm_trigger(substream, cmd);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
dmaengine_pcm_compat_request_channel(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd,struct snd_pcm_substream * substream)183*4882a593Smuzhiyun static struct dma_chan *dmaengine_pcm_compat_request_channel(
184*4882a593Smuzhiyun struct snd_soc_component *component,
185*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd,
186*4882a593Smuzhiyun struct snd_pcm_substream *substream)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
189*4882a593Smuzhiyun struct snd_dmaengine_dai_dma_data *dma_data;
190*4882a593Smuzhiyun dma_filter_fn fn = NULL;
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (rtd->num_cpus > 1) {
193*4882a593Smuzhiyun dev_err(rtd->dev,
194*4882a593Smuzhiyun "%s doesn't support Multi CPU yet\n", __func__);
195*4882a593Smuzhiyun return NULL;
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX) && pcm->chan[0])
201*4882a593Smuzhiyun return pcm->chan[0];
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (pcm->config && pcm->config->compat_request_channel)
204*4882a593Smuzhiyun return pcm->config->compat_request_channel(rtd, substream);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun if (pcm->config)
207*4882a593Smuzhiyun fn = pcm->config->compat_filter_fn;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun return snd_dmaengine_pcm_request_channel(fn, dma_data->filter_data);
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun
dmaengine_pcm_can_report_residue(struct device * dev,struct dma_chan * chan)212*4882a593Smuzhiyun static bool dmaengine_pcm_can_report_residue(struct device *dev,
213*4882a593Smuzhiyun struct dma_chan *chan)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun struct dma_slave_caps dma_caps;
216*4882a593Smuzhiyun int ret;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun ret = dma_get_slave_caps(chan, &dma_caps);
219*4882a593Smuzhiyun if (ret != 0) {
220*4882a593Smuzhiyun dev_warn(dev, "Failed to get DMA channel capabilities, falling back to period counting: %d\n",
221*4882a593Smuzhiyun ret);
222*4882a593Smuzhiyun return false;
223*4882a593Smuzhiyun }
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun if (dma_caps.residue_granularity == DMA_RESIDUE_GRANULARITY_DESCRIPTOR)
226*4882a593Smuzhiyun return false;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun return true;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
dmaengine_pcm_new(struct snd_soc_component * component,struct snd_soc_pcm_runtime * rtd)231*4882a593Smuzhiyun static int dmaengine_pcm_new(struct snd_soc_component *component,
232*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd)
233*4882a593Smuzhiyun {
234*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
235*4882a593Smuzhiyun const struct snd_dmaengine_pcm_config *config = pcm->config;
236*4882a593Smuzhiyun struct device *dev = component->dev;
237*4882a593Smuzhiyun struct snd_pcm_substream *substream;
238*4882a593Smuzhiyun size_t prealloc_buffer_size;
239*4882a593Smuzhiyun size_t max_buffer_size;
240*4882a593Smuzhiyun unsigned int i;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun if (config && config->prealloc_buffer_size) {
243*4882a593Smuzhiyun prealloc_buffer_size = config->prealloc_buffer_size;
244*4882a593Smuzhiyun max_buffer_size = config->pcm_hardware->buffer_bytes_max;
245*4882a593Smuzhiyun } else {
246*4882a593Smuzhiyun prealloc_buffer_size = prealloc_buffer_size_kbytes * 1024;
247*4882a593Smuzhiyun max_buffer_size = SIZE_MAX;
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun for_each_pcm_streams(i) {
251*4882a593Smuzhiyun substream = rtd->pcm->streams[i].substream;
252*4882a593Smuzhiyun if (!substream)
253*4882a593Smuzhiyun continue;
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun if (!pcm->chan[i] && config && config->chan_names[i])
256*4882a593Smuzhiyun pcm->chan[i] = dma_request_slave_channel(dev,
257*4882a593Smuzhiyun config->chan_names[i]);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun if (!pcm->chan[i] && (pcm->flags & SND_DMAENGINE_PCM_FLAG_COMPAT)) {
260*4882a593Smuzhiyun pcm->chan[i] = dmaengine_pcm_compat_request_channel(
261*4882a593Smuzhiyun component, rtd, substream);
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun if (!pcm->chan[i]) {
265*4882a593Smuzhiyun dev_err(component->dev,
266*4882a593Smuzhiyun "Missing dma channel for stream: %d\n", i);
267*4882a593Smuzhiyun return -EINVAL;
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun snd_pcm_set_managed_buffer(substream,
271*4882a593Smuzhiyun SNDRV_DMA_TYPE_DEV_IRAM,
272*4882a593Smuzhiyun dmaengine_dma_dev(pcm, substream),
273*4882a593Smuzhiyun prealloc_buffer_size,
274*4882a593Smuzhiyun max_buffer_size);
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (!dmaengine_pcm_can_report_residue(dev, pcm->chan[i]))
277*4882a593Smuzhiyun pcm->flags |= SND_DMAENGINE_PCM_FLAG_NO_RESIDUE;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (rtd->pcm->streams[i].pcm->name[0] == '\0') {
280*4882a593Smuzhiyun strscpy_pad(rtd->pcm->streams[i].pcm->name,
281*4882a593Smuzhiyun rtd->pcm->streams[i].pcm->id,
282*4882a593Smuzhiyun sizeof(rtd->pcm->streams[i].pcm->name));
283*4882a593Smuzhiyun }
284*4882a593Smuzhiyun }
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun return 0;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
dmaengine_pcm_pointer(struct snd_soc_component * component,struct snd_pcm_substream * substream)289*4882a593Smuzhiyun static snd_pcm_uframes_t dmaengine_pcm_pointer(
290*4882a593Smuzhiyun struct snd_soc_component *component,
291*4882a593Smuzhiyun struct snd_pcm_substream *substream)
292*4882a593Smuzhiyun {
293*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun if (pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_RESIDUE)
296*4882a593Smuzhiyun return snd_dmaengine_pcm_pointer_no_residue(substream);
297*4882a593Smuzhiyun else
298*4882a593Smuzhiyun return snd_dmaengine_pcm_pointer(substream);
299*4882a593Smuzhiyun }
300*4882a593Smuzhiyun
dmaengine_copy_user(struct snd_soc_component * component,struct snd_pcm_substream * substream,int channel,unsigned long hwoff,void __user * buf,unsigned long bytes)301*4882a593Smuzhiyun static int dmaengine_copy_user(struct snd_soc_component *component,
302*4882a593Smuzhiyun struct snd_pcm_substream *substream,
303*4882a593Smuzhiyun int channel, unsigned long hwoff,
304*4882a593Smuzhiyun void __user *buf, unsigned long bytes)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun struct snd_pcm_runtime *runtime = substream->runtime;
307*4882a593Smuzhiyun struct dmaengine_pcm *pcm = soc_component_to_pcm(component);
308*4882a593Smuzhiyun int (*process)(struct snd_pcm_substream *substream,
309*4882a593Smuzhiyun int channel, unsigned long hwoff,
310*4882a593Smuzhiyun void *buf, unsigned long bytes) = pcm->config->process;
311*4882a593Smuzhiyun bool is_playback = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
312*4882a593Smuzhiyun void *dma_ptr = runtime->dma_area + hwoff +
313*4882a593Smuzhiyun channel * (runtime->dma_bytes / runtime->channels);
314*4882a593Smuzhiyun int ret;
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun if (is_playback)
317*4882a593Smuzhiyun if (copy_from_user(dma_ptr, buf, bytes))
318*4882a593Smuzhiyun return -EFAULT;
319*4882a593Smuzhiyun
320*4882a593Smuzhiyun if (process) {
321*4882a593Smuzhiyun ret = process(substream, channel, hwoff, (__force void *)buf, bytes);
322*4882a593Smuzhiyun if (ret < 0)
323*4882a593Smuzhiyun return ret;
324*4882a593Smuzhiyun }
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (!is_playback)
327*4882a593Smuzhiyun if (copy_to_user(buf, dma_ptr, bytes))
328*4882a593Smuzhiyun return -EFAULT;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun return 0;
331*4882a593Smuzhiyun }
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun static const struct snd_soc_component_driver dmaengine_pcm_component = {
334*4882a593Smuzhiyun .name = SND_DMAENGINE_PCM_DRV_NAME,
335*4882a593Smuzhiyun .probe_order = SND_SOC_COMP_ORDER_LATE,
336*4882a593Smuzhiyun .open = dmaengine_pcm_open,
337*4882a593Smuzhiyun .close = dmaengine_pcm_close,
338*4882a593Smuzhiyun .hw_params = dmaengine_pcm_hw_params,
339*4882a593Smuzhiyun .trigger = dmaengine_pcm_trigger,
340*4882a593Smuzhiyun .pointer = dmaengine_pcm_pointer,
341*4882a593Smuzhiyun .pcm_construct = dmaengine_pcm_new,
342*4882a593Smuzhiyun };
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun static const struct snd_soc_component_driver dmaengine_pcm_component_process = {
345*4882a593Smuzhiyun .name = SND_DMAENGINE_PCM_DRV_NAME,
346*4882a593Smuzhiyun .probe_order = SND_SOC_COMP_ORDER_LATE,
347*4882a593Smuzhiyun .open = dmaengine_pcm_open,
348*4882a593Smuzhiyun .close = dmaengine_pcm_close,
349*4882a593Smuzhiyun .hw_params = dmaengine_pcm_hw_params,
350*4882a593Smuzhiyun .trigger = dmaengine_pcm_trigger,
351*4882a593Smuzhiyun .pointer = dmaengine_pcm_pointer,
352*4882a593Smuzhiyun .copy_user = dmaengine_copy_user,
353*4882a593Smuzhiyun .pcm_construct = dmaengine_pcm_new,
354*4882a593Smuzhiyun };
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun static const char * const dmaengine_pcm_dma_channel_names[] = {
357*4882a593Smuzhiyun [SNDRV_PCM_STREAM_PLAYBACK] = "tx",
358*4882a593Smuzhiyun [SNDRV_PCM_STREAM_CAPTURE] = "rx",
359*4882a593Smuzhiyun };
360*4882a593Smuzhiyun
dmaengine_pcm_request_chan_of(struct dmaengine_pcm * pcm,struct device * dev,const struct snd_dmaengine_pcm_config * config)361*4882a593Smuzhiyun static int dmaengine_pcm_request_chan_of(struct dmaengine_pcm *pcm,
362*4882a593Smuzhiyun struct device *dev, const struct snd_dmaengine_pcm_config *config)
363*4882a593Smuzhiyun {
364*4882a593Smuzhiyun unsigned int i;
365*4882a593Smuzhiyun const char *name;
366*4882a593Smuzhiyun struct dma_chan *chan;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun if ((pcm->flags & SND_DMAENGINE_PCM_FLAG_NO_DT) || (!dev->of_node &&
369*4882a593Smuzhiyun !(config && config->dma_dev && config->dma_dev->of_node)))
370*4882a593Smuzhiyun return 0;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (config && config->dma_dev) {
373*4882a593Smuzhiyun /*
374*4882a593Smuzhiyun * If this warning is seen, it probably means that your Linux
375*4882a593Smuzhiyun * device structure does not match your HW device structure.
376*4882a593Smuzhiyun * It would be best to refactor the Linux device structure to
377*4882a593Smuzhiyun * correctly match the HW structure.
378*4882a593Smuzhiyun */
379*4882a593Smuzhiyun dev_warn(dev, "DMA channels sourced from device %s",
380*4882a593Smuzhiyun dev_name(config->dma_dev));
381*4882a593Smuzhiyun dev = config->dma_dev;
382*4882a593Smuzhiyun }
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun for_each_pcm_streams(i) {
385*4882a593Smuzhiyun if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
386*4882a593Smuzhiyun name = "rx-tx";
387*4882a593Smuzhiyun else
388*4882a593Smuzhiyun name = dmaengine_pcm_dma_channel_names[i];
389*4882a593Smuzhiyun if (config && config->chan_names[i])
390*4882a593Smuzhiyun name = config->chan_names[i];
391*4882a593Smuzhiyun chan = dma_request_chan(dev, name);
392*4882a593Smuzhiyun if (IS_ERR(chan)) {
393*4882a593Smuzhiyun /*
394*4882a593Smuzhiyun * Only report probe deferral errors, channels
395*4882a593Smuzhiyun * might not be present for devices that
396*4882a593Smuzhiyun * support only TX or only RX.
397*4882a593Smuzhiyun */
398*4882a593Smuzhiyun if (PTR_ERR(chan) == -EPROBE_DEFER)
399*4882a593Smuzhiyun return -EPROBE_DEFER;
400*4882a593Smuzhiyun pcm->chan[i] = NULL;
401*4882a593Smuzhiyun } else {
402*4882a593Smuzhiyun pcm->chan[i] = chan;
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
405*4882a593Smuzhiyun break;
406*4882a593Smuzhiyun }
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
409*4882a593Smuzhiyun pcm->chan[1] = pcm->chan[0];
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun return 0;
412*4882a593Smuzhiyun }
413*4882a593Smuzhiyun
dmaengine_pcm_release_chan(struct dmaengine_pcm * pcm)414*4882a593Smuzhiyun static void dmaengine_pcm_release_chan(struct dmaengine_pcm *pcm)
415*4882a593Smuzhiyun {
416*4882a593Smuzhiyun unsigned int i;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun for_each_pcm_streams(i) {
419*4882a593Smuzhiyun if (!pcm->chan[i])
420*4882a593Smuzhiyun continue;
421*4882a593Smuzhiyun dma_release_channel(pcm->chan[i]);
422*4882a593Smuzhiyun if (pcm->flags & SND_DMAENGINE_PCM_FLAG_HALF_DUPLEX)
423*4882a593Smuzhiyun break;
424*4882a593Smuzhiyun }
425*4882a593Smuzhiyun }
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun /**
428*4882a593Smuzhiyun * snd_dmaengine_pcm_register - Register a dmaengine based PCM device
429*4882a593Smuzhiyun * @dev: The parent device for the PCM device
430*4882a593Smuzhiyun * @config: Platform specific PCM configuration
431*4882a593Smuzhiyun * @flags: Platform specific quirks
432*4882a593Smuzhiyun */
snd_dmaengine_pcm_register(struct device * dev,const struct snd_dmaengine_pcm_config * config,unsigned int flags)433*4882a593Smuzhiyun int snd_dmaengine_pcm_register(struct device *dev,
434*4882a593Smuzhiyun const struct snd_dmaengine_pcm_config *config, unsigned int flags)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun const struct snd_soc_component_driver *driver;
437*4882a593Smuzhiyun struct dmaengine_pcm *pcm;
438*4882a593Smuzhiyun int ret;
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun pcm = kzalloc(sizeof(*pcm), GFP_KERNEL);
441*4882a593Smuzhiyun if (!pcm)
442*4882a593Smuzhiyun return -ENOMEM;
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun #ifdef CONFIG_DEBUG_FS
445*4882a593Smuzhiyun pcm->component.debugfs_prefix = "dma";
446*4882a593Smuzhiyun #endif
447*4882a593Smuzhiyun pcm->config = config;
448*4882a593Smuzhiyun pcm->flags = flags;
449*4882a593Smuzhiyun
450*4882a593Smuzhiyun ret = dmaengine_pcm_request_chan_of(pcm, dev, config);
451*4882a593Smuzhiyun if (ret)
452*4882a593Smuzhiyun goto err_free_dma;
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun if (config && config->process)
455*4882a593Smuzhiyun driver = &dmaengine_pcm_component_process;
456*4882a593Smuzhiyun else
457*4882a593Smuzhiyun driver = &dmaengine_pcm_component;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun ret = snd_soc_component_initialize(&pcm->component, driver, dev);
460*4882a593Smuzhiyun if (ret)
461*4882a593Smuzhiyun goto err_free_dma;
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun ret = snd_soc_add_component(&pcm->component, NULL, 0);
464*4882a593Smuzhiyun if (ret)
465*4882a593Smuzhiyun goto err_free_dma;
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun return 0;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun err_free_dma:
470*4882a593Smuzhiyun dmaengine_pcm_release_chan(pcm);
471*4882a593Smuzhiyun kfree(pcm);
472*4882a593Smuzhiyun return ret;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_register);
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun /**
477*4882a593Smuzhiyun * snd_dmaengine_pcm_unregister - Removes a dmaengine based PCM device
478*4882a593Smuzhiyun * @dev: Parent device the PCM was register with
479*4882a593Smuzhiyun *
480*4882a593Smuzhiyun * Removes a dmaengine based PCM device previously registered with
481*4882a593Smuzhiyun * snd_dmaengine_pcm_register.
482*4882a593Smuzhiyun */
snd_dmaengine_pcm_unregister(struct device * dev)483*4882a593Smuzhiyun void snd_dmaengine_pcm_unregister(struct device *dev)
484*4882a593Smuzhiyun {
485*4882a593Smuzhiyun struct snd_soc_component *component;
486*4882a593Smuzhiyun struct dmaengine_pcm *pcm;
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun component = snd_soc_lookup_component(dev, SND_DMAENGINE_PCM_DRV_NAME);
489*4882a593Smuzhiyun if (!component)
490*4882a593Smuzhiyun return;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun pcm = soc_component_to_pcm(component);
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun snd_soc_unregister_component_by_driver(dev, component->driver);
495*4882a593Smuzhiyun dmaengine_pcm_release_chan(pcm);
496*4882a593Smuzhiyun kfree(pcm);
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(snd_dmaengine_pcm_unregister);
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun MODULE_LICENSE("GPL");
501