1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // siu.h - ALSA SoC driver for Renesas SH7343, SH7722 SIU peripheral.
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright (C) 2009-2010 Guennadi Liakhovetski <g.liakhovetski@gmx.de>
6*4882a593Smuzhiyun // Copyright (C) 2006 Carlos Munoz <carlos@kenati.com>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #ifndef SIU_H
9*4882a593Smuzhiyun #define SIU_H
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun /* Common kernel and user-space firmware-building defines and types */
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define YRAM0_SIZE (0x0040 / 4) /* 16 */
14*4882a593Smuzhiyun #define YRAM1_SIZE (0x0080 / 4) /* 32 */
15*4882a593Smuzhiyun #define YRAM2_SIZE (0x0040 / 4) /* 16 */
16*4882a593Smuzhiyun #define YRAM3_SIZE (0x0080 / 4) /* 32 */
17*4882a593Smuzhiyun #define YRAM4_SIZE (0x0080 / 4) /* 32 */
18*4882a593Smuzhiyun #define YRAM_DEF_SIZE (YRAM0_SIZE + YRAM1_SIZE + YRAM2_SIZE + \
19*4882a593Smuzhiyun YRAM3_SIZE + YRAM4_SIZE)
20*4882a593Smuzhiyun #define YRAM_FIR_SIZE (0x0400 / 4) /* 256 */
21*4882a593Smuzhiyun #define YRAM_IIR_SIZE (0x0200 / 4) /* 128 */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #define XRAM0_SIZE (0x0400 / 4) /* 256 */
24*4882a593Smuzhiyun #define XRAM1_SIZE (0x0200 / 4) /* 128 */
25*4882a593Smuzhiyun #define XRAM2_SIZE (0x0200 / 4) /* 128 */
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun /* PRAM program array size */
28*4882a593Smuzhiyun #define PRAM0_SIZE (0x0100 / 4) /* 64 */
29*4882a593Smuzhiyun #define PRAM1_SIZE ((0x2000 - 0x0100) / 4) /* 1984 */
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun #include <linux/types.h>
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct siu_spb_param {
34*4882a593Smuzhiyun __u32 ab1a; /* input FIFO address */
35*4882a593Smuzhiyun __u32 ab0a; /* output FIFO address */
36*4882a593Smuzhiyun __u32 dir; /* 0=the ather except CPUOUTPUT, 1=CPUINPUT */
37*4882a593Smuzhiyun __u32 event; /* SPB program starting conditions */
38*4882a593Smuzhiyun __u32 stfifo; /* STFIFO register setting value */
39*4882a593Smuzhiyun __u32 trdat; /* TRDAT register setting value */
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun struct siu_firmware {
43*4882a593Smuzhiyun __u32 yram_fir_coeff[YRAM_FIR_SIZE];
44*4882a593Smuzhiyun __u32 pram0[PRAM0_SIZE];
45*4882a593Smuzhiyun __u32 pram1[PRAM1_SIZE];
46*4882a593Smuzhiyun __u32 yram0[YRAM0_SIZE];
47*4882a593Smuzhiyun __u32 yram1[YRAM1_SIZE];
48*4882a593Smuzhiyun __u32 yram2[YRAM2_SIZE];
49*4882a593Smuzhiyun __u32 yram3[YRAM3_SIZE];
50*4882a593Smuzhiyun __u32 yram4[YRAM4_SIZE];
51*4882a593Smuzhiyun __u32 spbpar_num;
52*4882a593Smuzhiyun struct siu_spb_param spbpar[32];
53*4882a593Smuzhiyun };
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun #ifdef __KERNEL__
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun #include <linux/dmaengine.h>
58*4882a593Smuzhiyun #include <linux/interrupt.h>
59*4882a593Smuzhiyun #include <linux/io.h>
60*4882a593Smuzhiyun #include <linux/sh_dma.h>
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun #include <sound/core.h>
63*4882a593Smuzhiyun #include <sound/pcm.h>
64*4882a593Smuzhiyun #include <sound/soc.h>
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun #define SIU_PERIOD_BYTES_MAX 8192 /* DMA transfer/period size */
67*4882a593Smuzhiyun #define SIU_PERIOD_BYTES_MIN 256 /* DMA transfer/period size */
68*4882a593Smuzhiyun #define SIU_PERIODS_MAX 64 /* Max periods in buffer */
69*4882a593Smuzhiyun #define SIU_PERIODS_MIN 4 /* Min periods in buffer */
70*4882a593Smuzhiyun #define SIU_BUFFER_BYTES_MAX (SIU_PERIOD_BYTES_MAX * SIU_PERIODS_MAX)
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /* SIU ports: only one can be used at a time */
73*4882a593Smuzhiyun enum {
74*4882a593Smuzhiyun SIU_PORT_A,
75*4882a593Smuzhiyun SIU_PORT_B,
76*4882a593Smuzhiyun SIU_PORT_NUM,
77*4882a593Smuzhiyun };
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun /* SIU clock configuration */
80*4882a593Smuzhiyun enum {
81*4882a593Smuzhiyun SIU_CLKA_PLL,
82*4882a593Smuzhiyun SIU_CLKA_EXT,
83*4882a593Smuzhiyun SIU_CLKB_PLL,
84*4882a593Smuzhiyun SIU_CLKB_EXT
85*4882a593Smuzhiyun };
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun struct device;
88*4882a593Smuzhiyun struct siu_info {
89*4882a593Smuzhiyun struct device *dev;
90*4882a593Smuzhiyun int port_id;
91*4882a593Smuzhiyun u32 __iomem *pram;
92*4882a593Smuzhiyun u32 __iomem *xram;
93*4882a593Smuzhiyun u32 __iomem *yram;
94*4882a593Smuzhiyun u32 __iomem *reg;
95*4882a593Smuzhiyun struct siu_firmware fw;
96*4882a593Smuzhiyun };
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun struct siu_stream {
99*4882a593Smuzhiyun struct work_struct work;
100*4882a593Smuzhiyun struct snd_pcm_substream *substream;
101*4882a593Smuzhiyun snd_pcm_format_t format;
102*4882a593Smuzhiyun size_t buf_bytes;
103*4882a593Smuzhiyun size_t period_bytes;
104*4882a593Smuzhiyun int cur_period; /* Period currently in dma */
105*4882a593Smuzhiyun u32 volume;
106*4882a593Smuzhiyun snd_pcm_sframes_t xfer_cnt; /* Number of frames */
107*4882a593Smuzhiyun u8 rw_flg; /* transfer status */
108*4882a593Smuzhiyun /* DMA status */
109*4882a593Smuzhiyun struct dma_chan *chan; /* DMA channel */
110*4882a593Smuzhiyun struct dma_async_tx_descriptor *tx_desc;
111*4882a593Smuzhiyun dma_cookie_t cookie;
112*4882a593Smuzhiyun struct sh_dmae_slave param;
113*4882a593Smuzhiyun };
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun struct siu_port {
116*4882a593Smuzhiyun unsigned long play_cap; /* Used to track full duplex */
117*4882a593Smuzhiyun struct snd_pcm *pcm;
118*4882a593Smuzhiyun struct siu_stream playback;
119*4882a593Smuzhiyun struct siu_stream capture;
120*4882a593Smuzhiyun u32 stfifo; /* STFIFO value from firmware */
121*4882a593Smuzhiyun u32 trdat; /* TRDAT value from firmware */
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun extern struct siu_port *siu_ports[SIU_PORT_NUM];
125*4882a593Smuzhiyun
siu_port_info(struct snd_pcm_substream * substream)126*4882a593Smuzhiyun static inline struct siu_port *siu_port_info(struct snd_pcm_substream *substream)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct platform_device *pdev =
129*4882a593Smuzhiyun to_platform_device(substream->pcm->card->dev);
130*4882a593Smuzhiyun return siu_ports[pdev->id];
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* Register access */
siu_write32(u32 __iomem * addr,u32 val)134*4882a593Smuzhiyun static inline void siu_write32(u32 __iomem *addr, u32 val)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun __raw_writel(val, addr);
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun
siu_read32(u32 __iomem * addr)139*4882a593Smuzhiyun static inline u32 siu_read32(u32 __iomem *addr)
140*4882a593Smuzhiyun {
141*4882a593Smuzhiyun return __raw_readl(addr);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun /* SIU registers */
145*4882a593Smuzhiyun #define SIU_IFCTL (0x000 / sizeof(u32))
146*4882a593Smuzhiyun #define SIU_SRCTL (0x004 / sizeof(u32))
147*4882a593Smuzhiyun #define SIU_SFORM (0x008 / sizeof(u32))
148*4882a593Smuzhiyun #define SIU_CKCTL (0x00c / sizeof(u32))
149*4882a593Smuzhiyun #define SIU_TRDAT (0x010 / sizeof(u32))
150*4882a593Smuzhiyun #define SIU_STFIFO (0x014 / sizeof(u32))
151*4882a593Smuzhiyun #define SIU_DPAK (0x01c / sizeof(u32))
152*4882a593Smuzhiyun #define SIU_CKREV (0x020 / sizeof(u32))
153*4882a593Smuzhiyun #define SIU_EVNTC (0x028 / sizeof(u32))
154*4882a593Smuzhiyun #define SIU_SBCTL (0x040 / sizeof(u32))
155*4882a593Smuzhiyun #define SIU_SBPSET (0x044 / sizeof(u32))
156*4882a593Smuzhiyun #define SIU_SBFSTS (0x068 / sizeof(u32))
157*4882a593Smuzhiyun #define SIU_SBDVCA (0x06c / sizeof(u32))
158*4882a593Smuzhiyun #define SIU_SBDVCB (0x070 / sizeof(u32))
159*4882a593Smuzhiyun #define SIU_SBACTIV (0x074 / sizeof(u32))
160*4882a593Smuzhiyun #define SIU_DMAIA (0x090 / sizeof(u32))
161*4882a593Smuzhiyun #define SIU_DMAIB (0x094 / sizeof(u32))
162*4882a593Smuzhiyun #define SIU_DMAOA (0x098 / sizeof(u32))
163*4882a593Smuzhiyun #define SIU_DMAOB (0x09c / sizeof(u32))
164*4882a593Smuzhiyun #define SIU_DMAML (0x0a0 / sizeof(u32))
165*4882a593Smuzhiyun #define SIU_SPSTS (0x0cc / sizeof(u32))
166*4882a593Smuzhiyun #define SIU_SPCTL (0x0d0 / sizeof(u32))
167*4882a593Smuzhiyun #define SIU_BRGASEL (0x100 / sizeof(u32))
168*4882a593Smuzhiyun #define SIU_BRRA (0x104 / sizeof(u32))
169*4882a593Smuzhiyun #define SIU_BRGBSEL (0x108 / sizeof(u32))
170*4882a593Smuzhiyun #define SIU_BRRB (0x10c / sizeof(u32))
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun extern const struct snd_soc_component_driver siu_component;
173*4882a593Smuzhiyun extern struct siu_info *siu_i2s_data;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun int siu_init_port(int port, struct siu_port **port_info, struct snd_card *card);
176*4882a593Smuzhiyun void siu_free_port(struct siu_port *port_info);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun #endif
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun #endif /* SIU_H */
181