1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun //
3*4882a593Smuzhiyun // Bells audio support
4*4882a593Smuzhiyun //
5*4882a593Smuzhiyun // Copyright 2012 Wolfson Microelectronics
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <sound/soc.h>
8*4882a593Smuzhiyun #include <sound/soc-dapm.h>
9*4882a593Smuzhiyun #include <sound/jack.h>
10*4882a593Smuzhiyun #include <linux/gpio.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #include "../codecs/wm5102.h"
14*4882a593Smuzhiyun #include "../codecs/wm9081.h"
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun /* BCLK2 is fixed at this currently */
17*4882a593Smuzhiyun #define BCLK2_RATE (64 * 8000)
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /*
20*4882a593Smuzhiyun * Expect a 24.576MHz crystal if one is fitted (the driver will function
21*4882a593Smuzhiyun * if this is not fitted).
22*4882a593Smuzhiyun */
23*4882a593Smuzhiyun #define MCLK_RATE 24576000
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define SYS_AUDIO_RATE 44100
26*4882a593Smuzhiyun #define SYS_MCLK_RATE (SYS_AUDIO_RATE * 512)
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun #define DAI_AP_DSP 0
29*4882a593Smuzhiyun #define DAI_DSP_CODEC 1
30*4882a593Smuzhiyun #define DAI_CODEC_CP 2
31*4882a593Smuzhiyun #define DAI_CODEC_SUB 3
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun struct bells_drvdata {
34*4882a593Smuzhiyun int sysclk_rate;
35*4882a593Smuzhiyun int asyncclk_rate;
36*4882a593Smuzhiyun };
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun static struct bells_drvdata wm2200_drvdata = {
39*4882a593Smuzhiyun .sysclk_rate = 22579200,
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun static struct bells_drvdata wm5102_drvdata = {
43*4882a593Smuzhiyun .sysclk_rate = 45158400,
44*4882a593Smuzhiyun .asyncclk_rate = 49152000,
45*4882a593Smuzhiyun };
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun static struct bells_drvdata wm5110_drvdata = {
48*4882a593Smuzhiyun .sysclk_rate = 135475200,
49*4882a593Smuzhiyun .asyncclk_rate = 147456000,
50*4882a593Smuzhiyun };
51*4882a593Smuzhiyun
bells_set_bias_level(struct snd_soc_card * card,struct snd_soc_dapm_context * dapm,enum snd_soc_bias_level level)52*4882a593Smuzhiyun static int bells_set_bias_level(struct snd_soc_card *card,
53*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm,
54*4882a593Smuzhiyun enum snd_soc_bias_level level)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd;
57*4882a593Smuzhiyun struct snd_soc_dai *codec_dai;
58*4882a593Smuzhiyun struct snd_soc_component *component;
59*4882a593Smuzhiyun struct bells_drvdata *bells = card->drvdata;
60*4882a593Smuzhiyun int ret;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
63*4882a593Smuzhiyun codec_dai = asoc_rtd_to_codec(rtd, 0);
64*4882a593Smuzhiyun component = codec_dai->component;
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun if (dapm->dev != codec_dai->dev)
67*4882a593Smuzhiyun return 0;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun switch (level) {
70*4882a593Smuzhiyun case SND_SOC_BIAS_PREPARE:
71*4882a593Smuzhiyun if (dapm->bias_level != SND_SOC_BIAS_STANDBY)
72*4882a593Smuzhiyun break;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun ret = snd_soc_component_set_pll(component, WM5102_FLL1,
75*4882a593Smuzhiyun ARIZONA_FLL_SRC_MCLK1,
76*4882a593Smuzhiyun MCLK_RATE,
77*4882a593Smuzhiyun bells->sysclk_rate);
78*4882a593Smuzhiyun if (ret < 0)
79*4882a593Smuzhiyun pr_err("Failed to start FLL: %d\n", ret);
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if (bells->asyncclk_rate) {
82*4882a593Smuzhiyun ret = snd_soc_component_set_pll(component, WM5102_FLL2,
83*4882a593Smuzhiyun ARIZONA_FLL_SRC_AIF2BCLK,
84*4882a593Smuzhiyun BCLK2_RATE,
85*4882a593Smuzhiyun bells->asyncclk_rate);
86*4882a593Smuzhiyun if (ret < 0)
87*4882a593Smuzhiyun pr_err("Failed to start FLL: %d\n", ret);
88*4882a593Smuzhiyun }
89*4882a593Smuzhiyun break;
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun default:
92*4882a593Smuzhiyun break;
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun return 0;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun
bells_set_bias_level_post(struct snd_soc_card * card,struct snd_soc_dapm_context * dapm,enum snd_soc_bias_level level)98*4882a593Smuzhiyun static int bells_set_bias_level_post(struct snd_soc_card *card,
99*4882a593Smuzhiyun struct snd_soc_dapm_context *dapm,
100*4882a593Smuzhiyun enum snd_soc_bias_level level)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd;
103*4882a593Smuzhiyun struct snd_soc_dai *codec_dai;
104*4882a593Smuzhiyun struct snd_soc_component *component;
105*4882a593Smuzhiyun struct bells_drvdata *bells = card->drvdata;
106*4882a593Smuzhiyun int ret;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
109*4882a593Smuzhiyun codec_dai = asoc_rtd_to_codec(rtd, 0);
110*4882a593Smuzhiyun component = codec_dai->component;
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun if (dapm->dev != codec_dai->dev)
113*4882a593Smuzhiyun return 0;
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun switch (level) {
116*4882a593Smuzhiyun case SND_SOC_BIAS_STANDBY:
117*4882a593Smuzhiyun ret = snd_soc_component_set_pll(component, WM5102_FLL1, 0, 0, 0);
118*4882a593Smuzhiyun if (ret < 0) {
119*4882a593Smuzhiyun pr_err("Failed to stop FLL: %d\n", ret);
120*4882a593Smuzhiyun return ret;
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun if (bells->asyncclk_rate) {
124*4882a593Smuzhiyun ret = snd_soc_component_set_pll(component, WM5102_FLL2,
125*4882a593Smuzhiyun 0, 0, 0);
126*4882a593Smuzhiyun if (ret < 0) {
127*4882a593Smuzhiyun pr_err("Failed to stop FLL: %d\n", ret);
128*4882a593Smuzhiyun return ret;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun break;
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun default:
134*4882a593Smuzhiyun break;
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun dapm->bias_level = level;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun return 0;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun
bells_late_probe(struct snd_soc_card * card)142*4882a593Smuzhiyun static int bells_late_probe(struct snd_soc_card *card)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct bells_drvdata *bells = card->drvdata;
145*4882a593Smuzhiyun struct snd_soc_pcm_runtime *rtd;
146*4882a593Smuzhiyun struct snd_soc_component *wm0010;
147*4882a593Smuzhiyun struct snd_soc_component *component;
148*4882a593Smuzhiyun struct snd_soc_dai *aif1_dai;
149*4882a593Smuzhiyun struct snd_soc_dai *aif2_dai;
150*4882a593Smuzhiyun struct snd_soc_dai *aif3_dai;
151*4882a593Smuzhiyun struct snd_soc_dai *wm9081_dai;
152*4882a593Smuzhiyun int ret;
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_AP_DSP]);
155*4882a593Smuzhiyun wm0010 = asoc_rtd_to_codec(rtd, 0)->component;
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_DSP_CODEC]);
158*4882a593Smuzhiyun component = asoc_rtd_to_codec(rtd, 0)->component;
159*4882a593Smuzhiyun aif1_dai = asoc_rtd_to_codec(rtd, 0);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_SYSCLK,
162*4882a593Smuzhiyun ARIZONA_CLK_SRC_FLL1,
163*4882a593Smuzhiyun bells->sysclk_rate,
164*4882a593Smuzhiyun SND_SOC_CLOCK_IN);
165*4882a593Smuzhiyun if (ret != 0) {
166*4882a593Smuzhiyun dev_err(component->dev, "Failed to set SYSCLK: %d\n", ret);
167*4882a593Smuzhiyun return ret;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun ret = snd_soc_component_set_sysclk(wm0010, 0, 0, SYS_MCLK_RATE, 0);
171*4882a593Smuzhiyun if (ret != 0) {
172*4882a593Smuzhiyun dev_err(wm0010->dev, "Failed to set WM0010 clock: %d\n", ret);
173*4882a593Smuzhiyun return ret;
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun ret = snd_soc_dai_set_sysclk(aif1_dai, ARIZONA_CLK_SYSCLK, 0, 0);
177*4882a593Smuzhiyun if (ret != 0)
178*4882a593Smuzhiyun dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_OPCLK, 0,
181*4882a593Smuzhiyun SYS_MCLK_RATE, SND_SOC_CLOCK_OUT);
182*4882a593Smuzhiyun if (ret != 0)
183*4882a593Smuzhiyun dev_err(component->dev, "Failed to set OPCLK: %d\n", ret);
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun if (card->num_rtd == DAI_CODEC_CP)
186*4882a593Smuzhiyun return 0;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun ret = snd_soc_component_set_sysclk(component, ARIZONA_CLK_ASYNCCLK,
189*4882a593Smuzhiyun ARIZONA_CLK_SRC_FLL2,
190*4882a593Smuzhiyun bells->asyncclk_rate,
191*4882a593Smuzhiyun SND_SOC_CLOCK_IN);
192*4882a593Smuzhiyun if (ret != 0) {
193*4882a593Smuzhiyun dev_err(component->dev, "Failed to set ASYNCCLK: %d\n", ret);
194*4882a593Smuzhiyun return ret;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_CP]);
198*4882a593Smuzhiyun aif2_dai = asoc_rtd_to_cpu(rtd, 0);
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0);
201*4882a593Smuzhiyun if (ret != 0) {
202*4882a593Smuzhiyun dev_err(aif2_dai->dev, "Failed to set AIF2 clock: %d\n", ret);
203*4882a593Smuzhiyun return ret;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun if (card->num_rtd == DAI_CODEC_SUB)
207*4882a593Smuzhiyun return 0;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun rtd = snd_soc_get_pcm_runtime(card, &card->dai_link[DAI_CODEC_SUB]);
210*4882a593Smuzhiyun aif3_dai = asoc_rtd_to_cpu(rtd, 0);
211*4882a593Smuzhiyun wm9081_dai = asoc_rtd_to_codec(rtd, 0);
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun ret = snd_soc_dai_set_sysclk(aif3_dai, ARIZONA_CLK_SYSCLK, 0, 0);
214*4882a593Smuzhiyun if (ret != 0) {
215*4882a593Smuzhiyun dev_err(aif1_dai->dev, "Failed to set AIF1 clock: %d\n", ret);
216*4882a593Smuzhiyun return ret;
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun ret = snd_soc_component_set_sysclk(wm9081_dai->component, WM9081_SYSCLK_MCLK,
220*4882a593Smuzhiyun 0, SYS_MCLK_RATE, 0);
221*4882a593Smuzhiyun if (ret != 0) {
222*4882a593Smuzhiyun dev_err(wm9081_dai->dev, "Failed to set MCLK: %d\n", ret);
223*4882a593Smuzhiyun return ret;
224*4882a593Smuzhiyun }
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun return 0;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun static const struct snd_soc_pcm_stream baseband_params = {
230*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
231*4882a593Smuzhiyun .rate_min = 8000,
232*4882a593Smuzhiyun .rate_max = 8000,
233*4882a593Smuzhiyun .channels_min = 2,
234*4882a593Smuzhiyun .channels_max = 2,
235*4882a593Smuzhiyun };
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun static const struct snd_soc_pcm_stream sub_params = {
238*4882a593Smuzhiyun .formats = SNDRV_PCM_FMTBIT_S32_LE,
239*4882a593Smuzhiyun .rate_min = SYS_AUDIO_RATE,
240*4882a593Smuzhiyun .rate_max = SYS_AUDIO_RATE,
241*4882a593Smuzhiyun .channels_min = 2,
242*4882a593Smuzhiyun .channels_max = 2,
243*4882a593Smuzhiyun };
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm2200_cpu_dsp,
246*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
247*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
248*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm2200_dsp_codec,
251*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
252*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm2200.1-003a", "wm2200")));
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static struct snd_soc_dai_link bells_dai_wm2200[] = {
255*4882a593Smuzhiyun {
256*4882a593Smuzhiyun .name = "CPU-DSP",
257*4882a593Smuzhiyun .stream_name = "CPU-DSP",
258*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
259*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
260*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm2200_cpu_dsp),
261*4882a593Smuzhiyun },
262*4882a593Smuzhiyun {
263*4882a593Smuzhiyun .name = "DSP-CODEC",
264*4882a593Smuzhiyun .stream_name = "DSP-CODEC",
265*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
266*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
267*4882a593Smuzhiyun .params = &sub_params,
268*4882a593Smuzhiyun .ignore_suspend = 1,
269*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm2200_dsp_codec),
270*4882a593Smuzhiyun },
271*4882a593Smuzhiyun };
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5102_cpu_dsp,
274*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
275*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
276*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5102_dsp_codec,
279*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
280*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm5102-codec", "wm5102-aif1")));
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5102_baseband,
283*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif2")),
284*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5102_sub,
287*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm5102-aif3")),
288*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun static struct snd_soc_dai_link bells_dai_wm5102[] = {
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun .name = "CPU-DSP",
293*4882a593Smuzhiyun .stream_name = "CPU-DSP",
294*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
295*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
296*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5102_cpu_dsp),
297*4882a593Smuzhiyun },
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun .name = "DSP-CODEC",
300*4882a593Smuzhiyun .stream_name = "DSP-CODEC",
301*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
302*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
303*4882a593Smuzhiyun .params = &sub_params,
304*4882a593Smuzhiyun .ignore_suspend = 1,
305*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5102_dsp_codec),
306*4882a593Smuzhiyun },
307*4882a593Smuzhiyun {
308*4882a593Smuzhiyun .name = "Baseband",
309*4882a593Smuzhiyun .stream_name = "Baseband",
310*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
311*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
312*4882a593Smuzhiyun .ignore_suspend = 1,
313*4882a593Smuzhiyun .params = &baseband_params,
314*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5102_baseband),
315*4882a593Smuzhiyun },
316*4882a593Smuzhiyun {
317*4882a593Smuzhiyun .name = "Sub",
318*4882a593Smuzhiyun .stream_name = "Sub",
319*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
320*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBS_CFS,
321*4882a593Smuzhiyun .ignore_suspend = 1,
322*4882a593Smuzhiyun .params = &sub_params,
323*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5102_sub),
324*4882a593Smuzhiyun },
325*4882a593Smuzhiyun };
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5110_cpu_dsp,
328*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("samsung-i2s.0")),
329*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("spi0.0", "wm0010-sdi1")),
330*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_PLATFORM("samsung-i2s.0")));
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5110_dsp_codec,
333*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm0010-sdi2")),
334*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm5110-codec", "wm5110-aif1")));
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5110_baseband,
337*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif2")),
338*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm1250-ev1.1-0027", "wm1250-ev1")));
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun
341*4882a593Smuzhiyun SND_SOC_DAILINK_DEFS(wm5110_sub,
342*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CPU("wm5110-aif3")),
343*4882a593Smuzhiyun DAILINK_COMP_ARRAY(COMP_CODEC("wm9081.1-006c", "wm9081-hifi")));
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun static struct snd_soc_dai_link bells_dai_wm5110[] = {
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun .name = "CPU-DSP",
348*4882a593Smuzhiyun .stream_name = "CPU-DSP",
349*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
350*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
351*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5110_cpu_dsp),
352*4882a593Smuzhiyun },
353*4882a593Smuzhiyun {
354*4882a593Smuzhiyun .name = "DSP-CODEC",
355*4882a593Smuzhiyun .stream_name = "DSP-CODEC",
356*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
357*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
358*4882a593Smuzhiyun .params = &sub_params,
359*4882a593Smuzhiyun .ignore_suspend = 1,
360*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5110_dsp_codec),
361*4882a593Smuzhiyun },
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun .name = "Baseband",
364*4882a593Smuzhiyun .stream_name = "Baseband",
365*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
366*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBM_CFM,
367*4882a593Smuzhiyun .ignore_suspend = 1,
368*4882a593Smuzhiyun .params = &baseband_params,
369*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5110_baseband),
370*4882a593Smuzhiyun },
371*4882a593Smuzhiyun {
372*4882a593Smuzhiyun .name = "Sub",
373*4882a593Smuzhiyun .stream_name = "Sub",
374*4882a593Smuzhiyun .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF
375*4882a593Smuzhiyun | SND_SOC_DAIFMT_CBS_CFS,
376*4882a593Smuzhiyun .ignore_suspend = 1,
377*4882a593Smuzhiyun .params = &sub_params,
378*4882a593Smuzhiyun SND_SOC_DAILINK_REG(wm5110_sub),
379*4882a593Smuzhiyun },
380*4882a593Smuzhiyun };
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun static struct snd_soc_codec_conf bells_codec_conf[] = {
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun .dlc = COMP_CODEC_CONF("wm9081.1-006c"),
385*4882a593Smuzhiyun .name_prefix = "Sub",
386*4882a593Smuzhiyun },
387*4882a593Smuzhiyun };
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun static struct snd_soc_dapm_widget bells_widgets[] = {
390*4882a593Smuzhiyun SND_SOC_DAPM_MIC("DMIC", NULL),
391*4882a593Smuzhiyun };
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun static struct snd_soc_dapm_route bells_routes[] = {
394*4882a593Smuzhiyun { "Sub CLK_SYS", NULL, "OPCLK" },
395*4882a593Smuzhiyun { "CLKIN", NULL, "OPCLK" },
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun { "DMIC", NULL, "MICBIAS2" },
398*4882a593Smuzhiyun { "IN2L", NULL, "DMIC" },
399*4882a593Smuzhiyun { "IN2R", NULL, "DMIC" },
400*4882a593Smuzhiyun };
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun static struct snd_soc_card bells_cards[] = {
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun .name = "Bells WM2200",
405*4882a593Smuzhiyun .owner = THIS_MODULE,
406*4882a593Smuzhiyun .dai_link = bells_dai_wm2200,
407*4882a593Smuzhiyun .num_links = ARRAY_SIZE(bells_dai_wm2200),
408*4882a593Smuzhiyun .codec_conf = bells_codec_conf,
409*4882a593Smuzhiyun .num_configs = ARRAY_SIZE(bells_codec_conf),
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun .late_probe = bells_late_probe,
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun .dapm_widgets = bells_widgets,
414*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(bells_widgets),
415*4882a593Smuzhiyun .dapm_routes = bells_routes,
416*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(bells_routes),
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun .set_bias_level = bells_set_bias_level,
419*4882a593Smuzhiyun .set_bias_level_post = bells_set_bias_level_post,
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun .drvdata = &wm2200_drvdata,
422*4882a593Smuzhiyun },
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun .name = "Bells WM5102",
425*4882a593Smuzhiyun .owner = THIS_MODULE,
426*4882a593Smuzhiyun .dai_link = bells_dai_wm5102,
427*4882a593Smuzhiyun .num_links = ARRAY_SIZE(bells_dai_wm5102),
428*4882a593Smuzhiyun .codec_conf = bells_codec_conf,
429*4882a593Smuzhiyun .num_configs = ARRAY_SIZE(bells_codec_conf),
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun .late_probe = bells_late_probe,
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun .dapm_widgets = bells_widgets,
434*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(bells_widgets),
435*4882a593Smuzhiyun .dapm_routes = bells_routes,
436*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(bells_routes),
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun .set_bias_level = bells_set_bias_level,
439*4882a593Smuzhiyun .set_bias_level_post = bells_set_bias_level_post,
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun .drvdata = &wm5102_drvdata,
442*4882a593Smuzhiyun },
443*4882a593Smuzhiyun {
444*4882a593Smuzhiyun .name = "Bells WM5110",
445*4882a593Smuzhiyun .owner = THIS_MODULE,
446*4882a593Smuzhiyun .dai_link = bells_dai_wm5110,
447*4882a593Smuzhiyun .num_links = ARRAY_SIZE(bells_dai_wm5110),
448*4882a593Smuzhiyun .codec_conf = bells_codec_conf,
449*4882a593Smuzhiyun .num_configs = ARRAY_SIZE(bells_codec_conf),
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun .late_probe = bells_late_probe,
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun .dapm_widgets = bells_widgets,
454*4882a593Smuzhiyun .num_dapm_widgets = ARRAY_SIZE(bells_widgets),
455*4882a593Smuzhiyun .dapm_routes = bells_routes,
456*4882a593Smuzhiyun .num_dapm_routes = ARRAY_SIZE(bells_routes),
457*4882a593Smuzhiyun
458*4882a593Smuzhiyun .set_bias_level = bells_set_bias_level,
459*4882a593Smuzhiyun .set_bias_level_post = bells_set_bias_level_post,
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun .drvdata = &wm5110_drvdata,
462*4882a593Smuzhiyun },
463*4882a593Smuzhiyun };
464*4882a593Smuzhiyun
bells_probe(struct platform_device * pdev)465*4882a593Smuzhiyun static int bells_probe(struct platform_device *pdev)
466*4882a593Smuzhiyun {
467*4882a593Smuzhiyun int ret;
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun bells_cards[pdev->id].dev = &pdev->dev;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun ret = devm_snd_soc_register_card(&pdev->dev, &bells_cards[pdev->id]);
472*4882a593Smuzhiyun if (ret)
473*4882a593Smuzhiyun dev_err(&pdev->dev,
474*4882a593Smuzhiyun "snd_soc_register_card(%s) failed: %d\n",
475*4882a593Smuzhiyun bells_cards[pdev->id].name, ret);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun return ret;
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun static struct platform_driver bells_driver = {
481*4882a593Smuzhiyun .driver = {
482*4882a593Smuzhiyun .name = "bells",
483*4882a593Smuzhiyun .pm = &snd_soc_pm_ops,
484*4882a593Smuzhiyun },
485*4882a593Smuzhiyun .probe = bells_probe,
486*4882a593Smuzhiyun };
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun module_platform_driver(bells_driver);
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun MODULE_DESCRIPTION("Bells audio support");
491*4882a593Smuzhiyun MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
492*4882a593Smuzhiyun MODULE_LICENSE("GPL");
493*4882a593Smuzhiyun MODULE_ALIAS("platform:bells");
494