1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Rockchip VAD Preprocess 4 * 5 * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd 6 * 7 */ 8 9 .arch armv7-a 10 .fpu softvfp 11 .eabi_attribute 20, 1 12 .eabi_attribute 21, 1 13 .eabi_attribute 23, 3 14 .eabi_attribute 24, 1 15 .eabi_attribute 25, 1 16 .eabi_attribute 26, 2 17 .eabi_attribute 30, 4 18 .eabi_attribute 34, 1 19 .eabi_attribute 18, 4 20 .file "vad_preprocess_arm.S" 21 .text 22 .align 2 23 .global vad_preprocess_init 24 .type vad_preprocess_init, %function 25vad_preprocess_init: 26 .fnstart 27 @ args = 0, pretend = 0, frame = 0 28 @ frame_needed = 0, uses_anonymous_args = 0 29 @ link register save eliminated. 30 ldr r2, .L4 31 ldr r3, [r0, #8] 32 strh r3, [r2] @ movhi 33 ldr r3, [r0, #4] 34 strh r3, [r2, #2] @ movhi 35 ldr r3, [r0, #12] 36 strh r3, [r2, #4] @ movhi 37 ldr r3, [r0] 38 strh r3, [r2, #6] @ movhi 39 ldr r3, [r0, #16] 40 tst r3, #512 41 ubfx r3, r3, #0, #9 42 eorne r3, r3, #65280 43 eorne r3, r3, #255 44 uxtheq r3, r3 45 strh r3, [r2, #8] @ movhi 46 bx lr 47.L5: 48 .align 2 49.L4: 50 .word .LANCHOR0 51 .fnend 52 .size vad_preprocess_init, .-vad_preprocess_init 53 .align 2 54 .global vad_preprocess 55 .type vad_preprocess, %function 56vad_preprocess: 57 .fnstart 58 @ args = 0, pretend = 0, frame = 0 59 @ frame_needed = 0, uses_anonymous_args = 0 60 ldr r3, .L27 61 stmfd sp!, {r4, r5, r6, r7, r8, r9, lr} 62 .save {r4, r5, r6, r7, r8, r9, lr} 63 movw lr, #15349 64 ldrsh r2, [r3, #8] 65 ldrh ip, [r3, #10] 66 ldr r1, .L27+4 67 mul r0, r2, r0 68 ldrh r4, [r3, #12] 69 smulbb r1, ip, r1 70 add r2, r0, #31 71 cmp r0, #0 72 movlt r0, r2 73 ldrh r2, [r3, #14] 74 mov r0, r0, asr #5 75 mla r1, lr, r0, r1 76 smlabb r1, r4, lr, r1 77 ldr r4, .L27+8 78 ldrsh lr, [r3, #16] 79 smulbb r4, r2, r4 80 rsb r4, r4, r1 81 movw r1, #14379 82 mls r4, lr, r1, r4 83 cmp r4, #1 84 mov r5, r4, asr #31 85 sbcs r1, r5, #0 86 blt .L7 87 adds r4, r4, #8192 88 adc r5, r5, #0 89 b .L24 90.L7: 91 subs r4, r4, #8192 92 movw r8, #16383 93 sbc r5, r5, #0 94 mov r9, #0 95 mov r6, r5, asr #31 96 mov r7, r6, asr #31 97 and r6, r6, r8 98 and r7, r7, r9 99 adds r4, r4, r6 100 adc r5, r5, r7 101.L24: 102 strh ip, [r3, #12] @ movhi 103 mov r1, r4, lsr #14 104 ldrh ip, [r3, #18] 105 orr r1, r1, r5, asl #18 106 strh r0, [r3, #10] @ movhi 107 add ip, ip, #1 108 uxth r1, r1 109 ldr r0, .L27+12 110 uxth ip, ip 111 strh r1, [r3, #14] @ movhi 112 strh ip, [r3, #18] @ movhi 113 sxth r1, r1 114 sxth ip, ip 115 cmp r1, #0 116 and r0, r0, ip 117 rsblt r1, r1, #0 118 cmp r0, #0 119 strh r2, [r3, #16] @ movhi 120 sublt r0, r0, #1 121 ldr r2, [r3, #20] 122 mvnlt r0, r0, asl #24 123 add r2, r1, r2 124 mvnlt r0, r0, lsr #24 125 addlt r0, r0, #1 126 cmp r0, #0 127 str r2, [r3, #20] 128 bne .L9 129 ldr r0, [r3, #24] 130 ldr ip, .L27 131 cmp r0, #99 132 bgt .L11 133 add r2, r2, #128 134 add ip, ip, r0, asl #1 135 add lr, r2, #255 136 cmp r2, #0 137 movlt r2, lr 138 mov r2, r2, asr #8 139 strh r2, [ip, #28] @ movhi 140 b .L12 141.L11: 142 add lr, ip, #28 143 add ip, ip, #226 144.L13: 145 ldrh r4, [lr, #2] 146 strh r4, [lr], #2 @ movhi 147 cmp lr, ip 148 bne .L13 149 add r2, r2, #128 150 add ip, r2, #255 151 cmp r2, #0 152 movlt r2, ip 153 mov r2, r2, asr #8 154 strh r2, [r3, #226] @ movhi 155.L12: 156 cmp r0, #99 157 ldrh r2, [r3, #28] 158 ldrle r4, .L27+16 159 movle lr, #1 160 bgt .L26 161.L15: 162 cmp lr, r0 163 bge .L17 164 ldrsh ip, [r4], #2 165 sxth r2, r2 166 add lr, lr, #1 167 cmp ip, r2 168 movge ip, r2 169 uxth r2, ip 170 b .L15 171.L26: 172 ldr ip, .L27+16 173 add r4, ip, #198 174.L18: 175 ldrsh lr, [ip], #2 176 sxth r2, r2 177 cmp r2, lr 178 movge r2, lr 179 cmp ip, r4 180 uxth r2, r2 181 bne .L18 182.L17: 183 ldrh lr, [r3, #6] 184 mov ip, #128 185 mov r4, #230 186 add r0, r0, #1 187 str r0, [r3, #24] 188 smlabb ip, lr, r4, ip 189 mov lr, #26 190 smlabb r2, r2, lr, ip 191 add ip, r2, #255 192 cmp r2, #0 193 movlt r2, ip 194 mov r2, r2, asr #8 195 strh r2, [r3, #6] @ movhi 196 mov r2, #0 197 str r2, [r3, #20] 198 strh r2, [r3, #18] @ movhi 199.L9: 200 ldrh r2, [r3, #6] 201 ldrh ip, [r3, #2] 202 ldrsh r3, [r3] 203 ldr r0, .L27 204 smlabb r3, r2, ip, r3 205 add r2, r0, #428 206 cmp r1, r3 207 ble .L19 208 ldrh r3, [r2] 209 ldrsh r0, [r0, #4] 210 add r3, r3, #1 211 uxth r3, r3 212 strh r3, [r2] @ movhi 213 sxth r3, r3 214 cmp r0, r3 215 movge r0, #0 216 movlt r0, #1 217 ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc} 218.L19: 219 mov r0, #0 220 strh r0, [r2] @ movhi 221 ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc} 222.L28: 223 .align 2 224.L27: 225 .word .LANCHOR0 226 .word -30697 227 .word -30632 228 .word -2147483393 229 .word .LANCHOR0+30 230 .fnend 231 .size vad_preprocess, .-vad_preprocess 232 .align 2 233 .global vad_preprocess_destroy 234 .type vad_preprocess_destroy, %function 235vad_preprocess_destroy: 236 .fnstart 237 @ args = 0, pretend = 0, frame = 0 238 @ frame_needed = 0, uses_anonymous_args = 0 239 @ link register save eliminated. 240 ldr r2, .L32 241 mov r3, #0 242 mov ip, r3 243 strh r3, [r2, #10] @ movhi 244 strh r3, [r2, #12] @ movhi 245 strh r3, [r2, #14] @ movhi 246 strh r3, [r2, #16] @ movhi 247 strh r3, [r2, #18] @ movhi 248 add r2, r2, #428 249 strh r3, [r2] @ movhi 250.L30: 251 ldr r2, .L32 252 mov r1, #0 253 add r0, r2, #28 254 strh ip, [r3, r0] @ movhi 255 add r3, r3, #2 256 cmp r3, #200 257 bne .L30 258 mov r3, #32 259 str r1, [r2, #20] 260 strh r1, [r2, #6] @ movhi 261 strh r3, [r2, #8] @ movhi 262 str r1, [r2, #24] 263 bx lr 264.L33: 265 .align 2 266.L32: 267 .word .LANCHOR0 268 .fnend 269 .size vad_preprocess_destroy, .-vad_preprocess_destroy 270 .align 2 271 .global vad_preprocess_update_params 272 .type vad_preprocess_update_params, %function 273vad_preprocess_update_params: 274 .fnstart 275 @ args = 0, pretend = 0, frame = 0 276 @ frame_needed = 0, uses_anonymous_args = 0 277 @ link register save eliminated. 278 ldr r3, .L35 279 ldrsh r3, [r3, #6] 280 str r3, [r0] 281 bx lr 282.L36: 283 .align 2 284.L35: 285 .word .LANCHOR0 286 .fnend 287 .size vad_preprocess_update_params, .-vad_preprocess_update_params 288 .bss 289 .align 2 290.LANCHOR0 = . + 0 291 .type g_sound_thd, %object 292 .size g_sound_thd, 2 293g_sound_thd: 294 .space 2 295 .type g_noise_level, %object 296 .size g_noise_level, 2 297g_noise_level: 298 .space 2 299 .type g_vad_con_thd, %object 300 .size g_vad_con_thd, 2 301g_vad_con_thd: 302 .space 2 303 .type g_noise_abs, %object 304 .size g_noise_abs, 2 305g_noise_abs: 306 .space 2 307 .type g_signal_gain, %object 308 .size g_signal_gain, 2 309g_signal_gain: 310 .space 2 311 .type g_xn_1, %object 312 .size g_xn_1, 2 313g_xn_1: 314 .space 2 315 .type g_xn_2, %object 316 .size g_xn_2, 2 317g_xn_2: 318 .space 2 319 .type g_yn_1, %object 320 .size g_yn_1, 2 321g_yn_1: 322 .space 2 323 .type g_yn_2, %object 324 .size g_yn_2, 2 325g_yn_2: 326 .space 2 327 .type g_sample_cnt, %object 328 .size g_sample_cnt, 2 329g_sample_cnt: 330 .space 2 331 .type g_sum_abs_frm, %object 332 .size g_sum_abs_frm, 4 333g_sum_abs_frm: 334 .space 4 335 .type frm_count, %object 336 .size frm_count, 4 337frm_count: 338 .space 4 339 .type g_ave_abs_rec, %object 340 .size g_ave_abs_rec, 400 341g_ave_abs_rec: 342 .space 400 343 .type g_vad_cnt, %object 344 .size g_vad_cnt, 2 345g_vad_cnt: 346 .space 2 347 .ident "GCC: (GNU) 4.9 20150123 (prerelease)" 348 .section .note.GNU-stack,"",%progbits 349