1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Rockchip VAD Preprocess 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun .arch armv7-a 10*4882a593Smuzhiyun .fpu softvfp 11*4882a593Smuzhiyun .eabi_attribute 20, 1 12*4882a593Smuzhiyun .eabi_attribute 21, 1 13*4882a593Smuzhiyun .eabi_attribute 23, 3 14*4882a593Smuzhiyun .eabi_attribute 24, 1 15*4882a593Smuzhiyun .eabi_attribute 25, 1 16*4882a593Smuzhiyun .eabi_attribute 26, 2 17*4882a593Smuzhiyun .eabi_attribute 30, 4 18*4882a593Smuzhiyun .eabi_attribute 34, 1 19*4882a593Smuzhiyun .eabi_attribute 18, 4 20*4882a593Smuzhiyun .file "vad_preprocess_arm.S" 21*4882a593Smuzhiyun .text 22*4882a593Smuzhiyun .align 2 23*4882a593Smuzhiyun .global vad_preprocess_init 24*4882a593Smuzhiyun .type vad_preprocess_init, %function 25*4882a593Smuzhiyunvad_preprocess_init: 26*4882a593Smuzhiyun .fnstart 27*4882a593Smuzhiyun @ args = 0, pretend = 0, frame = 0 28*4882a593Smuzhiyun @ frame_needed = 0, uses_anonymous_args = 0 29*4882a593Smuzhiyun @ link register save eliminated. 30*4882a593Smuzhiyun ldr r2, .L4 31*4882a593Smuzhiyun ldr r3, [r0, #8] 32*4882a593Smuzhiyun strh r3, [r2] @ movhi 33*4882a593Smuzhiyun ldr r3, [r0, #4] 34*4882a593Smuzhiyun strh r3, [r2, #2] @ movhi 35*4882a593Smuzhiyun ldr r3, [r0, #12] 36*4882a593Smuzhiyun strh r3, [r2, #4] @ movhi 37*4882a593Smuzhiyun ldr r3, [r0] 38*4882a593Smuzhiyun strh r3, [r2, #6] @ movhi 39*4882a593Smuzhiyun ldr r3, [r0, #16] 40*4882a593Smuzhiyun tst r3, #512 41*4882a593Smuzhiyun ubfx r3, r3, #0, #9 42*4882a593Smuzhiyun eorne r3, r3, #65280 43*4882a593Smuzhiyun eorne r3, r3, #255 44*4882a593Smuzhiyun uxtheq r3, r3 45*4882a593Smuzhiyun strh r3, [r2, #8] @ movhi 46*4882a593Smuzhiyun bx lr 47*4882a593Smuzhiyun.L5: 48*4882a593Smuzhiyun .align 2 49*4882a593Smuzhiyun.L4: 50*4882a593Smuzhiyun .word .LANCHOR0 51*4882a593Smuzhiyun .fnend 52*4882a593Smuzhiyun .size vad_preprocess_init, .-vad_preprocess_init 53*4882a593Smuzhiyun .align 2 54*4882a593Smuzhiyun .global vad_preprocess 55*4882a593Smuzhiyun .type vad_preprocess, %function 56*4882a593Smuzhiyunvad_preprocess: 57*4882a593Smuzhiyun .fnstart 58*4882a593Smuzhiyun @ args = 0, pretend = 0, frame = 0 59*4882a593Smuzhiyun @ frame_needed = 0, uses_anonymous_args = 0 60*4882a593Smuzhiyun ldr r3, .L27 61*4882a593Smuzhiyun stmfd sp!, {r4, r5, r6, r7, r8, r9, lr} 62*4882a593Smuzhiyun .save {r4, r5, r6, r7, r8, r9, lr} 63*4882a593Smuzhiyun movw lr, #15349 64*4882a593Smuzhiyun ldrsh r2, [r3, #8] 65*4882a593Smuzhiyun ldrh ip, [r3, #10] 66*4882a593Smuzhiyun ldr r1, .L27+4 67*4882a593Smuzhiyun mul r0, r2, r0 68*4882a593Smuzhiyun ldrh r4, [r3, #12] 69*4882a593Smuzhiyun smulbb r1, ip, r1 70*4882a593Smuzhiyun add r2, r0, #31 71*4882a593Smuzhiyun cmp r0, #0 72*4882a593Smuzhiyun movlt r0, r2 73*4882a593Smuzhiyun ldrh r2, [r3, #14] 74*4882a593Smuzhiyun mov r0, r0, asr #5 75*4882a593Smuzhiyun mla r1, lr, r0, r1 76*4882a593Smuzhiyun smlabb r1, r4, lr, r1 77*4882a593Smuzhiyun ldr r4, .L27+8 78*4882a593Smuzhiyun ldrsh lr, [r3, #16] 79*4882a593Smuzhiyun smulbb r4, r2, r4 80*4882a593Smuzhiyun rsb r4, r4, r1 81*4882a593Smuzhiyun movw r1, #14379 82*4882a593Smuzhiyun mls r4, lr, r1, r4 83*4882a593Smuzhiyun cmp r4, #1 84*4882a593Smuzhiyun mov r5, r4, asr #31 85*4882a593Smuzhiyun sbcs r1, r5, #0 86*4882a593Smuzhiyun blt .L7 87*4882a593Smuzhiyun adds r4, r4, #8192 88*4882a593Smuzhiyun adc r5, r5, #0 89*4882a593Smuzhiyun b .L24 90*4882a593Smuzhiyun.L7: 91*4882a593Smuzhiyun subs r4, r4, #8192 92*4882a593Smuzhiyun movw r8, #16383 93*4882a593Smuzhiyun sbc r5, r5, #0 94*4882a593Smuzhiyun mov r9, #0 95*4882a593Smuzhiyun mov r6, r5, asr #31 96*4882a593Smuzhiyun mov r7, r6, asr #31 97*4882a593Smuzhiyun and r6, r6, r8 98*4882a593Smuzhiyun and r7, r7, r9 99*4882a593Smuzhiyun adds r4, r4, r6 100*4882a593Smuzhiyun adc r5, r5, r7 101*4882a593Smuzhiyun.L24: 102*4882a593Smuzhiyun strh ip, [r3, #12] @ movhi 103*4882a593Smuzhiyun mov r1, r4, lsr #14 104*4882a593Smuzhiyun ldrh ip, [r3, #18] 105*4882a593Smuzhiyun orr r1, r1, r5, asl #18 106*4882a593Smuzhiyun strh r0, [r3, #10] @ movhi 107*4882a593Smuzhiyun add ip, ip, #1 108*4882a593Smuzhiyun uxth r1, r1 109*4882a593Smuzhiyun ldr r0, .L27+12 110*4882a593Smuzhiyun uxth ip, ip 111*4882a593Smuzhiyun strh r1, [r3, #14] @ movhi 112*4882a593Smuzhiyun strh ip, [r3, #18] @ movhi 113*4882a593Smuzhiyun sxth r1, r1 114*4882a593Smuzhiyun sxth ip, ip 115*4882a593Smuzhiyun cmp r1, #0 116*4882a593Smuzhiyun and r0, r0, ip 117*4882a593Smuzhiyun rsblt r1, r1, #0 118*4882a593Smuzhiyun cmp r0, #0 119*4882a593Smuzhiyun strh r2, [r3, #16] @ movhi 120*4882a593Smuzhiyun sublt r0, r0, #1 121*4882a593Smuzhiyun ldr r2, [r3, #20] 122*4882a593Smuzhiyun mvnlt r0, r0, asl #24 123*4882a593Smuzhiyun add r2, r1, r2 124*4882a593Smuzhiyun mvnlt r0, r0, lsr #24 125*4882a593Smuzhiyun addlt r0, r0, #1 126*4882a593Smuzhiyun cmp r0, #0 127*4882a593Smuzhiyun str r2, [r3, #20] 128*4882a593Smuzhiyun bne .L9 129*4882a593Smuzhiyun ldr r0, [r3, #24] 130*4882a593Smuzhiyun ldr ip, .L27 131*4882a593Smuzhiyun cmp r0, #99 132*4882a593Smuzhiyun bgt .L11 133*4882a593Smuzhiyun add r2, r2, #128 134*4882a593Smuzhiyun add ip, ip, r0, asl #1 135*4882a593Smuzhiyun add lr, r2, #255 136*4882a593Smuzhiyun cmp r2, #0 137*4882a593Smuzhiyun movlt r2, lr 138*4882a593Smuzhiyun mov r2, r2, asr #8 139*4882a593Smuzhiyun strh r2, [ip, #28] @ movhi 140*4882a593Smuzhiyun b .L12 141*4882a593Smuzhiyun.L11: 142*4882a593Smuzhiyun add lr, ip, #28 143*4882a593Smuzhiyun add ip, ip, #226 144*4882a593Smuzhiyun.L13: 145*4882a593Smuzhiyun ldrh r4, [lr, #2] 146*4882a593Smuzhiyun strh r4, [lr], #2 @ movhi 147*4882a593Smuzhiyun cmp lr, ip 148*4882a593Smuzhiyun bne .L13 149*4882a593Smuzhiyun add r2, r2, #128 150*4882a593Smuzhiyun add ip, r2, #255 151*4882a593Smuzhiyun cmp r2, #0 152*4882a593Smuzhiyun movlt r2, ip 153*4882a593Smuzhiyun mov r2, r2, asr #8 154*4882a593Smuzhiyun strh r2, [r3, #226] @ movhi 155*4882a593Smuzhiyun.L12: 156*4882a593Smuzhiyun cmp r0, #99 157*4882a593Smuzhiyun ldrh r2, [r3, #28] 158*4882a593Smuzhiyun ldrle r4, .L27+16 159*4882a593Smuzhiyun movle lr, #1 160*4882a593Smuzhiyun bgt .L26 161*4882a593Smuzhiyun.L15: 162*4882a593Smuzhiyun cmp lr, r0 163*4882a593Smuzhiyun bge .L17 164*4882a593Smuzhiyun ldrsh ip, [r4], #2 165*4882a593Smuzhiyun sxth r2, r2 166*4882a593Smuzhiyun add lr, lr, #1 167*4882a593Smuzhiyun cmp ip, r2 168*4882a593Smuzhiyun movge ip, r2 169*4882a593Smuzhiyun uxth r2, ip 170*4882a593Smuzhiyun b .L15 171*4882a593Smuzhiyun.L26: 172*4882a593Smuzhiyun ldr ip, .L27+16 173*4882a593Smuzhiyun add r4, ip, #198 174*4882a593Smuzhiyun.L18: 175*4882a593Smuzhiyun ldrsh lr, [ip], #2 176*4882a593Smuzhiyun sxth r2, r2 177*4882a593Smuzhiyun cmp r2, lr 178*4882a593Smuzhiyun movge r2, lr 179*4882a593Smuzhiyun cmp ip, r4 180*4882a593Smuzhiyun uxth r2, r2 181*4882a593Smuzhiyun bne .L18 182*4882a593Smuzhiyun.L17: 183*4882a593Smuzhiyun ldrh lr, [r3, #6] 184*4882a593Smuzhiyun mov ip, #128 185*4882a593Smuzhiyun mov r4, #230 186*4882a593Smuzhiyun add r0, r0, #1 187*4882a593Smuzhiyun str r0, [r3, #24] 188*4882a593Smuzhiyun smlabb ip, lr, r4, ip 189*4882a593Smuzhiyun mov lr, #26 190*4882a593Smuzhiyun smlabb r2, r2, lr, ip 191*4882a593Smuzhiyun add ip, r2, #255 192*4882a593Smuzhiyun cmp r2, #0 193*4882a593Smuzhiyun movlt r2, ip 194*4882a593Smuzhiyun mov r2, r2, asr #8 195*4882a593Smuzhiyun strh r2, [r3, #6] @ movhi 196*4882a593Smuzhiyun mov r2, #0 197*4882a593Smuzhiyun str r2, [r3, #20] 198*4882a593Smuzhiyun strh r2, [r3, #18] @ movhi 199*4882a593Smuzhiyun.L9: 200*4882a593Smuzhiyun ldrh r2, [r3, #6] 201*4882a593Smuzhiyun ldrh ip, [r3, #2] 202*4882a593Smuzhiyun ldrsh r3, [r3] 203*4882a593Smuzhiyun ldr r0, .L27 204*4882a593Smuzhiyun smlabb r3, r2, ip, r3 205*4882a593Smuzhiyun add r2, r0, #428 206*4882a593Smuzhiyun cmp r1, r3 207*4882a593Smuzhiyun ble .L19 208*4882a593Smuzhiyun ldrh r3, [r2] 209*4882a593Smuzhiyun ldrsh r0, [r0, #4] 210*4882a593Smuzhiyun add r3, r3, #1 211*4882a593Smuzhiyun uxth r3, r3 212*4882a593Smuzhiyun strh r3, [r2] @ movhi 213*4882a593Smuzhiyun sxth r3, r3 214*4882a593Smuzhiyun cmp r0, r3 215*4882a593Smuzhiyun movge r0, #0 216*4882a593Smuzhiyun movlt r0, #1 217*4882a593Smuzhiyun ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc} 218*4882a593Smuzhiyun.L19: 219*4882a593Smuzhiyun mov r0, #0 220*4882a593Smuzhiyun strh r0, [r2] @ movhi 221*4882a593Smuzhiyun ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc} 222*4882a593Smuzhiyun.L28: 223*4882a593Smuzhiyun .align 2 224*4882a593Smuzhiyun.L27: 225*4882a593Smuzhiyun .word .LANCHOR0 226*4882a593Smuzhiyun .word -30697 227*4882a593Smuzhiyun .word -30632 228*4882a593Smuzhiyun .word -2147483393 229*4882a593Smuzhiyun .word .LANCHOR0+30 230*4882a593Smuzhiyun .fnend 231*4882a593Smuzhiyun .size vad_preprocess, .-vad_preprocess 232*4882a593Smuzhiyun .align 2 233*4882a593Smuzhiyun .global vad_preprocess_destroy 234*4882a593Smuzhiyun .type vad_preprocess_destroy, %function 235*4882a593Smuzhiyunvad_preprocess_destroy: 236*4882a593Smuzhiyun .fnstart 237*4882a593Smuzhiyun @ args = 0, pretend = 0, frame = 0 238*4882a593Smuzhiyun @ frame_needed = 0, uses_anonymous_args = 0 239*4882a593Smuzhiyun @ link register save eliminated. 240*4882a593Smuzhiyun ldr r2, .L32 241*4882a593Smuzhiyun mov r3, #0 242*4882a593Smuzhiyun mov ip, r3 243*4882a593Smuzhiyun strh r3, [r2, #10] @ movhi 244*4882a593Smuzhiyun strh r3, [r2, #12] @ movhi 245*4882a593Smuzhiyun strh r3, [r2, #14] @ movhi 246*4882a593Smuzhiyun strh r3, [r2, #16] @ movhi 247*4882a593Smuzhiyun strh r3, [r2, #18] @ movhi 248*4882a593Smuzhiyun add r2, r2, #428 249*4882a593Smuzhiyun strh r3, [r2] @ movhi 250*4882a593Smuzhiyun.L30: 251*4882a593Smuzhiyun ldr r2, .L32 252*4882a593Smuzhiyun mov r1, #0 253*4882a593Smuzhiyun add r0, r2, #28 254*4882a593Smuzhiyun strh ip, [r3, r0] @ movhi 255*4882a593Smuzhiyun add r3, r3, #2 256*4882a593Smuzhiyun cmp r3, #200 257*4882a593Smuzhiyun bne .L30 258*4882a593Smuzhiyun mov r3, #32 259*4882a593Smuzhiyun str r1, [r2, #20] 260*4882a593Smuzhiyun strh r1, [r2, #6] @ movhi 261*4882a593Smuzhiyun strh r3, [r2, #8] @ movhi 262*4882a593Smuzhiyun str r1, [r2, #24] 263*4882a593Smuzhiyun bx lr 264*4882a593Smuzhiyun.L33: 265*4882a593Smuzhiyun .align 2 266*4882a593Smuzhiyun.L32: 267*4882a593Smuzhiyun .word .LANCHOR0 268*4882a593Smuzhiyun .fnend 269*4882a593Smuzhiyun .size vad_preprocess_destroy, .-vad_preprocess_destroy 270*4882a593Smuzhiyun .align 2 271*4882a593Smuzhiyun .global vad_preprocess_update_params 272*4882a593Smuzhiyun .type vad_preprocess_update_params, %function 273*4882a593Smuzhiyunvad_preprocess_update_params: 274*4882a593Smuzhiyun .fnstart 275*4882a593Smuzhiyun @ args = 0, pretend = 0, frame = 0 276*4882a593Smuzhiyun @ frame_needed = 0, uses_anonymous_args = 0 277*4882a593Smuzhiyun @ link register save eliminated. 278*4882a593Smuzhiyun ldr r3, .L35 279*4882a593Smuzhiyun ldrsh r3, [r3, #6] 280*4882a593Smuzhiyun str r3, [r0] 281*4882a593Smuzhiyun bx lr 282*4882a593Smuzhiyun.L36: 283*4882a593Smuzhiyun .align 2 284*4882a593Smuzhiyun.L35: 285*4882a593Smuzhiyun .word .LANCHOR0 286*4882a593Smuzhiyun .fnend 287*4882a593Smuzhiyun .size vad_preprocess_update_params, .-vad_preprocess_update_params 288*4882a593Smuzhiyun .bss 289*4882a593Smuzhiyun .align 2 290*4882a593Smuzhiyun.LANCHOR0 = . + 0 291*4882a593Smuzhiyun .type g_sound_thd, %object 292*4882a593Smuzhiyun .size g_sound_thd, 2 293*4882a593Smuzhiyung_sound_thd: 294*4882a593Smuzhiyun .space 2 295*4882a593Smuzhiyun .type g_noise_level, %object 296*4882a593Smuzhiyun .size g_noise_level, 2 297*4882a593Smuzhiyung_noise_level: 298*4882a593Smuzhiyun .space 2 299*4882a593Smuzhiyun .type g_vad_con_thd, %object 300*4882a593Smuzhiyun .size g_vad_con_thd, 2 301*4882a593Smuzhiyung_vad_con_thd: 302*4882a593Smuzhiyun .space 2 303*4882a593Smuzhiyun .type g_noise_abs, %object 304*4882a593Smuzhiyun .size g_noise_abs, 2 305*4882a593Smuzhiyung_noise_abs: 306*4882a593Smuzhiyun .space 2 307*4882a593Smuzhiyun .type g_signal_gain, %object 308*4882a593Smuzhiyun .size g_signal_gain, 2 309*4882a593Smuzhiyung_signal_gain: 310*4882a593Smuzhiyun .space 2 311*4882a593Smuzhiyun .type g_xn_1, %object 312*4882a593Smuzhiyun .size g_xn_1, 2 313*4882a593Smuzhiyung_xn_1: 314*4882a593Smuzhiyun .space 2 315*4882a593Smuzhiyun .type g_xn_2, %object 316*4882a593Smuzhiyun .size g_xn_2, 2 317*4882a593Smuzhiyung_xn_2: 318*4882a593Smuzhiyun .space 2 319*4882a593Smuzhiyun .type g_yn_1, %object 320*4882a593Smuzhiyun .size g_yn_1, 2 321*4882a593Smuzhiyung_yn_1: 322*4882a593Smuzhiyun .space 2 323*4882a593Smuzhiyun .type g_yn_2, %object 324*4882a593Smuzhiyun .size g_yn_2, 2 325*4882a593Smuzhiyung_yn_2: 326*4882a593Smuzhiyun .space 2 327*4882a593Smuzhiyun .type g_sample_cnt, %object 328*4882a593Smuzhiyun .size g_sample_cnt, 2 329*4882a593Smuzhiyung_sample_cnt: 330*4882a593Smuzhiyun .space 2 331*4882a593Smuzhiyun .type g_sum_abs_frm, %object 332*4882a593Smuzhiyun .size g_sum_abs_frm, 4 333*4882a593Smuzhiyung_sum_abs_frm: 334*4882a593Smuzhiyun .space 4 335*4882a593Smuzhiyun .type frm_count, %object 336*4882a593Smuzhiyun .size frm_count, 4 337*4882a593Smuzhiyunfrm_count: 338*4882a593Smuzhiyun .space 4 339*4882a593Smuzhiyun .type g_ave_abs_rec, %object 340*4882a593Smuzhiyun .size g_ave_abs_rec, 400 341*4882a593Smuzhiyung_ave_abs_rec: 342*4882a593Smuzhiyun .space 400 343*4882a593Smuzhiyun .type g_vad_cnt, %object 344*4882a593Smuzhiyun .size g_vad_cnt, 2 345*4882a593Smuzhiyung_vad_cnt: 346*4882a593Smuzhiyun .space 2 347*4882a593Smuzhiyun .ident "GCC: (GNU) 4.9 20150123 (prerelease)" 348*4882a593Smuzhiyun .section .note.GNU-stack,"",%progbits 349